diff options
author | Vineet Gupta <vgupta@synopsys.com> | 2015-04-15 07:05:38 -0400 |
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committer | Vineet Gupta <vgupta@synopsys.com> | 2015-04-20 08:57:36 -0400 |
commit | 30fdd373f24cc50e250c71a6e2df89505e267804 (patch) | |
tree | aecf014d62177d8d438fa4a962c5556f491bc557 /Documentation | |
parent | 22f6b899125063c5dc955dd378c408b14d80b020 (diff) |
ARC: perf: Rename DT binding to not confuse with power mgmt
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/arc/pct.txt | 20 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/arc/pmu.txt | 24 |
2 files changed, 20 insertions, 24 deletions
diff --git a/Documentation/devicetree/bindings/arc/pct.txt b/Documentation/devicetree/bindings/arc/pct.txt new file mode 100644 index 000000000000..7b9588444f20 --- /dev/null +++ b/Documentation/devicetree/bindings/arc/pct.txt | |||
@@ -0,0 +1,20 @@ | |||
1 | * ARC Performance Counters | ||
2 | |||
3 | The ARC700 can be configured with a pipeline performance monitor for counting | ||
4 | CPU and cache events like cache misses and hits. Like conventional PCT there | ||
5 | are 100+ hardware conditions dynamically mapped to upto 32 counters | ||
6 | |||
7 | Note that: | ||
8 | * The ARC 700 PCT does not support interrupts; although HW events may be | ||
9 | counted, the HW events themselves cannot serve as a trigger for a sample. | ||
10 | |||
11 | Required properties: | ||
12 | |||
13 | - compatible : should contain | ||
14 | "snps,arc700-pct" | ||
15 | |||
16 | Example: | ||
17 | |||
18 | pmu { | ||
19 | compatible = "snps,arc700-pct"; | ||
20 | }; | ||
diff --git a/Documentation/devicetree/bindings/arc/pmu.txt b/Documentation/devicetree/bindings/arc/pmu.txt deleted file mode 100644 index 49d517340de3..000000000000 --- a/Documentation/devicetree/bindings/arc/pmu.txt +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | * ARC Performance Monitor Unit | ||
2 | |||
3 | The ARC 700 can be configured with a pipeline performance monitor for counting | ||
4 | CPU and cache events like cache misses and hits. | ||
5 | |||
6 | Note that: | ||
7 | * ARC 700 refers to a family of ARC processor cores; | ||
8 | - There is only one type of PMU available for the whole family; | ||
9 | - The PMU may support different sets of events; supported events are probed | ||
10 | at boot time, as required by the reference manual. | ||
11 | |||
12 | * The ARC 700 PMU does not support interrupts; although HW events may be | ||
13 | counted, the HW events themselves cannot serve as a trigger for a sample. | ||
14 | |||
15 | Required properties: | ||
16 | |||
17 | - compatible : should contain | ||
18 | "snps,arc700-pmu" | ||
19 | |||
20 | Example: | ||
21 | |||
22 | pmu { | ||
23 | compatible = "snps,arc700-pmu"; | ||
24 | }; | ||