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authorGerhard Sittig <gsi@denx.de>2013-11-21 03:41:44 -0500
committerRob Herring <rob.herring@calxeda.com>2013-12-03 01:01:03 -0500
commit2c0e641a963d073d60cb63c24614c642b6f64b21 (patch)
tree9e4538c830a4a583c7c8ccee1f294d5c38c91b26 /Documentation
parent72d944ec7eeb195db96942d5a9f907a312e23313 (diff)
dt: binding: reword PowerPC 8xxx GPIO documentation
re-format and re-word the device tree binding documentation for MPC8xxx and compatibles, reference the common document for interrupt controllers and remove outdated duplicate SoC specific information Cc: Mark Rutland <mark.rutland@arm.com> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <Pawel.Moll@arm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: <devicetree@vger.kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Gerhard Sittig <gsi@denx.de> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/gpio/8xxx_gpio.txt66
1 files changed, 40 insertions, 26 deletions
diff --git a/Documentation/devicetree/bindings/gpio/8xxx_gpio.txt b/Documentation/devicetree/bindings/gpio/8xxx_gpio.txt
index b0019eb5330e..798cfc9d3839 100644
--- a/Documentation/devicetree/bindings/gpio/8xxx_gpio.txt
+++ b/Documentation/devicetree/bindings/gpio/8xxx_gpio.txt
@@ -5,16 +5,42 @@ This is for the non-QE/CPM/GUTs GPIO controllers as found on
5 5
6Every GPIO controller node must have #gpio-cells property defined, 6Every GPIO controller node must have #gpio-cells property defined,
7this information will be used to translate gpio-specifiers. 7this information will be used to translate gpio-specifiers.
8See bindings/gpio/gpio.txt for details of how to specify GPIO
9information for devices.
10
11The GPIO module usually is connected to the SoC's internal interrupt
12controller, see bindings/interrupt-controller/interrupts.txt (the
13interrupt client nodes section) for details how to specify this GPIO
14module's interrupt.
15
16The GPIO module may serve as another interrupt controller (cascaded to
17the SoC's internal interrupt controller). See the interrupt controller
18nodes section in bindings/interrupt-controller/interrupts.txt for
19details.
8 20
9Required properties: 21Required properties:
10- compatible : "fsl,<CHIP>-gpio" followed by "fsl,mpc8349-gpio" for 22- compatible: "fsl,<chip>-gpio" followed by "fsl,mpc8349-gpio"
11 83xx, "fsl,mpc8572-gpio" for 85xx and "fsl,mpc8610-gpio" for 86xx. 23 for 83xx, "fsl,mpc8572-gpio" for 85xx, or
12- #gpio-cells : Should be two. The first cell is the pin number and the 24 "fsl,mpc8610-gpio" for 86xx.
13 second cell is used to specify optional parameters (currently unused). 25- #gpio-cells: Should be two. The first cell is the pin number
14 - interrupts : Interrupt mapping for GPIO IRQ. 26 and the second cell is used to specify optional
15 - interrupt-parent : Phandle for the interrupt controller that 27 parameters (currently unused).
16 services interrupts for this device. 28- interrupt-parent: Phandle for the interrupt controller that
17- gpio-controller : Marks the port as GPIO controller. 29 services interrupts for this device.
30- interrupts: Interrupt mapping for GPIO IRQ.
31- gpio-controller: Marks the port as GPIO controller.
32
33Optional properties:
34- interrupt-controller: Empty boolean property which marks the GPIO
35 module as an IRQ controller.
36- #interrupt-cells: Should be two. Defines the number of integer
37 cells required to specify an interrupt within
38 this interrupt controller. The first cell
39 defines the pin number, the second cell
40 defines additional flags (trigger type,
41 trigger polarity). Note that the available
42 set of trigger conditions supported by the
43 GPIO module depends on the actual SoC.
18 44
19Example of gpio-controller nodes for a MPC8347 SoC: 45Example of gpio-controller nodes for a MPC8347 SoC:
20 46
@@ -22,39 +48,27 @@ Example of gpio-controller nodes for a MPC8347 SoC:
22 #gpio-cells = <2>; 48 #gpio-cells = <2>;
23 compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio"; 49 compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio";
24 reg = <0xc00 0x100>; 50 reg = <0xc00 0x100>;
25 interrupts = <74 0x8>;
26 interrupt-parent = <&ipic>; 51 interrupt-parent = <&ipic>;
52 interrupts = <74 0x8>;
27 gpio-controller; 53 gpio-controller;
54 interrupt-controller;
55 #interrupt-cells = <2>;
28 }; 56 };
29 57
30 gpio2: gpio-controller@d00 { 58 gpio2: gpio-controller@d00 {
31 #gpio-cells = <2>; 59 #gpio-cells = <2>;
32 compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio"; 60 compatible = "fsl,mpc8347-gpio", "fsl,mpc8349-gpio";
33 reg = <0xd00 0x100>; 61 reg = <0xd00 0x100>;
34 interrupts = <75 0x8>;
35 interrupt-parent = <&ipic>; 62 interrupt-parent = <&ipic>;
63 interrupts = <75 0x8>;
36 gpio-controller; 64 gpio-controller;
37 }; 65 };
38 66
39See booting-without-of.txt for details of how to specify GPIO 67Example of a peripheral using the GPIO module as an IRQ controller:
40information for devices.
41
42To use GPIO pins as interrupt sources for peripherals, specify the
43GPIO controller as the interrupt parent and define GPIO number +
44trigger mode using the interrupts property, which is defined like
45this:
46
47interrupts = <number trigger>, where:
48 - number: GPIO pin (0..31)
49 - trigger: trigger mode:
50 2 = trigger on falling edge
51 3 = trigger on both edges
52
53Example of device using this is:
54 68
55 funkyfpga@0 { 69 funkyfpga@0 {
56 compatible = "funky-fpga"; 70 compatible = "funky-fpga";
57 ... 71 ...
58 interrupts = <4 3>;
59 interrupt-parent = <&gpio1>; 72 interrupt-parent = <&gpio1>;
73 interrupts = <4 3>;
60 }; 74 };