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authorChristoffer Dall <christoffer.dall@linaro.org>2013-09-23 17:55:56 -0400
committerChristoffer Dall <christoffer.dall@linaro.org>2013-12-21 13:01:22 -0500
commitce01e4e8874d410738f4b4733b26642d6611a331 (patch)
treef58e80efb4fc588858f4c16e48dec45659cb5048 /Documentation/virtual/kvm/devices
parent7330672befe6269e575f79b924a7068b26c144b4 (diff)
KVM: arm-vgic: Set base addr through device API
Support setting the distributor and cpu interface base addresses in the VM physical address space through the KVM_{SET,GET}_DEVICE_ATTR API in addition to the ARM specific API. This has the added benefit of being able to share more code in user space and do things in a uniform manner. Also deprecate the older API at the same time, but backwards compatibility will be maintained. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Diffstat (limited to 'Documentation/virtual/kvm/devices')
-rw-r--r--Documentation/virtual/kvm/devices/arm-vgic.txt11
1 files changed, 11 insertions, 0 deletions
diff --git a/Documentation/virtual/kvm/devices/arm-vgic.txt b/Documentation/virtual/kvm/devices/arm-vgic.txt
index 38f27f709a99..c9febb2a0c3e 100644
--- a/Documentation/virtual/kvm/devices/arm-vgic.txt
+++ b/Documentation/virtual/kvm/devices/arm-vgic.txt
@@ -8,3 +8,14 @@ Only one VGIC instance may be instantiated through either this API or the
8legacy KVM_CREATE_IRQCHIP api. The created VGIC will act as the VM interrupt 8legacy KVM_CREATE_IRQCHIP api. The created VGIC will act as the VM interrupt
9controller, requiring emulated user-space devices to inject interrupts to the 9controller, requiring emulated user-space devices to inject interrupts to the
10VGIC instead of directly to CPUs. 10VGIC instead of directly to CPUs.
11
12Groups:
13 KVM_DEV_ARM_VGIC_GRP_ADDR
14 Attributes:
15 KVM_VGIC_V2_ADDR_TYPE_DIST (rw, 64-bit)
16 Base address in the guest physical address space of the GIC distributor
17 register mappings.
18
19 KVM_VGIC_V2_ADDR_TYPE_CPU (rw, 64-bit)
20 Base address in the guest physical address space of the GIC virtual cpu
21 interface register mappings.