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authorMihai Caraman <mihai.caraman@freescale.com>2013-04-10 20:03:10 -0400
committerAlexander Graf <agraf@suse.de>2013-04-26 14:27:07 -0400
commit307d9008ed4f28920e0e78719e10d0f407341e00 (patch)
treefeb54a2bb563bd85e6b56126dc8079c3abadb923 /Documentation/virtual/kvm/api.txt
parent8893a188b13160ee4b228fab02d802cf4f0a3e78 (diff)
KVM: PPC: e500: Add support for TLBnPS registers
Add support for TLBnPS registers available in MMU Architecture Version (MAV) 2.0. Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'Documentation/virtual/kvm/api.txt')
-rw-r--r--Documentation/virtual/kvm/api.txt4
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt
index 1a766637ac21..f045377ae5a0 100644
--- a/Documentation/virtual/kvm/api.txt
+++ b/Documentation/virtual/kvm/api.txt
@@ -1803,6 +1803,10 @@ registers, find a list below:
1803 PPC | KVM_REG_PPC_TLB1CFG | 32 1803 PPC | KVM_REG_PPC_TLB1CFG | 32
1804 PPC | KVM_REG_PPC_TLB2CFG | 32 1804 PPC | KVM_REG_PPC_TLB2CFG | 32
1805 PPC | KVM_REG_PPC_TLB3CFG | 32 1805 PPC | KVM_REG_PPC_TLB3CFG | 32
1806 PPC | KVM_REG_PPC_TLB0PS | 32
1807 PPC | KVM_REG_PPC_TLB1PS | 32
1808 PPC | KVM_REG_PPC_TLB2PS | 32
1809 PPC | KVM_REG_PPC_TLB3PS | 32
1806 1810
1807ARM registers are mapped using the lower 32 bits. The upper 16 of that 1811ARM registers are mapped using the lower 32 bits. The upper 16 of that
1808is the register group type, or coprocessor number: 1812is the register group type, or coprocessor number: