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authorVernon Sauder <vernoninhand@gmail.com>2008-10-16 01:02:43 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-10-16 14:21:38 -0400
commitf1f640a9c1d97a1a131879ab1efe3766443904d7 (patch)
treea31853ea036cf9d0f42310ca60b555fe31b886e1 /Documentation/spi/pxa2xx
parent65a00a20655f4929c4991017e230175f61c8f052 (diff)
pxa2xx_spi: fix chip_info defaults and documentation.
Make the chip info structure data optional by providing reasonable defaults. Improve corresponding documentation, and highlight the drawback of not providing explicit chipselect control. DMA can determine appropriate dma_burst_size and thresholds automatically so use DMA even if dma_burst_size is not specified. Signed-off-by: Vernon Sauder <VernonInHand@gmail.com> Reviewed-by: Ned Forrester <nforrester@whoi.edu> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'Documentation/spi/pxa2xx')
-rw-r--r--Documentation/spi/pxa2xx34
1 files changed, 23 insertions, 11 deletions
diff --git a/Documentation/spi/pxa2xx b/Documentation/spi/pxa2xx
index bbe8dee681a5..6bb916d57c95 100644
--- a/Documentation/spi/pxa2xx
+++ b/Documentation/spi/pxa2xx
@@ -96,7 +96,7 @@ Each slave device attached to the PXA must provide slave specific configuration
96information via the structure "pxa2xx_spi_chip" found in 96information via the structure "pxa2xx_spi_chip" found in
97"arch/arm/mach-pxa/include/mach/pxa2xx_spi.h". The pxa2xx_spi master controller driver 97"arch/arm/mach-pxa/include/mach/pxa2xx_spi.h". The pxa2xx_spi master controller driver
98will uses the configuration whenever the driver communicates with the slave 98will uses the configuration whenever the driver communicates with the slave
99device. 99device. All fields are optional.
100 100
101struct pxa2xx_spi_chip { 101struct pxa2xx_spi_chip {
102 u8 tx_threshold; 102 u8 tx_threshold;
@@ -112,14 +112,17 @@ used to configure the SSP hardware fifo. These fields are critical to the
112performance of pxa2xx_spi driver and misconfiguration will result in rx 112performance of pxa2xx_spi driver and misconfiguration will result in rx
113fifo overruns (especially in PIO mode transfers). Good default values are 113fifo overruns (especially in PIO mode transfers). Good default values are
114 114
115 .tx_threshold = 12, 115 .tx_threshold = 8,
116 .rx_threshold = 4, 116 .rx_threshold = 8,
117
118The range is 1 to 16 where zero indicates "use default".
117 119
118The "pxa2xx_spi_chip.dma_burst_size" field is used to configure PXA2xx DMA 120The "pxa2xx_spi_chip.dma_burst_size" field is used to configure PXA2xx DMA
119engine and is related the "spi_device.bits_per_word" field. Read and understand 121engine and is related the "spi_device.bits_per_word" field. Read and understand
120the PXA2xx "Developer Manual" sections on the DMA controller and SSP Controllers 122the PXA2xx "Developer Manual" sections on the DMA controller and SSP Controllers
121to determine the correct value. An SSP configured for byte-wide transfers would 123to determine the correct value. An SSP configured for byte-wide transfers would
122use a value of 8. 124use a value of 8. The driver will determine a reasonable default if
125dma_burst_size == 0.
123 126
124The "pxa2xx_spi_chip.timeout" fields is used to efficiently handle 127The "pxa2xx_spi_chip.timeout" fields is used to efficiently handle
125trailing bytes in the SSP receiver fifo. The correct value for this field is 128trailing bytes in the SSP receiver fifo. The correct value for this field is
@@ -137,7 +140,13 @@ function for asserting/deasserting a slave device chip select. If the field is
137NULL, the pxa2xx_spi master controller driver assumes that the SSP port is 140NULL, the pxa2xx_spi master controller driver assumes that the SSP port is
138configured to use SSPFRM instead. 141configured to use SSPFRM instead.
139 142
140NSSP SALVE SAMPLE 143NOTE: the SPI driver cannot control the chip select if SSPFRM is used, so the
144chipselect is dropped after each spi_transfer. Most devices need chip select
145asserted around the complete message. Use SSPFRM as a GPIO (through cs_control)
146to accomodate these chips.
147
148
149NSSP SLAVE SAMPLE
141----------------- 150-----------------
142The pxa2xx_spi_chip structure is passed to the pxa2xx_spi driver in the 151The pxa2xx_spi_chip structure is passed to the pxa2xx_spi driver in the
143"spi_board_info.controller_data" field. Below is a sample configuration using 152"spi_board_info.controller_data" field. Below is a sample configuration using
@@ -206,18 +215,21 @@ static void __init streetracer_init(void)
206 215
207DMA and PIO I/O Support 216DMA and PIO I/O Support
208----------------------- 217-----------------------
209The pxa2xx_spi driver support both DMA and interrupt driven PIO message 218The pxa2xx_spi driver supports both DMA and interrupt driven PIO message
210transfers. The driver defaults to PIO mode and DMA transfers must enabled by 219transfers. The driver defaults to PIO mode and DMA transfers must be enabled
211setting the "enable_dma" flag in the "pxa2xx_spi_master" structure and 220by setting the "enable_dma" flag in the "pxa2xx_spi_master" structure. The DMA
212ensuring that the "pxa2xx_spi_chip.dma_burst_size" field is non-zero. The DMA 221mode supports both coherent and stream based DMA mappings.
213mode support both coherent and stream based DMA mappings.
214 222
215The following logic is used to determine the type of I/O to be used on 223The following logic is used to determine the type of I/O to be used on
216a per "spi_transfer" basis: 224a per "spi_transfer" basis:
217 225
218if !enable_dma or dma_burst_size == 0 then 226if !enable_dma then
219 always use PIO transfers 227 always use PIO transfers
220 228
229if spi_message.len > 8191 then
230 print "rate limited" warning
231 use PIO transfers
232
221if spi_message.is_dma_mapped and rx_dma_buf != 0 and tx_dma_buf != 0 then 233if spi_message.is_dma_mapped and rx_dma_buf != 0 and tx_dma_buf != 0 then
222 use coherent DMA mode 234 use coherent DMA mode
223 235