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authorLinus Torvalds <torvalds@linux-foundation.org>2014-06-11 11:35:34 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2014-06-11 11:35:34 -0400
commite413a19a8ef49ae3b76310bb569dabe66b22f5a3 (patch)
treef171d40fd0ec69296458173d7ec470339f93f53b /Documentation/mtd
parent8d0304e69dc960ae7683943ac5b9c4c685d409d7 (diff)
parentf1900c79633e9ed757319e63aefb8e29443ea35e (diff)
Merge tag 'for-linus-20140610' of git://git.infradead.org/linux-mtd
Pull MTD updates from Brian Norris: - refactor m25p80.c driver for use as a general SPI NOR framework for other drivers which may speak to SPI NOR flash without providing full SPI support (i.e., not part of drivers/spi/) - new Freescale QuadSPI driver (utilizing new SPI NOR framework) - updates for the STMicro "FSM" SPI NOR driver - fix sync/flush behavior on mtd_blkdevs - fixup subpage write support on a few NAND drivers - correct the MTD OOB test for odd-sized OOB areas - add BCH-16 support for OMAP NAND - fix warnings and trivial refactoring - utilize new ECC DT bindings in pxa3xx NAND driver - new LPDDR NVM driver - address a few assorted bugs caught by Coverity - add new imx6sx support for GPMI NAND - use a bounce buffer for NAND when non-DMA-able buffers are used * tag 'for-linus-20140610' of git://git.infradead.org/linux-mtd: (77 commits) mtd: gpmi: add gpmi support for imx6sx mtd: maps: remove check for CONFIG_MTD_SUPERH_RESERVE mtd: bf5xx_nand: use the managed version of kzalloc mtd: pxa3xx_nand: make the driver work on big-endian systems mtd: nand: omap: fix omap_calculate_ecc_bch() for-loop error mtd: nand: r852: correct write_buf loop bounds mtd: nand_bbt: handle error case for nand_create_badblock_pattern() mtd: nand_bbt: remove unused variable mtd: maps: sc520cdp: fix warnings mtd: slram: fix unused variable warning mtd: pfow: remove unused variable mtd: lpddr: fix Kconfig dependency, for I/O accessors mtd: nand: pxa3xx: Add supported ECC strength and step size to the DT binding mtd: nand: pxa3xx: Use ECC strength and step size devicetree binding mtd: nand: pxa3xx: Clean pxa_ecc_init() error handling mtd: nand: Warn the user if the selected ECC strength is too weak mtd: nand: omap: Documentation: How to select correct ECC scheme for your device ? mtd: nand: omap: add support for BCH16_ECC - NAND driver updates mtd: nand: omap: add support for BCH16_ECC - ELM driver updates mtd: nand: omap: add support for BCH16_ECC - GPMC driver updates ...
Diffstat (limited to 'Documentation/mtd')
-rw-r--r--Documentation/mtd/spi-nor.txt62
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1 SPI NOR framework
2 ============================================
3
4Part I - Why do we need this framework?
5---------------------------------------
6
7SPI bus controllers (drivers/spi/) only deal with streams of bytes; the bus
8controller operates agnostic of the specific device attached. However, some
9controllers (such as Freescale's QuadSPI controller) cannot easily handle
10arbitrary streams of bytes, but rather are designed specifically for SPI NOR.
11
12In particular, Freescale's QuadSPI controller must know the NOR commands to
13find the right LUT sequence. Unfortunately, the SPI subsystem has no notion of
14opcodes, addresses, or data payloads; a SPI controller simply knows to send or
15receive bytes (Tx and Rx). Therefore, we must define a new layering scheme under
16which the controller driver is aware of the opcodes, addressing, and other
17details of the SPI NOR protocol.
18
19Part II - How does the framework work?
20--------------------------------------
21
22This framework just adds a new layer between the MTD and the SPI bus driver.
23With this new layer, the SPI NOR controller driver does not depend on the
24m25p80 code anymore.
25
26 Before this framework, the layer is like:
27
28 MTD
29 ------------------------
30 m25p80
31 ------------------------
32 SPI bus driver
33 ------------------------
34 SPI NOR chip
35
36 After this framework, the layer is like:
37 MTD
38 ------------------------
39 SPI NOR framework
40 ------------------------
41 m25p80
42 ------------------------
43 SPI bus driver
44 ------------------------
45 SPI NOR chip
46
47 With the SPI NOR controller driver (Freescale QuadSPI), it looks like:
48 MTD
49 ------------------------
50 SPI NOR framework
51 ------------------------
52 fsl-quadSPI
53 ------------------------
54 SPI NOR chip
55
56Part III - How can drivers use the framework?
57---------------------------------------------
58
59The main API is spi_nor_scan(). Before you call the hook, a driver should
60initialize the necessary fields for spi_nor{}. Please see
61drivers/mtd/spi-nor/spi-nor.c for detail. Please also refer to fsl-quadspi.c
62when you want to write a new driver for a SPI NOR controller.