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authorLaxman Dewangan <ldewangan@nvidia.com>2012-11-13 00:03:40 -0500
committerStephen Warren <swarren@nvidia.com>2012-11-13 13:42:39 -0500
commite245f54a06f6aeb025b50eb02c2969fb4e254b46 (patch)
tree80d0b328e16f137ab0ea3cc86d736efe335441ed /Documentation/kdump
parentca3d241cb2974852192bdeb896bf5e2c46463286 (diff)
ARM: tegra: Add OF_DEV_AUXDATA for sflash driver in board dt
Add OF_DEV_AUXDATA for sflash controller driver for Tegra20 board dt files. Set the parent clock of sflash controller to PLLP and configure clock to 20MHz. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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