diff options
author | Thierry Reding <treding@nvidia.com> | 2014-02-28 10:57:34 -0500 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2014-06-05 17:09:21 -0400 |
commit | fb50a116bbbc25c7c11e00e6d10a53b9ec3c38e8 (patch) | |
tree | 8f37152a6ed2b59aa407245a7dffa3d509a65919 /Documentation/devicetree | |
parent | 0444c0ff3cef9f99b19bbb1f0b3f5d7a22daab25 (diff) |
drm/tegra: hdmi - Add connector supply support
Revert commit 18ebc0f404d5 "drm/tegra: hdmi: Enable VDD earlier for
hotplug/DDC" and instead add a new supply for the +5V pin on the HDMI
connector.
The vdd-supply property refers to the regulator that supplies the
AVDD_HDMI input on Tegra, rather than the +5V HDMI connector pin. This
was never a problem before, because all boards had that pin hooked up to
a regulator that was always on. Starting with Dalmore and continuing
with Venice2, the +5V pin is controllable via a GPIO. For reasons
unknown, the GPIO ended up as the controlling GPIO of the AVDD_HDMI
supply in the Dalmore and Venice2 DTS files. But that's not correct.
Instead, a separate supply must be introduced so that the +5V pin can be
controlled separately from the supplies that feed the HDMI block within
Tegra.
A new hdmi-supply property is introduced that takes the place of the
vdd-supply and vdd-supply is only enabled when HDMI is enabled rather
than all the time.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r-- | Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt index efa8b8451f93..f13a6b8263d3 100644 --- a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt +++ b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt | |||
@@ -136,6 +136,7 @@ of the following host1x client modules: | |||
136 | - compatible: "nvidia,tegra<chip>-hdmi" | 136 | - compatible: "nvidia,tegra<chip>-hdmi" |
137 | - reg: Physical base address and length of the controller's registers. | 137 | - reg: Physical base address and length of the controller's registers. |
138 | - interrupts: The interrupt outputs from the controller. | 138 | - interrupts: The interrupt outputs from the controller. |
139 | - hdmi-supply: supply for the +5V HDMI connector pin | ||
139 | - vdd-supply: regulator for supply voltage | 140 | - vdd-supply: regulator for supply voltage |
140 | - pll-supply: regulator for PLL | 141 | - pll-supply: regulator for PLL |
141 | - clocks: Must contain an entry for each entry in clock-names. | 142 | - clocks: Must contain an entry for each entry in clock-names. |