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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-10-17 12:40:52 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-10-17 12:40:52 -0400
commite13cef8ded69e469b56e150e30619693b91b1864 (patch)
tree6848fd484b7d0e42c235ac54290f72dfde45d9ad /Documentation/devicetree
parentb762799dd8b03ec0aafc54ba165564902eac3e18 (diff)
parente086ed76671252d5b539854a83f8506be7bea05c (diff)
Merge tag 'iio-fixes-for-3.12c' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-linus
Jonathan writes: Third set of IIO fixes for the 3.12 cycle. Two little ones this time: 1) A missing clk_unprepare in adf4350. 2) A missing free of the active_scan_mask when iio_disable_all_buffers is called during an unexpected device removal. This leak was introduced by the fix a87c82e454f184a9473f8cdfd4d304205f585f65 iio: Stop sampling when the device is removed and hence is a regression fix.
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/mmc/tmio_mmc.txt17
-rw-r--r--Documentation/devicetree/bindings/net/fsl-tsec-phy.txt18
2 files changed, 27 insertions, 8 deletions
diff --git a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
index df204e18e030..6a2a1160a70d 100644
--- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
+++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
@@ -9,12 +9,15 @@ compulsory and any optional properties, common to all SD/MMC drivers, as
9described in mmc.txt, can be used. Additionally the following tmio_mmc-specific 9described in mmc.txt, can be used. Additionally the following tmio_mmc-specific
10optional bindings can be used. 10optional bindings can be used.
11 11
12Required properties:
13- compatible: "renesas,sdhi-shmobile" - a generic sh-mobile SDHI unit
14 "renesas,sdhi-sh7372" - SDHI IP on SH7372 SoC
15 "renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
16 "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
17 "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
18 "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
19 "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
20 "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
21
12Optional properties: 22Optional properties:
13- toshiba,mmc-wrprotect-disable: write-protect detection is unavailable 23- toshiba,mmc-wrprotect-disable: write-protect detection is unavailable
14
15When used with Renesas SDHI hardware, the following compatibility strings
16configure various model-specific properties:
17
18"renesas,sh7372-sdhi": (default) compatible with SH7372
19"renesas,r8a7740-sdhi": compatible with R8A7740: certain MMC/SD commands have to
20 wait for the interface to become idle.
diff --git a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
index 2c6be0377f55..d2ea4605d078 100644
--- a/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
+++ b/Documentation/devicetree/bindings/net/fsl-tsec-phy.txt
@@ -86,6 +86,7 @@ General Properties:
86 86
87Clock Properties: 87Clock Properties:
88 88
89 - fsl,cksel Timer reference clock source.
89 - fsl,tclk-period Timer reference clock period in nanoseconds. 90 - fsl,tclk-period Timer reference clock period in nanoseconds.
90 - fsl,tmr-prsc Prescaler, divides the output clock. 91 - fsl,tmr-prsc Prescaler, divides the output clock.
91 - fsl,tmr-add Frequency compensation value. 92 - fsl,tmr-add Frequency compensation value.
@@ -97,7 +98,7 @@ Clock Properties:
97 clock. You must choose these carefully for the clock to work right. 98 clock. You must choose these carefully for the clock to work right.
98 Here is how to figure good values: 99 Here is how to figure good values:
99 100
100 TimerOsc = system clock MHz 101 TimerOsc = selected reference clock MHz
101 tclk_period = desired clock period nanoseconds 102 tclk_period = desired clock period nanoseconds
102 NominalFreq = 1000 / tclk_period MHz 103 NominalFreq = 1000 / tclk_period MHz
103 FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0) 104 FreqDivRatio = TimerOsc / NominalFreq (must be greater that 1.0)
@@ -114,6 +115,20 @@ Clock Properties:
114 Pulse Per Second (PPS) signal, since this will be offered to the PPS 115 Pulse Per Second (PPS) signal, since this will be offered to the PPS
115 subsystem to synchronize the Linux clock. 116 subsystem to synchronize the Linux clock.
116 117
118 Reference clock source is determined by the value, which is holded
119 in CKSEL bits in TMR_CTRL register. "fsl,cksel" property keeps the
120 value, which will be directly written in those bits, that is why,
121 according to reference manual, the next clock sources can be used:
122
123 <0> - external high precision timer reference clock (TSEC_TMR_CLK
124 input is used for this purpose);
125 <1> - eTSEC system clock;
126 <2> - eTSEC1 transmit clock;
127 <3> - RTC clock input.
128
129 When this attribute is not used, eTSEC system clock will serve as
130 IEEE 1588 timer reference clock.
131
117Example: 132Example:
118 133
119 ptp_clock@24E00 { 134 ptp_clock@24E00 {
@@ -121,6 +136,7 @@ Example:
121 reg = <0x24E00 0xB0>; 136 reg = <0x24E00 0xB0>;
122 interrupts = <12 0x8 13 0x8>; 137 interrupts = <12 0x8 13 0x8>;
123 interrupt-parent = < &ipic >; 138 interrupt-parent = < &ipic >;
139 fsl,cksel = <1>;
124 fsl,tclk-period = <10>; 140 fsl,tclk-period = <10>;
125 fsl,tmr-prsc = <100>; 141 fsl,tmr-prsc = <100>;
126 fsl,tmr-add = <0x999999A4>; 142 fsl,tmr-add = <0x999999A4>;