Merge tag 'davinci-for-v3.10/dt-2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt2

From Sekhar Nori:
v3.10 DT updates for DaVinci

This set of patches adds support for PWMs and SPI
controller present on DA850 and for SPI flash present on
DA850 EVM.

* tag 'davinci-for-v3.10/dt-2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: davinci: da850-evm: add SPI flash support
  ARM: davinci: da850: override SPI DT node device name
  ARM: davinci: da850: add SPI1 DT node
  spi/davinci: add DT binding documentation
  spi/davinci: no wildcards in DT compatible property
  ARM: davinci: da850: add EHRPWM & ECAP DT node
  ARM: davinci: da850: override mmc DT node device name
  ARM: davinci: da850: add mmc DT entries
  mmc: davinci_mmc: add DT support
  ARM: davinci: da850: add tps6507x regulator DT data
  ARM: regulator: add tps6507x device tree data
  ARM: davinci: remove test for undefined Kconfig macro
  ARM: davinci: mmc: derive version information from device name
  ARM: davinci: da850: add ECAP & EHRPWM clock nodes
  ARM: davinci: clk framework support for enable/disable functionality

Signed-off-by: Olof Johansson <olof@lixom.net>

2 files changed, 84 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/mmc/davinci_mmc.txt b/Documentation/devicetree/bindings/mmc/davinci_mmc.txt
new file mode 100644
index 000000000000..e5a0140b2381
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/davinci_mmc.txt
@@ -0,0 +1,33 @@
+* TI Highspeed MMC host controller for DaVinci
+
+The Highspeed MMC Host Controller on TI DaVinci family
+provides an interface for MMC, SD and SDIO types of memory cards.
+
+This file documents the properties used by the davinci_mmc driver.
+
+Required properties:
+- compatible:
+ Should be "ti,da830-mmc": for da830, da850, dm365
+ Should be "ti,dm355-mmc": for dm355, dm644x
+
+Optional properties:
+- bus-width: Number of data lines, can be <1>, <4>, or <8>, default <1>
+- max-frequency: Maximum operating clock frequency, default 25MHz.
+- dmas: List of DMA specifiers with the controller specific format
+        as described in the generic DMA client binding. A tx and rx
+        specifier is required.
+- dma-names: RX and TX  DMA request names. These strings correspond
+        1:1 with the DMA specifiers listed in dmas.
+
+Example:
+mmc0: mmc@1c40000 {
+        compatible = "ti,da830-mmc",
+        reg = <0x40000 0x1000>;
+        interrupts = <16>;
+        status = "okay";
+        bus-width = <4>;
+        max-frequency = <50000000>;
+        dmas = <&edma 16
+                &edma 17>;
+        dma-names = "rx", "tx";
+};
diff --git a/Documentation/devicetree/bindings/spi/spi-davinci.txt b/Documentation/devicetree/bindings/spi/spi-davinci.txt
new file mode 100644
index 000000000000..6d0ac8d0ad9b
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-davinci.txt
@@ -0,0 +1,51 @@
+Davinci SPI controller device bindings
+
+Required properties:
+- #address-cells: number of cells required to define a chip select
+        address on the SPI bus. Should be set to 1.
+- #size-cells: should be zero.
+- compatible:
+        - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
+        - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
+- reg: Offset and length of SPI controller register space
+- num-cs: Number of chip selects
+- ti,davinci-spi-intr-line: interrupt line used to connect the SPI
+        IP to the interrupt controller within the SoC. Possible values
+        are 0 and 1. Manual says one of the two possible interrupt
+        lines can be tied to the interrupt controller. Set this
+        based on a specifc SoC configuration.
+- interrupts: interrupt number mapped to CPU.
+- clocks: spi clk phandle
+
+Example of a NOR flash slave device (n25q032) connected to DaVinci
+SPI controller device over the SPI bus.
+
+spi0:spi@20BF0000 {
+        #address-cells                  = <1>;
+        #size-cells                     = <0>;
+        compatible                      = "ti,dm6446-spi";
+        reg                             = <0x20BF0000 0x1000>;
+        num-cs                          = <4>;
+        ti,davinci-spi-intr-line        = <0>;
+        interrupts                      = <338>;
+        clocks                          = <&clkspi>;
+
+        flash: n25q032@0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "st,m25p32";
+                spi-max-frequency = <25000000>;
+                reg = <0>;
+
+                partition@0 {
+                        label = "u-boot-spl";
+                        reg = <0x0 0x80000>;
+                        read-only;
+                };
+
+                partition@1 {
+                        label = "test";
+                        reg = <0x80000 0x380000>;
+                };
+        };
+};