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authorJohn Crispin <blogic@openwrt.org>2012-05-16 16:17:38 -0400
committerRalf Baechle <ralf@linux-mips.org>2012-05-21 09:31:53 -0400
commita36e9a1c5fa67cdc965fe011f1d04317adb35953 (patch)
tree8fc82e50f53c718c0e12785fb63f3fbeb270b383 /Documentation/devicetree
parent5238f7bc356670ba702057c7de7f07909133f788 (diff)
GPIO: MIPS: lantiq: convert gpio-mm-lantiq to OF and of_mm_gpio
Implements OF support and convert to of_mm_gpio. By attaching hardware latches to the External Bus Unit (EBU) on Lantiq SoC, it is possible to create output only gpios. This driver configures a special memory address, which when written to, outputs 16 bit to the latches. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Acked-by: Grant Likely <grant.likely@secretlab.ca> Patchwork: https://patchwork.linux-mips.org/patch/3840/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-mm-lantiq.txt38
1 files changed, 38 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mm-lantiq.txt b/Documentation/devicetree/bindings/gpio/gpio-mm-lantiq.txt
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1Lantiq SoC External Bus memory mapped GPIO controller
2
3By attaching hardware latches to the EBU it is possible to create output
4only gpios. This driver configures a special memory address, which when
5written to outputs 16 bit to the latches.
6
7The node describing the memory mapped GPIOs needs to be a child of the node
8describing the "lantiq,localbus".
9
10Required properties:
11- compatible : Should be "lantiq,gpio-mm-lantiq"
12- reg : Address and length of the register set for the device
13- #gpio-cells : Should be two. The first cell is the pin number and
14 the second cell is used to specify optional parameters (currently
15 unused).
16- gpio-controller : Marks the device node as a gpio controller.
17
18Optional properties:
19- lantiq,shadow : The default value that we shall assume as already set on the
20 shift register cascade.
21
22Example:
23
24localbus@0 {
25 #address-cells = <2>;
26 #size-cells = <1>;
27 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
28 1 0 0x4000000 0x4000010>; /* addsel1 */
29 compatible = "lantiq,localbus", "simple-bus";
30
31 gpio_mm0: gpio@4000000 {
32 compatible = "lantiq,gpio-mm";
33 reg = <1 0x0 0x10>;
34 gpio-controller;
35 #gpio-cells = <2>;
36 lantiq,shadow = <0x77f>
37 };
38}