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authorLinus Torvalds <torvalds@linux-foundation.org>2015-04-22 14:22:55 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2015-04-22 14:22:55 -0400
commit7dcca3e92a34bf8ffdc4c01a49182ce1cb6ff534 (patch)
tree4886858a740aff0c993a8110add73d749e79b5aa /Documentation/devicetree
parentb9bb6fb73b3e112d241a5edd146740be9a0c3cc0 (diff)
parentcf82f52d3619d2e15c83ec9a03c6ce8cdf6c6b58 (diff)
Merge git://www.linux-watchdog.org/linux-watchdog
Pull watchdog updates from Wim Van Sebroeck: "This contains following changes: - Octeon: convert to watchdog-API and apply some fixes - Cadence wdt: remove dependency on ARCH - add DT bindings for qcom + msm - bcm281xx: Remove use of seq_printf return value - stmp3xxx_rtc_wdt + pnx4008_wdt: fix broken email addresses" * git://www.linux-watchdog.org/linux-watchdog: watchdog: stmp3xxx_rtc_wdt: fix broken email address watchdog: pnx4008_wdt: fix broken email address watchdog: octeon: use fixed length string for register names watchdog: octeon: fix some trivial coding style issues watchdog: octeon: convert to WATCHDOG_CORE API watchdog: cadence: Remove Kconfig dependency on ARCH ARM: msm: add watchdog entries to DT timer binding doc ARM: qcom: add description of KPSS WDT for IPQ8064 watchdog: qcom: use timer devicetree binding watchdog: bcm281xx: Remove use of seq_printf return value
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/arm/msm/timer.txt16
1 files changed, 13 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/arm/msm/timer.txt b/Documentation/devicetree/bindings/arm/msm/timer.txt
index 74607b6c1117..5e10c345548f 100644
--- a/Documentation/devicetree/bindings/arm/msm/timer.txt
+++ b/Documentation/devicetree/bindings/arm/msm/timer.txt
@@ -9,11 +9,17 @@ Properties:
9 "qcom,scss-timer" - scorpion subsystem 9 "qcom,scss-timer" - scorpion subsystem
10 10
11- interrupts : Interrupts for the debug timer, the first general purpose 11- interrupts : Interrupts for the debug timer, the first general purpose
12 timer, and optionally a second general purpose timer in that 12 timer, and optionally a second general purpose timer, and
13 order. 13 optionally as well, 2 watchdog interrupts, in that order.
14 14
15- reg : Specifies the base address of the timer registers. 15- reg : Specifies the base address of the timer registers.
16 16
17- clocks: Reference to the parent clocks, one per output clock. The parents
18 must appear in the same order as the clock names.
19
20- clock-names: The name of the clocks as free-form strings. They should be in
21 the same order as the clocks.
22
17- clock-frequency : The frequency of the debug timer and the general purpose 23- clock-frequency : The frequency of the debug timer and the general purpose
18 timer(s) in Hz in that order. 24 timer(s) in Hz in that order.
19 25
@@ -29,9 +35,13 @@ Example:
29 compatible = "qcom,scss-timer", "qcom,msm-timer"; 35 compatible = "qcom,scss-timer", "qcom,msm-timer";
30 interrupts = <1 1 0x301>, 36 interrupts = <1 1 0x301>,
31 <1 2 0x301>, 37 <1 2 0x301>,
32 <1 3 0x301>; 38 <1 3 0x301>,
39 <1 4 0x301>,
40 <1 5 0x301>;
33 reg = <0x0200a000 0x100>; 41 reg = <0x0200a000 0x100>;
34 clock-frequency = <19200000>, 42 clock-frequency = <19200000>,
35 <32768>; 43 <32768>;
44 clocks = <&sleep_clk>;
45 clock-names = "sleep";
36 cpu-offset = <0x40000>; 46 cpu-offset = <0x40000>;
37 }; 47 };