aboutsummaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings
diff options
context:
space:
mode:
authorStephen Warren <swarren@nvidia.com>2013-12-11 18:39:59 -0500
committerStephen Warren <swarren@nvidia.com>2013-12-11 18:39:59 -0500
commite9827d9be9777cf287dd1340e6e7a8526f9e0b70 (patch)
tree1b77b0cbf8237c6cee9b4b2b43dea317d2f74dce /Documentation/devicetree/bindings
parentf229a93051c967e38850f0c213a0bf945e7c3c12 (diff)
parent62ce7cd62f534023224912dc9b909963f26a38da (diff)
Merge tag 'clk-tegra-for-3.14' into for-3.14/dmas-resets-rework
Tegra clk branch for 3.14
Diffstat (limited to 'Documentation/devicetree/bindings')
-rw-r--r--Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt59
1 files changed, 59 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
new file mode 100644
index 000000000000..1a91ec60dee5
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
@@ -0,0 +1,59 @@
1NVIDIA Tegra124 Clock And Reset Controller
2
3This binding uses the common clock binding:
4Documentation/devicetree/bindings/clock/clock-bindings.txt
5
6The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
7for muxing and gating Tegra's clocks, and setting their rates.
8
9Required properties :
10- compatible : Should be "nvidia,tegra124-car"
11- reg : Should contain CAR registers location and length
12- clocks : Should contain phandle and clock specifiers for two clocks:
13 the 32 KHz "32k_in", and the board-specific oscillator "osc".
14- #clock-cells : Should be 1.
15 In clock consumers, this cell represents the clock ID exposed by the
16 CAR. The assignments may be found in header file
17 <dt-bindings/clock/tegra124-car.h>.
18
19Example SoC include file:
20
21/ {
22 tegra_car: clock {
23 compatible = "nvidia,tegra124-car";
24 reg = <0x60006000 0x1000>;
25 #clock-cells = <1>;
26 };
27
28 usb@c5004000 {
29 clocks = <&tegra_car TEGRA124_CLK_USB2>;
30 };
31};
32
33Example board file:
34
35/ {
36 clocks {
37 compatible = "simple-bus";
38 #address-cells = <1>;
39 #size-cells = <0>;
40
41 osc: clock@0 {
42 compatible = "fixed-clock";
43 reg = <0>;
44 #clock-cells = <0>;
45 clock-frequency = <112400000>;
46 };
47
48 clk_32k: clock@1 {
49 compatible = "fixed-clock";
50 reg = <1>;
51 #clock-cells = <0>;
52 clock-frequency = <32768>;
53 };
54 };
55
56 &tegra_car {
57 clocks = <&clk_32k> <&osc>;
58 };
59};