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authorFrank Rowand <frank.rowand@sonymobile.com>2014-11-14 17:07:15 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-11-24 14:28:23 -0500
commitbbac3297c6712f061853e3e11d5e21aa4164968f (patch)
tree6c82f3f6a1142ebf4e68751a3e655e38095da107 /Documentation/devicetree/bindings
parent7920408b0c8292831f064ea33f56aa307b221a2c (diff)
tty: serial: msm_serial: document DT alias
Update devicetree binding for msm_serial to reflect msm_serial_probe() getting line id (port number) from the serialN alias. Signed-off-by: Frank Rowand <frank.rowand@sonymobile.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree/bindings')
-rw-r--r--Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt69
1 files changed, 47 insertions, 22 deletions
diff --git a/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt
index ffa5b784c66e..a2114c217376 100644
--- a/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt
+++ b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt
@@ -27,27 +27,52 @@ Optional properties:
27- dmas: Should contain dma specifiers for transmit and receive channels 27- dmas: Should contain dma specifiers for transmit and receive channels
28- dma-names: Should contain "tx" for transmit and "rx" for receive channels 28- dma-names: Should contain "tx" for transmit and "rx" for receive channels
29 29
30Note: Aliases may be defined to ensure the correct ordering of the UARTs.
31The alias serialN will result in the UART being assigned port N. If any
32serialN alias exists, then an alias must exist for each enabled UART. The
33serialN aliases should be in a .dts file instead of in a .dtsi file.
34
30Examples: 35Examples:
31 36
32A uartdm v1.4 device with dma capabilities. 37- A uartdm v1.4 device with dma capabilities.
33 38
34serial@f991e000 { 39 serial@f991e000 {
35 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; 40 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
36 reg = <0xf991e000 0x1000>; 41 reg = <0xf991e000 0x1000>;
37 interrupts = <0 108 0x0>; 42 interrupts = <0 108 0x0>;
38 clocks = <&blsp1_uart2_apps_cxc>, <&blsp1_ahb_cxc>; 43 clocks = <&blsp1_uart2_apps_cxc>, <&blsp1_ahb_cxc>;
39 clock-names = "core", "iface"; 44 clock-names = "core", "iface";
40 dmas = <&dma0 0>, <&dma0 1>; 45 dmas = <&dma0 0>, <&dma0 1>;
41 dma-names = "tx", "rx"; 46 dma-names = "tx", "rx";
42}; 47 };
43 48
44A uartdm v1.3 device without dma capabilities and part of a GSBI complex. 49- A uartdm v1.3 device without dma capabilities and part of a GSBI complex.
45 50
46serial@19c40000 { 51 serial@19c40000 {
47 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; 52 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
48 reg = <0x19c40000 0x1000>, 53 reg = <0x19c40000 0x1000>,
49 <0x19c00000 0x1000>; 54 <0x19c00000 0x1000>;
50 interrupts = <0 195 0x0>; 55 interrupts = <0 195 0x0>;
51 clocks = <&gsbi5_uart_cxc>, <&gsbi5_ahb_cxc>; 56 clocks = <&gsbi5_uart_cxc>, <&gsbi5_ahb_cxc>;
52 clock-names = "core", "iface"; 57 clock-names = "core", "iface";
53}; 58 };
59
60- serialN alias.
61
62 aliases {
63 serial0 = &uarta;
64 serial1 = &uartc;
65 serial2 = &uartb;
66 };
67
68 uarta: serial@12490000 {
69 status = "ok";
70 };
71
72 uartb: serial@16340000 {
73 status = "ok";
74 };
75
76 uartc: serial@1a240000 {
77 status = "ok";
78 };