diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2015-02-05 05:11:27 -0500 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2015-02-23 16:36:17 -0500 |
| commit | b1e5bbd61eb7584caa61ab3b89f3a66c3d5b4dd3 (patch) | |
| tree | 66867e5c3e985564d99bc7849efd5054fe1ce7c7 /Documentation/devicetree/bindings | |
| parent | 7e7c17f10484d3bad38ea4dddc98485a8a40e4aa (diff) | |
drivers: bus: Add Renesas Bus State Controller (BSC) DT Bindings
The bindings for the BSC extend the bindings for "simple-pm-bus".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'Documentation/devicetree/bindings')
| -rw-r--r-- | Documentation/devicetree/bindings/bus/renesas,bsc.txt | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/bus/renesas,bsc.txt b/Documentation/devicetree/bindings/bus/renesas,bsc.txt new file mode 100644 index 000000000000..90e947269437 --- /dev/null +++ b/Documentation/devicetree/bindings/bus/renesas,bsc.txt | |||
| @@ -0,0 +1,46 @@ | |||
| 1 | Renesas Bus State Controller (BSC) | ||
| 2 | ================================== | ||
| 3 | |||
| 4 | The Renesas Bus State Controller (BSC, sometimes called "LBSC within Bus | ||
| 5 | Bridge", or "External Bus Interface") can be found in several Renesas ARM SoCs. | ||
| 6 | It provides an external bus for connecting multiple external devices to the | ||
| 7 | SoC, driving several chip select lines, for e.g. NOR FLASH, Ethernet and USB. | ||
| 8 | |||
| 9 | While the BSC is a fairly simple memory-mapped bus, it may be part of a PM | ||
| 10 | domain, and may have a gateable functional clock. | ||
| 11 | Before a device connected to the BSC can be accessed, the PM domain | ||
| 12 | containing the BSC must be powered on, and the functional clock | ||
| 13 | driving the BSC must be enabled. | ||
| 14 | |||
| 15 | The bindings for the BSC extend the bindings for "simple-pm-bus". | ||
| 16 | |||
| 17 | |||
| 18 | Required properties | ||
| 19 | - compatible: Must contain an SoC-specific value, and "renesas,bsc" and | ||
| 20 | "simple-pm-bus" as fallbacks. | ||
| 21 | SoC-specific values can be: | ||
| 22 | "renesas,bsc-r8a73a4" for R-Mobile APE6 (r8a73a4) | ||
| 23 | "renesas,bsc-sh73a0" for SH-Mobile AG5 (sh73a0) | ||
| 24 | - #address-cells, #size-cells, ranges: Must describe the mapping between | ||
| 25 | parent address and child address spaces. | ||
| 26 | - reg: Must contain the base address and length to access the bus controller. | ||
| 27 | |||
| 28 | Optional properties: | ||
| 29 | - interrupts: Must contain a reference to the BSC interrupt, if available. | ||
| 30 | - clocks: Must contain a reference to the functional clock, if available. | ||
| 31 | - power-domains: Must contain a reference to the PM domain, if available. | ||
| 32 | |||
| 33 | |||
| 34 | Example: | ||
| 35 | |||
| 36 | bsc: bus@fec10000 { | ||
| 37 | compatible = "renesas,bsc-sh73a0", "renesas,bsc", | ||
| 38 | "simple-pm-bus"; | ||
| 39 | #address-cells = <1>; | ||
| 40 | #size-cells = <1>; | ||
| 41 | ranges = <0 0 0x20000000>; | ||
| 42 | reg = <0xfec10000 0x400>; | ||
| 43 | interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>; | ||
| 44 | clocks = <&zb_clk>; | ||
| 45 | power-domains = <&pd_a4s>; | ||
| 46 | }; | ||
