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authorJianqun Xu <xjq@rock-chips.com>2014-07-05 07:10:38 -0400
committerMark Brown <broonie@linaro.org>2014-07-09 03:39:28 -0400
commitd4796e35fb67df4ec36fa5914689ced8bc51a614 (patch)
treedf64a1e3d6a0177a2dd0ef3963a94ebd2884e3e6 /Documentation/devicetree/bindings/sound
parent7171511eaec5bf23fb06078f59784a3a0626b38f (diff)
ASoC: dt-bindings: add rockchip i2s bindings
Add devicetree bindings for i2s controller found on rk3066, rk3188 and rk3288 processors from rockchip. Signed-off-by: Jianqun Xu <xjq@rock-chips.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/sound')
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diff --git a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
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1* Rockchip I2S controller
2
3The I2S bus (Inter-IC sound bus) is a serial link for digital
4audio data transfer between devices in the system.
5
6Required properties:
7
8- compatible: should be one of the followings
9 - "rockchip,rk3066-i2s": for rk3066
10 - "rockchip,rk3188-i2s", "rockchip,rk3066-i2s": for rk3188
11 - "rockchip,rk3288-i2s", "rockchip,rk3066-i2s": for rk3288
12- reg: physical base address of the controller and length of memory mapped
13 region.
14- interrupts: should contain the I2S interrupt.
15- #address-cells: should be 1.
16- #size-cells: should be 0.
17- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
18 Documentation/devicetree/bindings/dma/dma.txt
19- dma-names: should include "tx" and "rx".
20- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
21- clock-names: should contain followings:
22 - "i2s_hclk": clock for I2S BUS
23 - "i2s_clk" : clock for I2S controller
24
25Example for rk3288 I2S controller:
26
27i2s@ff890000 {
28 compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
29 reg = <0xff890000 0x10000>;
30 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
31 #address-cells = <1>;
32 #size-cells = <0>;
33 dmas = <&pdma1 0>, <&pdma1 1>;
34 dma-names = "rx", "tx";
35 clock-names = "i2s_hclk", "i2s_clk";
36 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
37};