aboutsummaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/serial
diff options
context:
space:
mode:
authorTomasz Figa <t.figa@samsung.com>2014-06-26 07:24:33 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2014-07-09 20:22:55 -0400
commit9b58bec76e8f80664a849ed788e30503463a8eb8 (patch)
tree76d9264aee657521e9cf2c8a0a7d95a5bde014d2 /Documentation/devicetree/bindings/serial
parent44acd26063afd6836e47f76335aaa7779803c8aa (diff)
Documentation: devicetree: Update samsung UART bindings
The primary purpose of this patch is to add information about (now required) aliases of UART ports. However the documentation currently is heavily outdated and so this patch also takes care of this. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/devicetree/bindings/serial')
-rw-r--r--Documentation/devicetree/bindings/serial/samsung_uart.txt52
1 files changed, 46 insertions, 6 deletions
diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.txt b/Documentation/devicetree/bindings/serial/samsung_uart.txt
index 2c8a17cf5cb5..85e8ee2a17fc 100644
--- a/Documentation/devicetree/bindings/serial/samsung_uart.txt
+++ b/Documentation/devicetree/bindings/serial/samsung_uart.txt
@@ -1,14 +1,54 @@
1* Samsung's UART Controller 1* Samsung's UART Controller
2 2
3The Samsung's UART controller is used for interfacing SoC with serial communicaion 3The Samsung's UART controller is used for interfacing SoC with serial
4devices. 4communicaion devices.
5 5
6Required properties: 6Required properties:
7- compatible: should be 7- compatible: should be one of following:
8 - "samsung,exynos4210-uart", for UART's compatible with Exynos4210 uart ports. 8 - "samsung,exynos4210-uart" - Exynos4210 SoC,
9 - "samsung,s3c2410-uart" - compatible with ports present on S3C2410 SoC,
10 - "samsung,s3c2412-uart" - compatible with ports present on S3C2412 SoC,
11 - "samsung,s3c2440-uart" - compatible with ports present on S3C2440 SoC,
12 - "samsung,s3c6400-uart" - compatible with ports present on S3C6400 SoC,
13 - "samsung,s5pv210-uart" - compatible with ports present on S5PV210 SoC.
9 14
10- reg: base physical address of the controller and length of memory mapped 15- reg: base physical address of the controller and length of memory mapped
11 region. 16 region.
12 17
13- interrupts: interrupt number to the cpu. The interrupt specifier format depends 18- interrupts: a single interrupt signal to SoC interrupt controller,
14 on the interrupt controller parent. 19 according to interrupt bindings documentation [1].
20
21- clock-names: input names of clocks used by the controller:
22 - "uart" - controller bus clock,
23 - "clk_uart_baudN" - Nth baud base clock input (N = 0, 1, ...),
24 according to SoC User's Manual (only N = 0 is allowedfor SoCs without
25 internal baud clock mux).
26- clocks: phandles and specifiers for all clocks specified in "clock-names"
27 property, in the same order, according to clock bindings documentation [2].
28
29[1] Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
30[2] Documentation/devicetree/bindings/clock/clock-bindings.txt
31
32Note: Each Samsung UART should have an alias correctly numbered in the
33"aliases" node, according to serialN format, where N is the port number
34(non-negative decimal integer) as specified by User's Manual of respective
35SoC.
36
37Example:
38 aliases {
39 serial0 = &uart0;
40 serial1 = &uart1;
41 serial2 = &uart2;
42 };
43
44Example:
45 uart1: serial@7f005400 {
46 compatible = "samsung,s3c6400-uart";
47 reg = <0x7f005400 0x100>;
48 interrupt-parent = <&vic1>;
49 interrupts = <6>;
50 clock-names = "uart", "clk_uart_baud2",
51 "clk_uart_baud3";
52 clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
53 <&clocks SCLK_UART>;
54 };