Merge branch 'linus' into core/urgent

Update with Linus tree so fixes for the same can be applied.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

1 files changed, 22 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt
new file mode 100644
index 000000000000..922c30ad90d1
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt
@@ -0,0 +1,22 @@
+===================================================================
+Power Architecture CPU Binding
+Copyright 2013 Freescale Semiconductor Inc.
+
+Power Architecture CPUs in Freescale SOCs are represented in device trees as
+per the definition in ePAPR.
+
+In addition to the ePAPR definitions, the properties defined below may be
+present on CPU nodes.
+
+PROPERTIES
+
+   - fsl,eref-*
+        Usage: optional
+        Value type: <empty>
+        Definition: The EREF (EREF: A Programmer.s Reference Manual for
+        Freescale Power Architecture) defines the architecture for Freescale
+        Power CPUs.  The EREF defines some architecture categories not defined
+        by the Power ISA.  For these EREF-specific categories, the existence of
+        a property named fsl,eref-[CAT], where [CAT] is the abbreviated category
+        name with all uppercase letters converted to lowercase, indicates that
+        the category is supported by the implementation.