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authorKukjin Kim <kgene.kim@samsung.com>2012-11-18 20:00:41 -0500
committerKukjin Kim <kgene.kim@samsung.com>2012-11-18 20:00:41 -0500
commitbab797f8e36a4dd0476eda5197182aeea44e23db (patch)
tree925ec0c9a0041c4b7b09a5d3a5869d57e45a5da7 /Documentation/devicetree/bindings/pinctrl
parent3d70f8c617a436c7146ecb81df2265b4626dfe89 (diff)
parentb33ef91f4b799a5de5904c4b361df97a0c3ec7dd (diff)
Merge remote-tracking branch 'pinctrl/samsung' into next/pinctrl-samsung
Diffstat (limited to 'Documentation/devicetree/bindings/pinctrl')
-rw-r--r--Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt118
1 files changed, 93 insertions, 25 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
index 03dee50532f5..63806e2d49c2 100644
--- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
@@ -13,8 +13,14 @@ Required Properties:
13- reg: Base address of the pin controller hardware module and length of 13- reg: Base address of the pin controller hardware module and length of
14 the address space it occupies. 14 the address space it occupies.
15 15
16- interrupts: interrupt specifier for the controller. The format and value of 16- Pin banks as child nodes: Pin banks of the controller are represented by child
17 the interrupt specifier depends on the interrupt parent for the controller. 17 nodes of the controller node. Bank name is taken from name of the node. Each
18 bank node must contain following properties:
19
20 - gpio-controller: identifies the node as a gpio controller and pin bank.
21 - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
22 binding is used, the amount of cells must be specified as 2. See generic
23 GPIO binding documentation for description of particular cells.
18 24
19- Pin mux/config groups as child nodes: The pin mux (selecting pin function 25- Pin mux/config groups as child nodes: The pin mux (selecting pin function
20 mode) and pin config (pull up/down, driver strength) settings are represented 26 mode) and pin config (pull up/down, driver strength) settings are represented
@@ -72,16 +78,24 @@ used as system wakeup events.
72A. External GPIO Interrupts: For supporting external gpio interrupts, the 78A. External GPIO Interrupts: For supporting external gpio interrupts, the
73 following properties should be specified in the pin-controller device node. 79 following properties should be specified in the pin-controller device node.
74 80
75- interrupt-controller: identifies the controller node as interrupt-parent. 81 - interrupt-parent: phandle of the interrupt parent to which the external
76- #interrupt-cells: the value of this property should be 2. 82 GPIO interrupts are forwarded to.
77 - First Cell: represents the external gpio interrupt number local to the 83 - interrupts: interrupt specifier for the controller. The format and value of
78 external gpio interrupt space of the controller. 84 the interrupt specifier depends on the interrupt parent for the controller.
79 - Second Cell: flags to identify the type of the interrupt 85
80 - 1 = rising edge triggered 86 In addition, following properties must be present in node of every bank
81 - 2 = falling edge triggered 87 of pins supporting GPIO interrupts:
82 - 3 = rising and falling edge triggered 88
83 - 4 = high level triggered 89 - interrupt-controller: identifies the controller node as interrupt-parent.
84 - 8 = low level triggered 90 - #interrupt-cells: the value of this property should be 2.
91 - First Cell: represents the external gpio interrupt number local to the
92 external gpio interrupt space of the controller.
93 - Second Cell: flags to identify the type of the interrupt
94 - 1 = rising edge triggered
95 - 2 = falling edge triggered
96 - 3 = rising and falling edge triggered
97 - 4 = high level triggered
98 - 8 = low level triggered
85 99
86B. External Wakeup Interrupts: For supporting external wakeup interrupts, a 100B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
87 child node representing the external wakeup interrupt controller should be 101 child node representing the external wakeup interrupt controller should be
@@ -94,6 +108,11 @@ B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
94 found on Samsung Exynos4210 SoC. 108 found on Samsung Exynos4210 SoC.
95 - interrupt-parent: phandle of the interrupt parent to which the external 109 - interrupt-parent: phandle of the interrupt parent to which the external
96 wakeup interrupts are forwarded to. 110 wakeup interrupts are forwarded to.
111 - interrupts: interrupt used by multiplexed wakeup interrupts.
112
113 In addition, following properties must be present in node of every bank
114 of pins supporting wake-up interrupts:
115
97 - interrupt-controller: identifies the node as interrupt-parent. 116 - interrupt-controller: identifies the node as interrupt-parent.
98 - #interrupt-cells: the value of this property should be 2 117 - #interrupt-cells: the value of this property should be 2
99 - First Cell: represents the external wakeup interrupt number local to 118 - First Cell: represents the external wakeup interrupt number local to
@@ -105,11 +124,63 @@ B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
105 - 4 = high level triggered 124 - 4 = high level triggered
106 - 8 = low level triggered 125 - 8 = low level triggered
107 126
127 Node of every bank of pins supporting direct wake-up interrupts (without
128 multiplexing) must contain following properties:
129
130 - interrupt-parent: phandle of the interrupt parent to which the external
131 wakeup interrupts are forwarded to.
132 - interrupts: interrupts of the interrupt parent which are used for external
133 wakeup interrupts from pins of the bank, must contain interrupts for all
134 pins of the bank.
135
108Aliases: 136Aliases:
109 137
110All the pin controller nodes should be represented in the aliases node using 138All the pin controller nodes should be represented in the aliases node using
111the following format 'pinctrl{n}' where n is a unique number for the alias. 139the following format 'pinctrl{n}' where n is a unique number for the alias.
112 140
141Example: A pin-controller node with pin banks:
142
143 pinctrl_0: pinctrl@11400000 {
144 compatible = "samsung,pinctrl-exynos4210";
145 reg = <0x11400000 0x1000>;
146 interrupts = <0 47 0>;
147
148 /* ... */
149
150 /* Pin bank without external interrupts */
151 gpy0: gpy0 {
152 gpio-controller;
153 #gpio-cells = <2>;
154 };
155
156 /* ... */
157
158 /* Pin bank with external GPIO or muxed wake-up interrupts */
159 gpj0: gpj0 {
160 gpio-controller;
161 #gpio-cells = <2>;
162
163 interrupt-controller;
164 #interrupt-cells = <2>;
165 };
166
167 /* ... */
168
169 /* Pin bank with external direct wake-up interrupts */
170 gpx0: gpx0 {
171 gpio-controller;
172 #gpio-cells = <2>;
173
174 interrupt-controller;
175 interrupt-parent = <&gic>;
176 interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
177 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>;
178 #interrupt-cells = <2>;
179 };
180
181 /* ... */
182 };
183
113Example 1: A pin-controller node with pin groups. 184Example 1: A pin-controller node with pin groups.
114 185
115 pinctrl_0: pinctrl@11400000 { 186 pinctrl_0: pinctrl@11400000 {
@@ -117,6 +188,8 @@ Example 1: A pin-controller node with pin groups.
117 reg = <0x11400000 0x1000>; 188 reg = <0x11400000 0x1000>;
118 interrupts = <0 47 0>; 189 interrupts = <0 47 0>;
119 190
191 /* ... */
192
120 uart0_data: uart0-data { 193 uart0_data: uart0-data {
121 samsung,pins = "gpa0-0", "gpa0-1"; 194 samsung,pins = "gpa0-0", "gpa0-1";
122 samsung,pin-function = <2>; 195 samsung,pin-function = <2>;
@@ -158,20 +231,14 @@ Example 2: A pin-controller node with external wakeup interrupt controller node.
158 pinctrl_1: pinctrl@11000000 { 231 pinctrl_1: pinctrl@11000000 {
159 compatible = "samsung,pinctrl-exynos4210"; 232 compatible = "samsung,pinctrl-exynos4210";
160 reg = <0x11000000 0x1000>; 233 reg = <0x11000000 0x1000>;
161 interrupts = <0 46 0>; 234 interrupts = <0 46 0>
162 interrupt-controller;
163 #interrupt-cells = <2>;
164 235
165 wakup_eint: wakeup-interrupt-controller { 236 /* ... */
237
238 wakeup-interrupt-controller {
166 compatible = "samsung,exynos4210-wakeup-eint"; 239 compatible = "samsung,exynos4210-wakeup-eint";
167 interrupt-parent = <&gic>; 240 interrupt-parent = <&gic>;
168 interrupt-controller; 241 interrupts = <0 32 0>;
169 #interrupt-cells = <2>;
170 interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
171 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
172 <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
173 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>,
174 <0 32 0>;
175 }; 242 };
176 }; 243 };
177 244
@@ -190,7 +257,8 @@ Example 4: Set up the default pin state for uart controller.
190 257
191 static int s3c24xx_serial_probe(struct platform_device *pdev) { 258 static int s3c24xx_serial_probe(struct platform_device *pdev) {
192 struct pinctrl *pinctrl; 259 struct pinctrl *pinctrl;
193 ... 260
194 ... 261 /* ... */
262
195 pinctrl = devm_pinctrl_get_select_default(&pdev->dev); 263 pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
196 } 264 }