ARM: 7821/1: DT: binding fixup to align with vendor-prefixes.txt

[ this is a follow-up to this discussion:
http://archive.arm.linux.org.uk/lurker/message/20130730.230827.a1ceb12a.en.html ]
This patchset renames all uses of "bcm," name bindings to
"brcm," as they were done prior to knowing that brcm had
already been standardized as Broadcom vendor prefix
(in Documentation/devicetree/bindings/vendor-prefixes.txt).
This will not cause any churn on devices because none of
these bindings have made it into production yet.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Christian Daudt <csd@broadcom.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 3 insertions, 1 deletions

diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt b/Documentation/devicetree/bindings/arm/l2cc.txt
index 69ddf9fad2dc..c0c7626fd0ff 100644
--- a/Documentation/devicetree/bindings/arm/l2cc.txt
+++ b/Documentation/devicetree/bindings/arm/l2cc.txt
@@ -16,9 +16,11 @@ Required properties:
      performs the same operation).
         "marvell,"aurora-outer-cache: Marvell Controller designed to be
          compatible with the ARM one with outer cache mode.
-        "bcm,bcm11351-a2-pl310-cache": For Broadcom bcm11351 chipset where an
+        "brcm,bcm11351-a2-pl310-cache": For Broadcom bcm11351 chipset where an
         offset needs to be added to the address before passing down to the L2
         cache controller
+        "bcm,bcm11351-a2-pl310-cache": DEPRECATED by
+                                       "brcm,bcm11351-a2-pl310-cache"
 - cache-unified : Specifies the cache is a unified cache.
 - cache-level : Should be set to 2 for a level 2 cache.
 - reg : Physical base address and size of cache controller's memory mapped