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authorCatalin Marinas <catalin.marinas@arm.com>2014-07-16 12:42:43 -0400
committerCatalin Marinas <catalin.marinas@arm.com>2014-07-23 10:28:05 -0400
commit08375198b01001c0e43bdd580104b16b019a3754 (patch)
tree42fcb4cd3d1660d4fcdc2c44a6ce8d5982e220e8 /Documentation/arm64
parentb4a0d8b37797663b0e523c102dbb3e4b712a720c (diff)
arm64: Determine the vmalloc/vmemmap space at build time based on VA_BITS
Rather than guessing what the maximum vmmemap space should be, this patch allows the calculation based on the VA_BITS and sizeof(struct page). The vmalloc space extends to the beginning of the vmemmap space. Since the virtual kernel memory layout now depends on the build configuration, this patch removes the detailed description in Documentation/arm64/memory.txt in favour of information printed during kernel booting. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Jungseok Lee <jungseoklee85@gmail.com>
Diffstat (limited to 'Documentation/arm64')
-rw-r--r--Documentation/arm64/memory.txt98
1 files changed, 15 insertions, 83 deletions
diff --git a/Documentation/arm64/memory.txt b/Documentation/arm64/memory.txt
index 4c720d698e8e..8845d0847a66 100644
--- a/Documentation/arm64/memory.txt
+++ b/Documentation/arm64/memory.txt
@@ -2,19 +2,18 @@
2 ============================== 2 ==============================
3 3
4Author: Catalin Marinas <catalin.marinas@arm.com> 4Author: Catalin Marinas <catalin.marinas@arm.com>
5Date : 20 February 2012
6 5
7This document describes the virtual memory layout used by the AArch64 6This document describes the virtual memory layout used by the AArch64
8Linux kernel. The architecture allows up to 4 levels of translation 7Linux kernel. The architecture allows up to 4 levels of translation
9tables with a 4KB page size and up to 3 levels with a 64KB page size. 8tables with a 4KB page size and up to 3 levels with a 64KB page size.
10 9
11AArch64 Linux uses either 3 levels or 4 levels of translation tables with 10AArch64 Linux uses either 3 levels or 4 levels of translation tables
12the 4KB page configuration, allowing 39-bit (512GB) or 48-bit (256TB) 11with the 4KB page configuration, allowing 39-bit (512GB) or 48-bit
13virtual addresses, respectively, for both user and kernel. With 64KB 12(256TB) virtual addresses, respectively, for both user and kernel. With
14pages, only 2 levels of translation tables, allowing 42-bit (4TB) 1364KB pages, only 2 levels of translation tables, allowing 42-bit (4TB)
15virtual address, are used but the memory layout is the same. 14virtual address, are used but the memory layout is the same.
16 15
17User addresses have bits 63:39 set to 0 while the kernel addresses have 16User addresses have bits 63:48 set to 0 while the kernel addresses have
18the same bits set to 1. TTBRx selection is given by bit 63 of the 17the same bits set to 1. TTBRx selection is given by bit 63 of the
19virtual address. The swapper_pg_dir contains only kernel (global) 18virtual address. The swapper_pg_dir contains only kernel (global)
20mappings while the user pgd contains only user (non-global) mappings. 19mappings while the user pgd contains only user (non-global) mappings.
@@ -27,26 +26,7 @@ AArch64 Linux memory layout with 4KB pages + 3 levels:
27Start End Size Use 26Start End Size Use
28----------------------------------------------------------------------- 27-----------------------------------------------------------------------
290000000000000000 0000007fffffffff 512GB user 280000000000000000 0000007fffffffff 512GB user
30 29ffffff8000000000 ffffffffffffffff 512GB kernel
31ffffff8000000000 ffffffbbfffeffff ~240GB vmalloc
32
33ffffffbbffff0000 ffffffbbffffffff 64KB [guard page]
34
35ffffffbc00000000 ffffffbdffffffff 8GB vmemmap
36
37ffffffbe00000000 ffffffbffbbfffff ~8GB [guard, future vmmemap]
38
39ffffffbffa000000 ffffffbffaffffff 16MB PCI I/O space
40
41ffffffbffb000000 ffffffbffbbfffff 12MB [guard]
42
43ffffffbffbc00000 ffffffbffbdfffff 2MB fixed mappings
44
45ffffffbffbe00000 ffffffbffbffffff 2MB [guard]
46
47ffffffbffc000000 ffffffbfffffffff 64MB modules
48
49ffffffc000000000 ffffffffffffffff 256GB kernel logical memory map
50 30
51 31
52AArch64 Linux memory layout with 4KB pages + 4 levels: 32AArch64 Linux memory layout with 4KB pages + 4 levels:
@@ -54,26 +34,7 @@ AArch64 Linux memory layout with 4KB pages + 4 levels:
54Start End Size Use 34Start End Size Use
55----------------------------------------------------------------------- 35-----------------------------------------------------------------------
560000000000000000 0000ffffffffffff 256TB user 360000000000000000 0000ffffffffffff 256TB user
57 37ffff000000000000 ffffffffffffffff 256TB kernel
58ffff000000000000 ffff7bfffffeffff ~124TB vmalloc
59
60ffff7bffffff0000 ffff7bffffffffff 64KB [guard page]
61
62ffff7c0000000000 ffff7dffffffffff 2TB vmemmap
63
64ffff7e0000000000 ffff7ffffbbfffff ~2TB [guard, future vmmemap]
65
66ffff7ffffa000000 ffff7ffffaffffff 16MB PCI I/O space
67
68ffff7ffffb000000 ffff7ffffbbfffff 12MB [guard]
69
70ffff7ffffbc00000 ffff7ffffbdfffff 2MB fixed mappings
71
72ffff7ffffbe00000 ffff7ffffbffffff 2MB [guard]
73
74ffff7ffffc000000 ffff7fffffffffff 64MB modules
75
76ffff800000000000 ffffffffffffffff 128TB kernel logical memory map
77 38
78 39
79AArch64 Linux memory layout with 64KB pages + 2 levels: 40AArch64 Linux memory layout with 64KB pages + 2 levels:
@@ -81,44 +42,14 @@ AArch64 Linux memory layout with 64KB pages + 2 levels:
81Start End Size Use 42Start End Size Use
82----------------------------------------------------------------------- 43-----------------------------------------------------------------------
830000000000000000 000003ffffffffff 4TB user 440000000000000000 000003ffffffffff 4TB user
45fffffc0000000000 ffffffffffffffff 4TB kernel
84 46
85fffffc0000000000 fffffdfbfffeffff ~2TB vmalloc
86
87fffffdfbffff0000 fffffdfbffffffff 64KB [guard page]
88 47
89fffffdfc00000000 fffffdfdffffffff 8GB vmemmap 48For details of the virtual kernel memory layout please see the kernel
49booting log.
90 50
91fffffdfe00000000 fffffdfffbbfffff ~8GB [guard, future vmmemap]
92 51
93fffffdfffa000000 fffffdfffaffffff 16MB PCI I/O space 52Translation table lookup with 4KB pages:
94
95fffffdfffb000000 fffffdfffbbfffff 12MB [guard]
96
97fffffdfffbc00000 fffffdfffbdfffff 2MB fixed mappings
98
99fffffdfffbe00000 fffffdfffbffffff 2MB [guard]
100
101fffffdfffc000000 fffffdffffffffff 64MB modules
102
103fffffe0000000000 ffffffffffffffff 2TB kernel logical memory map
104
105
106Translation table lookup with 4KB pages + 3 levels:
107
108+--------+--------+--------+--------+--------+--------+--------+--------+
109|63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
110+--------+--------+--------+--------+--------+--------+--------+--------+
111 | | | | | |
112 | | | | | v
113 | | | | | [11:0] in-page offset
114 | | | | +-> [20:12] L3 index
115 | | | +-----------> [29:21] L2 index
116 | | +---------------------> [38:30] L1 index
117 | +-------------------------------> [47:39] L0 index (not used)
118 +-------------------------------------------------> [63] TTBR0/1
119
120
121Translation table lookup with 4KB pages + 4 levels:
122 53
123+--------+--------+--------+--------+--------+--------+--------+--------+ 54+--------+--------+--------+--------+--------+--------+--------+--------+
124|63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0| 55|63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
@@ -133,7 +64,7 @@ Translation table lookup with 4KB pages + 4 levels:
133 +-------------------------------------------------> [63] TTBR0/1 64 +-------------------------------------------------> [63] TTBR0/1
134 65
135 66
136Translation table lookup with 64KB pages + 2 levels: 67Translation table lookup with 64KB pages:
137 68
138+--------+--------+--------+--------+--------+--------+--------+--------+ 69+--------+--------+--------+--------+--------+--------+--------+--------+
139|63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0| 70|63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
@@ -142,10 +73,11 @@ Translation table lookup with 64KB pages + 2 levels:
142 | | | | v 73 | | | | v
143 | | | | [15:0] in-page offset 74 | | | | [15:0] in-page offset
144 | | | +----------> [28:16] L3 index 75 | | | +----------> [28:16] L3 index
145 | | +--------------------------> [41:29] L2 index (only 38:29 used) 76 | | +--------------------------> [41:29] L2 index
146 | +-------------------------------> [47:42] L1 index (not used) 77 | +-------------------------------> [47:42] L1 index
147 +-------------------------------------------------> [63] TTBR0/1 78 +-------------------------------------------------> [63] TTBR0/1
148 79
80
149When using KVM, the hypervisor maps kernel pages in EL2, at a fixed 81When using KVM, the hypervisor maps kernel pages in EL2, at a fixed
150offset from the kernel VA (top 24bits of the kernel VA set to zero): 82offset from the kernel VA (top 24bits of the kernel VA set to zero):
151 83
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-18 20:40:36 -0500