diff options
author | Wei WANG <wei_wang@realsil.com.cn> | 2013-09-13 05:45:43 -0400 |
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committer | Lee Jones <lee.jones@linaro.org> | 2013-10-23 11:20:59 -0400 |
commit | 26b818511c6562ce372566c219a2ef1afea35fe6 (patch) | |
tree | c6fc61d336ddea8d72dd8b6deb6cd1ec435bc5b8 /COPYING | |
parent | 7902fe8cbc58ae2bd3dad1a8ecf28ce83b1ba3a8 (diff) |
mfd: rtsx: Modify rts5249_optimize_phy
In some platforms, specially Thinkpad series, rts5249 won't be
initialized properly. So we need adjust some phy parameters to
improve the compatibility issue.
It is a little different between simulation and real chip. We have
no idea about which configuration is better before tape-out. We set
default settings according to simulation, but need to tune these
parameters after getting the real chip.
I can't explain every change in detail here. The below information is
just a rough description:
PHY_REG_REV: Disable internal clkreq_tx, enable rx_pwst
PHY_BPCR: No change, just turn the magic number to macro definitions
PHY_PCR: Change OOBS sensitivity, from 60mV to 90mV
PHY_RCR2: Control charge-pump current automatically
PHY_FLD4: Use TX cmu reference clock
PHY_RDR: Change RXDSEL from 30nF to 1.9nF
PHY_RCR1: Change the duration between adp_st and asserting cp_en from
0.32 us to 0.64us
PHY_FLD3: Adjust internal timers
PHY_TUNE: Fine tune the regulator12 output voltage
Signed-off-by: Wei WANG <wei_wang@realsil.com.cn>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'COPYING')
0 files changed, 0 insertions, 0 deletions