diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2013-05-13 13:36:23 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2013-05-20 12:09:38 -0400 |
commit | fffbdda4eee69f99b8c798d8eaca91c7e0513f08 (patch) | |
tree | a6346089904067ea42f4eaa92675a1f55e03cdf4 | |
parent | 1df0d523ddb8683e2d5ca1a50ca92f76f908ef20 (diff) |
drm/radeon: add golden register settings for Hainan (v2)
v2: fix typo
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
-rw-r--r-- | drivers/gpu/drm/radeon/si.c | 122 |
1 files changed, 122 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index d708fc9aa318..5ffade69af25 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
@@ -270,6 +270,40 @@ static const u32 oland_golden_registers[] = | |||
270 | 0x15c0, 0x000c0fc0, 0x000c0400 | 270 | 0x15c0, 0x000c0fc0, 0x000c0400 |
271 | }; | 271 | }; |
272 | 272 | ||
273 | static const u32 hainan_golden_registers[] = | ||
274 | { | ||
275 | 0x9a10, 0x00010000, 0x00018208, | ||
276 | 0x9830, 0xffffffff, 0x00000000, | ||
277 | 0x9834, 0xf00fffff, 0x00000400, | ||
278 | 0x9838, 0x0002021c, 0x00020200, | ||
279 | 0xd0c0, 0xff000fff, 0x00000100, | ||
280 | 0xd030, 0x000300c0, 0x00800040, | ||
281 | 0xd8c0, 0xff000fff, 0x00000100, | ||
282 | 0xd830, 0x000300c0, 0x00800040, | ||
283 | 0x2ae4, 0x00073ffe, 0x000022a2, | ||
284 | 0x240c, 0x000007ff, 0x00000000, | ||
285 | 0x8a14, 0xf000001f, 0x00000007, | ||
286 | 0x8b24, 0xffffffff, 0x00ffffff, | ||
287 | 0x8b10, 0x0000ff0f, 0x00000000, | ||
288 | 0x28a4c, 0x07ffffff, 0x4e000000, | ||
289 | 0x28350, 0x3f3f3fff, 0x00000000, | ||
290 | 0x30, 0x000000ff, 0x0040, | ||
291 | 0x34, 0x00000040, 0x00004040, | ||
292 | 0x9100, 0x03e00000, 0x03600000, | ||
293 | 0x9060, 0x0000007f, 0x00000020, | ||
294 | 0x9508, 0x00010000, 0x00010000, | ||
295 | 0xac14, 0x000003ff, 0x000000f1, | ||
296 | 0xac10, 0xffffffff, 0x00000000, | ||
297 | 0xac0c, 0xffffffff, 0x00003210, | ||
298 | 0x88d4, 0x0000001f, 0x00000010, | ||
299 | 0x15c0, 0x000c0fc0, 0x000c0400 | ||
300 | }; | ||
301 | |||
302 | static const u32 hainan_golden_registers2[] = | ||
303 | { | ||
304 | 0x98f8, 0xffffffff, 0x02010001 | ||
305 | }; | ||
306 | |||
273 | static const u32 tahiti_mgcg_cgcg_init[] = | 307 | static const u32 tahiti_mgcg_cgcg_init[] = |
274 | { | 308 | { |
275 | 0xc400, 0xffffffff, 0xfffffffc, | 309 | 0xc400, 0xffffffff, 0xfffffffc, |
@@ -678,6 +712,83 @@ static const u32 oland_mgcg_cgcg_init[] = | |||
678 | 0xd8c0, 0xfffffff0, 0x00000100 | 712 | 0xd8c0, 0xfffffff0, 0x00000100 |
679 | }; | 713 | }; |
680 | 714 | ||
715 | static const u32 hainan_mgcg_cgcg_init[] = | ||
716 | { | ||
717 | 0xc400, 0xffffffff, 0xfffffffc, | ||
718 | 0x802c, 0xffffffff, 0xe0000000, | ||
719 | 0x9a60, 0xffffffff, 0x00000100, | ||
720 | 0x92a4, 0xffffffff, 0x00000100, | ||
721 | 0xc164, 0xffffffff, 0x00000100, | ||
722 | 0x9774, 0xffffffff, 0x00000100, | ||
723 | 0x8984, 0xffffffff, 0x06000100, | ||
724 | 0x8a18, 0xffffffff, 0x00000100, | ||
725 | 0x92a0, 0xffffffff, 0x00000100, | ||
726 | 0xc380, 0xffffffff, 0x00000100, | ||
727 | 0x8b28, 0xffffffff, 0x00000100, | ||
728 | 0x9144, 0xffffffff, 0x00000100, | ||
729 | 0x8d88, 0xffffffff, 0x00000100, | ||
730 | 0x8d8c, 0xffffffff, 0x00000100, | ||
731 | 0x9030, 0xffffffff, 0x00000100, | ||
732 | 0x9034, 0xffffffff, 0x00000100, | ||
733 | 0x9038, 0xffffffff, 0x00000100, | ||
734 | 0x903c, 0xffffffff, 0x00000100, | ||
735 | 0xad80, 0xffffffff, 0x00000100, | ||
736 | 0xac54, 0xffffffff, 0x00000100, | ||
737 | 0x897c, 0xffffffff, 0x06000100, | ||
738 | 0x9868, 0xffffffff, 0x00000100, | ||
739 | 0x9510, 0xffffffff, 0x00000100, | ||
740 | 0xaf04, 0xffffffff, 0x00000100, | ||
741 | 0xae04, 0xffffffff, 0x00000100, | ||
742 | 0x949c, 0xffffffff, 0x00000100, | ||
743 | 0x802c, 0xffffffff, 0xe0000000, | ||
744 | 0x9160, 0xffffffff, 0x00010000, | ||
745 | 0x9164, 0xffffffff, 0x00030002, | ||
746 | 0x9168, 0xffffffff, 0x00040007, | ||
747 | 0x916c, 0xffffffff, 0x00060005, | ||
748 | 0x9170, 0xffffffff, 0x00090008, | ||
749 | 0x9174, 0xffffffff, 0x00020001, | ||
750 | 0x9178, 0xffffffff, 0x00040003, | ||
751 | 0x917c, 0xffffffff, 0x00000007, | ||
752 | 0x9180, 0xffffffff, 0x00060005, | ||
753 | 0x9184, 0xffffffff, 0x00090008, | ||
754 | 0x9188, 0xffffffff, 0x00030002, | ||
755 | 0x918c, 0xffffffff, 0x00050004, | ||
756 | 0x9190, 0xffffffff, 0x00000008, | ||
757 | 0x9194, 0xffffffff, 0x00070006, | ||
758 | 0x9198, 0xffffffff, 0x000a0009, | ||
759 | 0x919c, 0xffffffff, 0x00040003, | ||
760 | 0x91a0, 0xffffffff, 0x00060005, | ||
761 | 0x91a4, 0xffffffff, 0x00000009, | ||
762 | 0x91a8, 0xffffffff, 0x00080007, | ||
763 | 0x91ac, 0xffffffff, 0x000b000a, | ||
764 | 0x91b0, 0xffffffff, 0x00050004, | ||
765 | 0x91b4, 0xffffffff, 0x00070006, | ||
766 | 0x91b8, 0xffffffff, 0x0008000b, | ||
767 | 0x91bc, 0xffffffff, 0x000a0009, | ||
768 | 0x91c0, 0xffffffff, 0x000d000c, | ||
769 | 0x91c4, 0xffffffff, 0x00060005, | ||
770 | 0x91c8, 0xffffffff, 0x00080007, | ||
771 | 0x91cc, 0xffffffff, 0x0000000b, | ||
772 | 0x91d0, 0xffffffff, 0x000a0009, | ||
773 | 0x91d4, 0xffffffff, 0x000d000c, | ||
774 | 0x9150, 0xffffffff, 0x96940200, | ||
775 | 0x8708, 0xffffffff, 0x00900100, | ||
776 | 0xc478, 0xffffffff, 0x00000080, | ||
777 | 0xc404, 0xffffffff, 0x0020003f, | ||
778 | 0x30, 0xffffffff, 0x0000001c, | ||
779 | 0x34, 0x000f0000, 0x000f0000, | ||
780 | 0x160c, 0xffffffff, 0x00000100, | ||
781 | 0x1024, 0xffffffff, 0x00000100, | ||
782 | 0x20a8, 0xffffffff, 0x00000104, | ||
783 | 0x264c, 0x000c0000, 0x000c0000, | ||
784 | 0x2648, 0x000c0000, 0x000c0000, | ||
785 | 0x2f50, 0x00000001, 0x00000001, | ||
786 | 0x30cc, 0xc0000fff, 0x00000104, | ||
787 | 0xc1e4, 0x00000001, 0x00000001, | ||
788 | 0xd0c0, 0xfffffff0, 0x00000100, | ||
789 | 0xd8c0, 0xfffffff0, 0x00000100 | ||
790 | }; | ||
791 | |||
681 | static u32 verde_pg_init[] = | 792 | static u32 verde_pg_init[] = |
682 | { | 793 | { |
683 | 0x353c, 0xffffffff, 0x40000, | 794 | 0x353c, 0xffffffff, 0x40000, |
@@ -858,6 +969,17 @@ static void si_init_golden_registers(struct radeon_device *rdev) | |||
858 | oland_mgcg_cgcg_init, | 969 | oland_mgcg_cgcg_init, |
859 | (const u32)ARRAY_SIZE(oland_mgcg_cgcg_init)); | 970 | (const u32)ARRAY_SIZE(oland_mgcg_cgcg_init)); |
860 | break; | 971 | break; |
972 | case CHIP_HAINAN: | ||
973 | radeon_program_register_sequence(rdev, | ||
974 | hainan_golden_registers, | ||
975 | (const u32)ARRAY_SIZE(hainan_golden_registers)); | ||
976 | radeon_program_register_sequence(rdev, | ||
977 | hainan_golden_registers2, | ||
978 | (const u32)ARRAY_SIZE(hainan_golden_registers2)); | ||
979 | radeon_program_register_sequence(rdev, | ||
980 | hainan_mgcg_cgcg_init, | ||
981 | (const u32)ARRAY_SIZE(hainan_mgcg_cgcg_init)); | ||
982 | break; | ||
861 | default: | 983 | default: |
862 | break; | 984 | break; |
863 | } | 985 | } |