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authorPeter Ujfalusi <peter.ujfalusi@ti.com>2012-08-29 09:31:04 -0400
committerBenoit Cousson <b-cousson@ti.com>2012-09-07 13:22:56 -0400
commitffd5db24e7491135da12d73244d6974153f4765f (patch)
treef7f4efd319f28f23389c3d75b70cffd71463fc87
parent63467cf23284588901f2edfcaabbfdef489ffc9b (diff)
ARM: dts: omap5: Add McBSP entries
Create the sections describing the McBSP ports to be able to use them via DT. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
-rw-r--r--arch/arm/boot/dts/omap5.dtsi36
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 4c11ae1975cc..aa97e9318def 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -251,5 +251,41 @@
251 compatible = "ti,omap4-keypad"; 251 compatible = "ti,omap4-keypad";
252 ti,hwmods = "kbd"; 252 ti,hwmods = "kbd";
253 }; 253 };
254
255 mcbsp1: mcbsp@40122000 {
256 compatible = "ti,omap4-mcbsp";
257 reg = <0x40122000 0xff>, /* MPU private access */
258 <0x49022000 0xff>; /* L3 Interconnect */
259 reg-names = "mpu", "dma";
260 interrupts = <0 17 0x4>;
261 interrupt-names = "common";
262 interrupt-parent = <&gic>;
263 ti,buffer-size = <128>;
264 ti,hwmods = "mcbsp1";
265 };
266
267 mcbsp2: mcbsp@40124000 {
268 compatible = "ti,omap4-mcbsp";
269 reg = <0x40124000 0xff>, /* MPU private access */
270 <0x49024000 0xff>; /* L3 Interconnect */
271 reg-names = "mpu", "dma";
272 interrupts = <0 22 0x4>;
273 interrupt-names = "common";
274 interrupt-parent = <&gic>;
275 ti,buffer-size = <128>;
276 ti,hwmods = "mcbsp2";
277 };
278
279 mcbsp3: mcbsp@40126000 {
280 compatible = "ti,omap4-mcbsp";
281 reg = <0x40126000 0xff>, /* MPU private access */
282 <0x49026000 0xff>; /* L3 Interconnect */
283 reg-names = "mpu", "dma";
284 interrupts = <0 23 0x4>;
285 interrupt-names = "common";
286 interrupt-parent = <&gic>;
287 ti,buffer-size = <128>;
288 ti,hwmods = "mcbsp3";
289 };
254 }; 290 };
255}; 291};