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authorYevgeny Petrilin <yevgenyp@mellanox.com>2013-07-28 11:54:21 -0400
committerDavid S. Miller <davem@davemloft.net>2013-07-29 04:12:40 -0400
commitfe6f700d6cbb7e8a61711e325f53d9c9e0a42a4c (patch)
tree1a3d5b95434519950cb10ed9e51b50c2583e53fd
parent2d4b646613d6b12175b017aca18113945af1faf3 (diff)
net/mlx4_core: Respond to operation request by firmware
This commit adds new firmware command and new firmware event. The firmware raises the MLX4_EVENT_TYPE_OP_REQUIRED event in order to signal the driver it needs to perform an administrative operation throughout the MLX4_CMD_GET_OP_REQ command. At the moment the supported operation is adding/removing multicast entries which are used by the firmware for handling NCSI traffic in B0 steering mode. Also, had to swap the order of mlx4_init_mcg_table() and mlx4_init_eq_table() to make sure that driver will get events only after resources are initialized to handle it. Signed-off-by: Yevgeny Petrilin <yevgenyp@mellanox.com> Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.com> Signed-off-by: Eugenia Emantayev <eugenia@mellanox.com> Signed-off-by: Amir Vadai <amirv@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/cmd.c18
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/eq.c9
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/fw.c104
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/fw.h1
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/main.c35
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/mcg.c11
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/mlx4.h13
-rw-r--r--include/linux/mlx4/cmd.h1
-rw-r--r--include/linux/mlx4/device.h1
9 files changed, 166 insertions, 27 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx4/cmd.c b/drivers/net/ethernet/mellanox/mlx4/cmd.c
index 299d0184f983..141322c31ae9 100644
--- a/drivers/net/ethernet/mellanox/mlx4/cmd.c
+++ b/drivers/net/ethernet/mellanox/mlx4/cmd.c
@@ -809,6 +809,15 @@ int MLX4_CMD_UPDATE_QP_wrapper(struct mlx4_dev *dev, int slave,
809 return -EPERM; 809 return -EPERM;
810} 810}
811 811
812int MLX4_CMD_GET_OP_REQ_wrapper(struct mlx4_dev *dev, int slave,
813 struct mlx4_vhcr *vhcr,
814 struct mlx4_cmd_mailbox *inbox,
815 struct mlx4_cmd_mailbox *outbox,
816 struct mlx4_cmd_info *cmd)
817{
818 return -EPERM;
819}
820
812int mlx4_DMA_wrapper(struct mlx4_dev *dev, int slave, 821int mlx4_DMA_wrapper(struct mlx4_dev *dev, int slave,
813 struct mlx4_vhcr *vhcr, 822 struct mlx4_vhcr *vhcr,
814 struct mlx4_cmd_mailbox *inbox, 823 struct mlx4_cmd_mailbox *inbox,
@@ -1252,6 +1261,15 @@ static struct mlx4_cmd_info cmd_info[] = {
1252 .wrapper = MLX4_CMD_UPDATE_QP_wrapper 1261 .wrapper = MLX4_CMD_UPDATE_QP_wrapper
1253 }, 1262 },
1254 { 1263 {
1264 .opcode = MLX4_CMD_GET_OP_REQ,
1265 .has_inbox = false,
1266 .has_outbox = false,
1267 .out_is_imm = false,
1268 .encode_slave_id = false,
1269 .verify = NULL,
1270 .wrapper = MLX4_CMD_GET_OP_REQ_wrapper,
1271 },
1272 {
1255 .opcode = MLX4_CMD_CONF_SPECIAL_QP, 1273 .opcode = MLX4_CMD_CONF_SPECIAL_QP,
1256 .has_inbox = false, 1274 .has_inbox = false,
1257 .has_outbox = false, 1275 .has_outbox = false,
diff --git a/drivers/net/ethernet/mellanox/mlx4/eq.c b/drivers/net/ethernet/mellanox/mlx4/eq.c
index 7e042869ef0c..0416c5b3b35c 100644
--- a/drivers/net/ethernet/mellanox/mlx4/eq.c
+++ b/drivers/net/ethernet/mellanox/mlx4/eq.c
@@ -79,6 +79,7 @@ enum {
79 (1ull << MLX4_EVENT_TYPE_SRQ_QP_LAST_WQE) | \ 79 (1ull << MLX4_EVENT_TYPE_SRQ_QP_LAST_WQE) | \
80 (1ull << MLX4_EVENT_TYPE_SRQ_LIMIT) | \ 80 (1ull << MLX4_EVENT_TYPE_SRQ_LIMIT) | \
81 (1ull << MLX4_EVENT_TYPE_CMD) | \ 81 (1ull << MLX4_EVENT_TYPE_CMD) | \
82 (1ull << MLX4_EVENT_TYPE_OP_REQUIRED) | \
82 (1ull << MLX4_EVENT_TYPE_COMM_CHANNEL) | \ 83 (1ull << MLX4_EVENT_TYPE_COMM_CHANNEL) | \
83 (1ull << MLX4_EVENT_TYPE_FLR_EVENT) | \ 84 (1ull << MLX4_EVENT_TYPE_FLR_EVENT) | \
84 (1ull << MLX4_EVENT_TYPE_FATAL_WARNING)) 85 (1ull << MLX4_EVENT_TYPE_FATAL_WARNING))
@@ -629,6 +630,14 @@ static int mlx4_eq_int(struct mlx4_dev *dev, struct mlx4_eq *eq)
629 mlx4_warn(dev, "EQ overrun on EQN %d\n", eq->eqn); 630 mlx4_warn(dev, "EQ overrun on EQN %d\n", eq->eqn);
630 break; 631 break;
631 632
633 case MLX4_EVENT_TYPE_OP_REQUIRED:
634 atomic_inc(&priv->opreq_count);
635 /* FW commands can't be executed from interrupt context
636 * working in deferred task
637 */
638 queue_work(mlx4_wq, &priv->opreq_task);
639 break;
640
632 case MLX4_EVENT_TYPE_COMM_CHANNEL: 641 case MLX4_EVENT_TYPE_COMM_CHANNEL:
633 if (!mlx4_is_master(dev)) { 642 if (!mlx4_is_master(dev)) {
634 mlx4_warn(dev, "Received comm channel event " 643 mlx4_warn(dev, "Received comm channel event "
diff --git a/drivers/net/ethernet/mellanox/mlx4/fw.c b/drivers/net/ethernet/mellanox/mlx4/fw.c
index 8873d6802c80..aec6f5802da5 100644
--- a/drivers/net/ethernet/mellanox/mlx4/fw.c
+++ b/drivers/net/ethernet/mellanox/mlx4/fw.c
@@ -1705,3 +1705,107 @@ int mlx4_wol_write(struct mlx4_dev *dev, u64 config, int port)
1705 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); 1705 MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
1706} 1706}
1707EXPORT_SYMBOL_GPL(mlx4_wol_write); 1707EXPORT_SYMBOL_GPL(mlx4_wol_write);
1708
1709enum {
1710 ADD_TO_MCG = 0x26,
1711};
1712
1713
1714void mlx4_opreq_action(struct work_struct *work)
1715{
1716 struct mlx4_priv *priv = container_of(work, struct mlx4_priv,
1717 opreq_task);
1718 struct mlx4_dev *dev = &priv->dev;
1719 int num_tasks = atomic_read(&priv->opreq_count);
1720 struct mlx4_cmd_mailbox *mailbox;
1721 struct mlx4_mgm *mgm;
1722 u32 *outbox;
1723 u32 modifier;
1724 u16 token;
1725 u16 type_m;
1726 u16 type;
1727 int err;
1728 u32 num_qps;
1729 struct mlx4_qp qp;
1730 int i;
1731 u8 rem_mcg;
1732 u8 prot;
1733
1734#define GET_OP_REQ_MODIFIER_OFFSET 0x08
1735#define GET_OP_REQ_TOKEN_OFFSET 0x14
1736#define GET_OP_REQ_TYPE_OFFSET 0x1a
1737#define GET_OP_REQ_DATA_OFFSET 0x20
1738
1739 mailbox = mlx4_alloc_cmd_mailbox(dev);
1740 if (IS_ERR(mailbox)) {
1741 mlx4_err(dev, "Failed to allocate mailbox for GET_OP_REQ\n");
1742 return;
1743 }
1744 outbox = mailbox->buf;
1745
1746 while (num_tasks) {
1747 err = mlx4_cmd_box(dev, 0, mailbox->dma, 0, 0,
1748 MLX4_CMD_GET_OP_REQ, MLX4_CMD_TIME_CLASS_A,
1749 MLX4_CMD_NATIVE);
1750 if (err) {
1751 mlx4_err(dev, "Failed to retreive required operation: %d\n",
1752 err);
1753 return;
1754 }
1755 MLX4_GET(modifier, outbox, GET_OP_REQ_MODIFIER_OFFSET);
1756 MLX4_GET(token, outbox, GET_OP_REQ_TOKEN_OFFSET);
1757 MLX4_GET(type, outbox, GET_OP_REQ_TYPE_OFFSET);
1758 type_m = type >> 12;
1759 type &= 0xfff;
1760
1761 switch (type) {
1762 case ADD_TO_MCG:
1763 if (dev->caps.steering_mode ==
1764 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1765 mlx4_warn(dev, "ADD MCG operation is not supported in DEVICE_MANAGED steering mode\n");
1766 err = EPERM;
1767 break;
1768 }
1769 mgm = (struct mlx4_mgm *)((u8 *)(outbox) +
1770 GET_OP_REQ_DATA_OFFSET);
1771 num_qps = be32_to_cpu(mgm->members_count) &
1772 MGM_QPN_MASK;
1773 rem_mcg = ((u8 *)(&mgm->members_count))[0] & 1;
1774 prot = ((u8 *)(&mgm->members_count))[0] >> 6;
1775
1776 for (i = 0; i < num_qps; i++) {
1777 qp.qpn = be32_to_cpu(mgm->qp[i]);
1778 if (rem_mcg)
1779 err = mlx4_multicast_detach(dev, &qp,
1780 mgm->gid,
1781 prot, 0);
1782 else
1783 err = mlx4_multicast_attach(dev, &qp,
1784 mgm->gid,
1785 mgm->gid[5]
1786 , 0, prot,
1787 NULL);
1788 if (err)
1789 break;
1790 }
1791 break;
1792 default:
1793 mlx4_warn(dev, "Bad type for required operation\n");
1794 err = EINVAL;
1795 break;
1796 }
1797 err = mlx4_cmd(dev, 0, ((u32) err | cpu_to_be32(token) << 16),
1798 1, MLX4_CMD_GET_OP_REQ, MLX4_CMD_TIME_CLASS_A,
1799 MLX4_CMD_NATIVE);
1800 if (err) {
1801 mlx4_err(dev, "Failed to acknowledge required request: %d\n",
1802 err);
1803 goto out;
1804 }
1805 memset(outbox, 0, 0xffc);
1806 num_tasks = atomic_dec_return(&priv->opreq_count);
1807 }
1808
1809out:
1810 mlx4_free_cmd_mailbox(dev, mailbox);
1811}
diff --git a/drivers/net/ethernet/mellanox/mlx4/fw.h b/drivers/net/ethernet/mellanox/mlx4/fw.h
index fdf41665a059..a0a368b7c939 100644
--- a/drivers/net/ethernet/mellanox/mlx4/fw.h
+++ b/drivers/net/ethernet/mellanox/mlx4/fw.h
@@ -220,5 +220,6 @@ int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm);
220int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev); 220int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev);
221int mlx4_NOP(struct mlx4_dev *dev); 221int mlx4_NOP(struct mlx4_dev *dev);
222int mlx4_MOD_STAT_CFG(struct mlx4_dev *dev, struct mlx4_mod_stat_cfg *cfg); 222int mlx4_MOD_STAT_CFG(struct mlx4_dev *dev, struct mlx4_mod_stat_cfg *cfg);
223void mlx4_opreq_action(struct work_struct *work);
223 224
224#endif /* MLX4_FW_H */ 225#endif /* MLX4_FW_H */
diff --git a/drivers/net/ethernet/mellanox/mlx4/main.c b/drivers/net/ethernet/mellanox/mlx4/main.c
index e85af922dcdc..f1d818f9bb01 100644
--- a/drivers/net/ethernet/mellanox/mlx4/main.c
+++ b/drivers/net/ethernet/mellanox/mlx4/main.c
@@ -1692,11 +1692,19 @@ static int mlx4_setup_hca(struct mlx4_dev *dev)
1692 goto err_xrcd_table_free; 1692 goto err_xrcd_table_free;
1693 } 1693 }
1694 1694
1695 if (!mlx4_is_slave(dev)) {
1696 err = mlx4_init_mcg_table(dev);
1697 if (err) {
1698 mlx4_err(dev, "Failed to initialize multicast group table, aborting.\n");
1699 goto err_mr_table_free;
1700 }
1701 }
1702
1695 err = mlx4_init_eq_table(dev); 1703 err = mlx4_init_eq_table(dev);
1696 if (err) { 1704 if (err) {
1697 mlx4_err(dev, "Failed to initialize " 1705 mlx4_err(dev, "Failed to initialize "
1698 "event queue table, aborting.\n"); 1706 "event queue table, aborting.\n");
1699 goto err_mr_table_free; 1707 goto err_mcg_table_free;
1700 } 1708 }
1701 1709
1702 err = mlx4_cmd_use_events(dev); 1710 err = mlx4_cmd_use_events(dev);
@@ -1746,19 +1754,10 @@ static int mlx4_setup_hca(struct mlx4_dev *dev)
1746 goto err_srq_table_free; 1754 goto err_srq_table_free;
1747 } 1755 }
1748 1756
1749 if (!mlx4_is_slave(dev)) {
1750 err = mlx4_init_mcg_table(dev);
1751 if (err) {
1752 mlx4_err(dev, "Failed to initialize "
1753 "multicast group table, aborting.\n");
1754 goto err_qp_table_free;
1755 }
1756 }
1757
1758 err = mlx4_init_counters_table(dev); 1757 err = mlx4_init_counters_table(dev);
1759 if (err && err != -ENOENT) { 1758 if (err && err != -ENOENT) {
1760 mlx4_err(dev, "Failed to initialize counters table, aborting.\n"); 1759 mlx4_err(dev, "Failed to initialize counters table, aborting.\n");
1761 goto err_mcg_table_free; 1760 goto err_qp_table_free;
1762 } 1761 }
1763 1762
1764 if (!mlx4_is_slave(dev)) { 1763 if (!mlx4_is_slave(dev)) {
@@ -1803,9 +1802,6 @@ static int mlx4_setup_hca(struct mlx4_dev *dev)
1803err_counters_table_free: 1802err_counters_table_free:
1804 mlx4_cleanup_counters_table(dev); 1803 mlx4_cleanup_counters_table(dev);
1805 1804
1806err_mcg_table_free:
1807 mlx4_cleanup_mcg_table(dev);
1808
1809err_qp_table_free: 1805err_qp_table_free:
1810 mlx4_cleanup_qp_table(dev); 1806 mlx4_cleanup_qp_table(dev);
1811 1807
@@ -1821,6 +1817,10 @@ err_cmd_poll:
1821err_eq_table_free: 1817err_eq_table_free:
1822 mlx4_cleanup_eq_table(dev); 1818 mlx4_cleanup_eq_table(dev);
1823 1819
1820err_mcg_table_free:
1821 if (!mlx4_is_slave(dev))
1822 mlx4_cleanup_mcg_table(dev);
1823
1824err_mr_table_free: 1824err_mr_table_free:
1825 mlx4_cleanup_mr_table(dev); 1825 mlx4_cleanup_mr_table(dev);
1826 1826
@@ -2197,6 +2197,9 @@ static int __mlx4_init_one(struct pci_dev *pdev, int pci_dev_data)
2197 } 2197 }
2198 } 2198 }
2199 2199
2200 atomic_set(&priv->opreq_count, 0);
2201 INIT_WORK(&priv->opreq_task, mlx4_opreq_action);
2202
2200 /* 2203 /*
2201 * Now reset the HCA before we touch the PCI capabilities or 2204 * Now reset the HCA before we touch the PCI capabilities or
2202 * attempt a firmware command, since a boot ROM may have left 2205 * attempt a firmware command, since a boot ROM may have left
@@ -2315,12 +2318,12 @@ err_port:
2315 mlx4_cleanup_port_info(&priv->port[port]); 2318 mlx4_cleanup_port_info(&priv->port[port]);
2316 2319
2317 mlx4_cleanup_counters_table(dev); 2320 mlx4_cleanup_counters_table(dev);
2318 mlx4_cleanup_mcg_table(dev);
2319 mlx4_cleanup_qp_table(dev); 2321 mlx4_cleanup_qp_table(dev);
2320 mlx4_cleanup_srq_table(dev); 2322 mlx4_cleanup_srq_table(dev);
2321 mlx4_cleanup_cq_table(dev); 2323 mlx4_cleanup_cq_table(dev);
2322 mlx4_cmd_use_polling(dev); 2324 mlx4_cmd_use_polling(dev);
2323 mlx4_cleanup_eq_table(dev); 2325 mlx4_cleanup_eq_table(dev);
2326 mlx4_cleanup_mcg_table(dev);
2324 mlx4_cleanup_mr_table(dev); 2327 mlx4_cleanup_mr_table(dev);
2325 mlx4_cleanup_xrcd_table(dev); 2328 mlx4_cleanup_xrcd_table(dev);
2326 mlx4_cleanup_pd_table(dev); 2329 mlx4_cleanup_pd_table(dev);
@@ -2403,12 +2406,12 @@ static void mlx4_remove_one(struct pci_dev *pdev)
2403 RES_TR_FREE_SLAVES_ONLY); 2406 RES_TR_FREE_SLAVES_ONLY);
2404 2407
2405 mlx4_cleanup_counters_table(dev); 2408 mlx4_cleanup_counters_table(dev);
2406 mlx4_cleanup_mcg_table(dev);
2407 mlx4_cleanup_qp_table(dev); 2409 mlx4_cleanup_qp_table(dev);
2408 mlx4_cleanup_srq_table(dev); 2410 mlx4_cleanup_srq_table(dev);
2409 mlx4_cleanup_cq_table(dev); 2411 mlx4_cleanup_cq_table(dev);
2410 mlx4_cmd_use_polling(dev); 2412 mlx4_cmd_use_polling(dev);
2411 mlx4_cleanup_eq_table(dev); 2413 mlx4_cleanup_eq_table(dev);
2414 mlx4_cleanup_mcg_table(dev);
2412 mlx4_cleanup_mr_table(dev); 2415 mlx4_cleanup_mr_table(dev);
2413 mlx4_cleanup_xrcd_table(dev); 2416 mlx4_cleanup_xrcd_table(dev);
2414 mlx4_cleanup_pd_table(dev); 2417 mlx4_cleanup_pd_table(dev);
diff --git a/drivers/net/ethernet/mellanox/mlx4/mcg.c b/drivers/net/ethernet/mellanox/mlx4/mcg.c
index f3e804f2a35f..55f6245efb6c 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mcg.c
+++ b/drivers/net/ethernet/mellanox/mlx4/mcg.c
@@ -39,19 +39,8 @@
39 39
40#include "mlx4.h" 40#include "mlx4.h"
41 41
42#define MGM_QPN_MASK 0x00FFFFFF
43#define MGM_BLCK_LB_BIT 30
44
45static const u8 zero_gid[16]; /* automatically initialized to 0 */ 42static const u8 zero_gid[16]; /* automatically initialized to 0 */
46 43
47struct mlx4_mgm {
48 __be32 next_gid_index;
49 __be32 members_count;
50 u32 reserved[2];
51 u8 gid[16];
52 __be32 qp[MLX4_MAX_QP_PER_MGM];
53};
54
55int mlx4_get_mgm_entry_size(struct mlx4_dev *dev) 44int mlx4_get_mgm_entry_size(struct mlx4_dev *dev)
56{ 45{
57 return 1 << dev->oper_log_mgm_entry_size; 46 return 1 << dev->oper_log_mgm_entry_size;
diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4.h b/drivers/net/ethernet/mellanox/mlx4/mlx4.h
index 17d9277e33ef..348bb8c7d9a7 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mlx4.h
+++ b/drivers/net/ethernet/mellanox/mlx4/mlx4.h
@@ -554,6 +554,17 @@ struct mlx4_mfunc {
554 struct mlx4_mfunc_master_ctx master; 554 struct mlx4_mfunc_master_ctx master;
555}; 555};
556 556
557#define MGM_QPN_MASK 0x00FFFFFF
558#define MGM_BLCK_LB_BIT 30
559
560struct mlx4_mgm {
561 __be32 next_gid_index;
562 __be32 members_count;
563 u32 reserved[2];
564 u8 gid[16];
565 __be32 qp[MLX4_MAX_QP_PER_MGM];
566};
567
557struct mlx4_cmd { 568struct mlx4_cmd {
558 struct pci_pool *pool; 569 struct pci_pool *pool;
559 void __iomem *hcr; 570 void __iomem *hcr;
@@ -802,6 +813,8 @@ struct mlx4_priv {
802 u8 virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS]; 813 u8 virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
803 __be64 slave_node_guids[MLX4_MFUNC_MAX]; 814 __be64 slave_node_guids[MLX4_MFUNC_MAX];
804 815
816 atomic_t opreq_count;
817 struct work_struct opreq_task;
805}; 818};
806 819
807static inline struct mlx4_priv *mlx4_priv(struct mlx4_dev *dev) 820static inline struct mlx4_priv *mlx4_priv(struct mlx4_dev *dev)
diff --git a/include/linux/mlx4/cmd.h b/include/linux/mlx4/cmd.h
index bb1c8096a7eb..cd1fdf75103b 100644
--- a/include/linux/mlx4/cmd.h
+++ b/include/linux/mlx4/cmd.h
@@ -69,6 +69,7 @@ enum {
69 MLX4_CMD_SET_ICM_SIZE = 0xffd, 69 MLX4_CMD_SET_ICM_SIZE = 0xffd,
70 /*master notify fw on finish for slave's flr*/ 70 /*master notify fw on finish for slave's flr*/
71 MLX4_CMD_INFORM_FLR_DONE = 0x5b, 71 MLX4_CMD_INFORM_FLR_DONE = 0x5b,
72 MLX4_CMD_GET_OP_REQ = 0x59,
72 73
73 /* TPT commands */ 74 /* TPT commands */
74 MLX4_CMD_SW2HW_MPT = 0xd, 75 MLX4_CMD_SW2HW_MPT = 0xd,
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index 52c23a892bab..6aebdfe0ed8b 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -207,6 +207,7 @@ enum mlx4_event {
207 MLX4_EVENT_TYPE_CMD = 0x0a, 207 MLX4_EVENT_TYPE_CMD = 0x0a,
208 MLX4_EVENT_TYPE_VEP_UPDATE = 0x19, 208 MLX4_EVENT_TYPE_VEP_UPDATE = 0x19,
209 MLX4_EVENT_TYPE_COMM_CHANNEL = 0x18, 209 MLX4_EVENT_TYPE_COMM_CHANNEL = 0x18,
210 MLX4_EVENT_TYPE_OP_REQUIRED = 0x1a,
210 MLX4_EVENT_TYPE_FATAL_WARNING = 0x1b, 211 MLX4_EVENT_TYPE_FATAL_WARNING = 0x1b,
211 MLX4_EVENT_TYPE_FLR_EVENT = 0x1c, 212 MLX4_EVENT_TYPE_FLR_EVENT = 0x1c,
212 MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT = 0x1d, 213 MLX4_EVENT_TYPE_PORT_MNG_CHG_EVENT = 0x1d,