diff options
author | Jonas Gorski <jogo@openwrt.org> | 2014-07-08 10:53:19 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-07-30 09:22:29 -0400 |
commit | fe0a5f1c28467842e943d7f91cc450cc532d9923 (patch) | |
tree | 12896885860f5645abfbb012fe030c3a3355e8b2 | |
parent | 9bd9f9cba6f914bc414c90e790d8ae2307bf17c3 (diff) |
MIPS: BCM63xx: Remove !RUNTIME_DETECT from reset code
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7268/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r-- | arch/mips/bcm63xx/reset.c | 60 |
1 files changed, 0 insertions, 60 deletions
diff --git a/arch/mips/bcm63xx/reset.c b/arch/mips/bcm63xx/reset.c index acbeb1fe7c57..d1fe51edf5e6 100644 --- a/arch/mips/bcm63xx/reset.c +++ b/arch/mips/bcm63xx/reset.c | |||
@@ -125,8 +125,6 @@ | |||
125 | #define BCM6368_RESET_PCIE 0 | 125 | #define BCM6368_RESET_PCIE 0 |
126 | #define BCM6368_RESET_PCIE_EXT 0 | 126 | #define BCM6368_RESET_PCIE_EXT 0 |
127 | 127 | ||
128 | #ifdef BCMCPU_RUNTIME_DETECT | ||
129 | |||
130 | /* | 128 | /* |
131 | * core reset bits | 129 | * core reset bits |
132 | */ | 130 | */ |
@@ -188,64 +186,6 @@ static int __init bcm63xx_reset_bits_init(void) | |||
188 | 186 | ||
189 | return 0; | 187 | return 0; |
190 | } | 188 | } |
191 | #else | ||
192 | |||
193 | #ifdef CONFIG_BCM63XX_CPU_3368 | ||
194 | static const u32 bcm63xx_reset_bits[] = { | ||
195 | __GEN_RESET_BITS_TABLE(3368) | ||
196 | }; | ||
197 | #define reset_reg PERF_SOFTRESET_6358_REG | ||
198 | #endif | ||
199 | |||
200 | #ifdef CONFIG_BCM63XX_CPU_6328 | ||
201 | static const u32 bcm63xx_reset_bits[] = { | ||
202 | __GEN_RESET_BITS_TABLE(6328) | ||
203 | }; | ||
204 | #define reset_reg PERF_SOFTRESET_6328_REG | ||
205 | #endif | ||
206 | |||
207 | #ifdef CONFIG_BCM63XX_CPU_6338 | ||
208 | static const u32 bcm63xx_reset_bits[] = { | ||
209 | __GEN_RESET_BITS_TABLE(6338) | ||
210 | }; | ||
211 | #define reset_reg PERF_SOFTRESET_REG | ||
212 | #endif | ||
213 | |||
214 | #ifdef CONFIG_BCM63XX_CPU_6345 | ||
215 | static const u32 bcm63xx_reset_bits[] = { }; | ||
216 | #define reset_reg 0 | ||
217 | #endif | ||
218 | |||
219 | #ifdef CONFIG_BCM63XX_CPU_6348 | ||
220 | static const u32 bcm63xx_reset_bits[] = { | ||
221 | __GEN_RESET_BITS_TABLE(6348) | ||
222 | }; | ||
223 | #define reset_reg PERF_SOFTRESET_REG | ||
224 | #endif | ||
225 | |||
226 | #ifdef CONFIG_BCM63XX_CPU_6358 | ||
227 | static const u32 bcm63xx_reset_bits[] = { | ||
228 | __GEN_RESET_BITS_TABLE(6358) | ||
229 | }; | ||
230 | #define reset_reg PERF_SOFTRESET_6358_REG | ||
231 | #endif | ||
232 | |||
233 | #ifdef CONFIG_BCM63XX_CPU_6362 | ||
234 | static const u32 bcm63xx_reset_bits[] = { | ||
235 | __GEN_RESET_BITS_TABLE(6362) | ||
236 | }; | ||
237 | #define reset_reg PERF_SOFTRESET_6362_REG | ||
238 | #endif | ||
239 | |||
240 | #ifdef CONFIG_BCM63XX_CPU_6368 | ||
241 | static const u32 bcm63xx_reset_bits[] = { | ||
242 | __GEN_RESET_BITS_TABLE(6368) | ||
243 | }; | ||
244 | #define reset_reg PERF_SOFTRESET_6368_REG | ||
245 | #endif | ||
246 | |||
247 | static int __init bcm63xx_reset_bits_init(void) { return 0; } | ||
248 | #endif | ||
249 | 189 | ||
250 | static DEFINE_SPINLOCK(reset_mutex); | 190 | static DEFINE_SPINLOCK(reset_mutex); |
251 | 191 | ||