diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2014-02-03 08:46:19 -0500 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2014-02-04 14:50:24 -0500 |
commit | fd385b33762620a48d098e0490b98782fe9d07a6 (patch) | |
tree | 31333918842a2149a8ec3077bcefac1d1f048a88 | |
parent | 8320062928161911bc46b0340e5a7cc0b3e3bb8e (diff) |
ARM: ux500: move AB8500 YCBCR settings to device tree
This moves the pin control settings for the YCBCR connector
on the AB8500 over to the device tree as a hog.
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r-- | arch/arm/boot/dts/ste-href-ab8500.dtsi | 23 | ||||
-rw-r--r-- | arch/arm/mach-ux500/board-mop500-pins.c | 10 |
2 files changed, 22 insertions, 11 deletions
diff --git a/arch/arm/boot/dts/ste-href-ab8500.dtsi b/arch/arm/boot/dts/ste-href-ab8500.dtsi index 58b00d0f023e..2b548e90878e 100644 --- a/arch/arm/boot/dts/ste-href-ab8500.dtsi +++ b/arch/arm/boot/dts/ste-href-ab8500.dtsi | |||
@@ -31,7 +31,8 @@ | |||
31 | <&gpio39_default_mode>, | 31 | <&gpio39_default_mode>, |
32 | <&gpio42_default_mode>, | 32 | <&gpio42_default_mode>, |
33 | <&gpio26_default_mode>, | 33 | <&gpio26_default_mode>, |
34 | <&gpio35_default_mode>; | 34 | <&gpio35_default_mode>, |
35 | <&ycbcr_default_mode>; | ||
35 | 36 | ||
36 | /* | 37 | /* |
37 | * Pins 2, 4, 10, 11, 12, 13, 16, 24, 25, 36, 37, 38, 39 and 42 | 38 | * Pins 2, 4, 10, 11, 12, 13, 16, 24, 25, 36, 37, 38, 39 and 42 |
@@ -246,6 +247,26 @@ | |||
246 | }; | 247 | }; |
247 | }; | 248 | }; |
248 | }; | 249 | }; |
250 | /* | ||
251 | * This sets up the YCBCR connector pins, i.e. analog video out. | ||
252 | * Set as input with no bias. | ||
253 | */ | ||
254 | ycbcr { | ||
255 | ycbcr_default_mode: ycbcr_default { | ||
256 | default_mux { | ||
257 | ste,function = "ycbcr"; | ||
258 | ste,pins = "ycbcr0123_d_1"; | ||
259 | }; | ||
260 | default_cfg { | ||
261 | ste,pins = "GPIO6_Y18", | ||
262 | "GPIO7_AA20", | ||
263 | "GPIO8_W18", | ||
264 | "GPIO9_AA19"; | ||
265 | input-enable; | ||
266 | bias-disable; | ||
267 | }; | ||
268 | }; | ||
269 | }; | ||
249 | }; | 270 | }; |
250 | }; | 271 | }; |
251 | }; | 272 | }; |
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c index 139298043685..d58513b08a6d 100644 --- a/arch/arm/mach-ux500/board-mop500-pins.c +++ b/arch/arm/mach-ux500/board-mop500-pins.c | |||
@@ -57,16 +57,6 @@ static struct pinctrl_map __initdata ab8500_pinmap[] = { | |||
57 | AB8500_PIN_STATE("GPIO3_U9", in_pd, "regulator.36", PINCTRL_STATE_SLEEP), | 57 | AB8500_PIN_STATE("GPIO3_U9", in_pd, "regulator.36", PINCTRL_STATE_SLEEP), |
58 | 58 | ||
59 | /* | 59 | /* |
60 | * pins 6,7,8 and 9 are muxed in YCBCR0123 | ||
61 | * configured in INPUT PULL UP | ||
62 | */ | ||
63 | AB8500_MUX_HOG("ycbcr0123_d_1", "ycbcr"), | ||
64 | AB8500_PIN_HOG("GPIO6_Y18", in_nopull), | ||
65 | AB8500_PIN_HOG("GPIO7_AA20", in_nopull), | ||
66 | AB8500_PIN_HOG("GPIO8_W18", in_nopull), | ||
67 | AB8500_PIN_HOG("GPIO9_AA19", in_nopull), | ||
68 | |||
69 | /* | ||
70 | * pins 14,15 are muxed in PWM1 and PWM2 | 60 | * pins 14,15 are muxed in PWM1 and PWM2 |
71 | * configured in INPUT PULL DOWN | 61 | * configured in INPUT PULL DOWN |
72 | */ | 62 | */ |