ARM: STi: STiH415: Add soft reset controller support.

This patch adds soft reset controller support for STiH415 and adds new
softreset lines required for other device tree nodes in the header file.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>

3 files changed, 58 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/reset/st,sti-softreset.txt b/Documentation/devicetree/bindings/reset/st,sti-softreset.txt
new file mode 100644
index 000000000000..a8d3d3c25ca2
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/st,sti-softreset.txt
@@ -0,0 +1,46 @@
+STMicroelectronics STi family Sysconfig Peripheral SoftReset Controller
+=============================================================================
+
+This binding describes a reset controller device that is used to enable and
+disable on-chip peripheral controllers such as USB and SATA, using
+"softreset" control bits found in the STi family SoC system configuration
+registers.
+
+The actual action taken when softreset is asserted is hardware dependent.
+However, when asserted it may not be possible to access the hardware's
+registers and after an assert/deassert sequence the hardware's previous state
+may no longer be valid.
+
+Please refer to reset.txt in this directory for common reset
+controller binding usage.
+
+Required properties:
+- compatible: Should be "st,<chip>-softreset" example:
+        "st,stih415-softreset" or "st,stih416-softreset";
+- #reset-cells: 1, see below
+
+example:
+
+        softreset: softreset-controller {
+                #reset-cells = <1>;
+                compatible = "st,stih415-softreset";
+        };
+
+
+Specifying softreset control of devices
+=======================================
+
+Device nodes should specify the reset channel required in their "resets"
+property, containing a phandle to the softreset device node and an
+index specifying which channel to use, as described in reset.txt
+
+example:
+
+        ethernet0{
+                resets                  = <&softreset STIH415_ETH0_SOFTRESET>;
+        };
+
+Macro definitions for the supported reset channels can be found in:
+
+include/dt-bindings/reset-controller/stih415-resets.h
+include/dt-bindings/reset-controller/stih416-resets.h
diff --git a/arch/arm/boot/dts/stih415.dtsi b/arch/arm/boot/dts/stih415.dtsi
index 19e29f4af9d6..d52207c1168e 100644
--- a/arch/arm/boot/dts/stih415.dtsi
+++ b/arch/arm/boot/dts/stih415.dtsi
@@ -34,6 +34,11 @@
                         compatible = "st,stih415-powerdown";
                 };
 
+                softreset: softreset-controller {
+                        #reset-cells = <1>;
+                        compatible = "st,stih415-softreset";
+                };
+
                 syscfg_sbc: sbc-syscfg@fe600000{
                         compatible      = "st,stih415-sbc-syscfg", "syscon";
                         reg             = <0xfe600000 0xb4>;
diff --git a/include/dt-bindings/reset-controller/stih415-resets.h b/include/dt-bindings/reset-controller/stih415-resets.h
index 2d54e68c2d95..c2f8a66913c5 100644
--- a/include/dt-bindings/reset-controller/stih415-resets.h
+++ b/include/dt-bindings/reset-controller/stih415-resets.h
@@ -16,4 +16,11 @@
 #define STIH415_SATA1_POWERDOWN         7
 #define STIH415_PCIE_POWERDOWN          8
 
+#define STIH415_ETH0_SOFTRESET          0
+#define STIH415_ETH1_SOFTRESET          1
+#define STIH415_IRB_SOFTRESET           2
+#define STIH415_USB0_SOFTRESET          3
+#define STIH415_USB1_SOFTRESET          4
+#define STIH415_USB2_SOFTRESET          5
+
 #endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH415 */