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authorRajendra Nayak <ranayak@ti.com>2014-04-10 12:34:32 -0400
committerNishanth Menon <nm@ti.com>2014-05-05 15:35:22 -0400
commitfba387a6162cf5cefba3610eb6f4f67cdbb4d2ca (patch)
tree1b244da05c7475f15e3b2965d44eddd32eaaaaed
parent455c6fdbd219161bd09b1165f11699d6d73de11c (diff)
ARM: dts: DRA7: Use dra7-l3-noc instead of omap4-l3-noc
We have currently marked the DRA7 L3 as being compatible with omap4-l3-noc This is not true considering the differences in data involved. Now that we have proper support for ti,dra7-l3-noc, add the clock modules clk1 and clk3 (clk2 submodule will be handled by the driver) and switch compatibility flag to use the proper data. Signed-off-by: Rajendra Nayak <ranayak@ti.com> [nm@ti.com: map up full address range] Signed-off-by: Nishanth Menon <nm@ti.com>
-rw-r--r--arch/arm/boot/dts/dra7.dtsi6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 1fd75aa4639d..8c62664149f0 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -94,13 +94,13 @@
94 * hierarchy. 94 * hierarchy.
95 */ 95 */
96 ocp { 96 ocp {
97 compatible = "ti,omap4-l3-noc", "simple-bus"; 97 compatible = "ti,dra7-l3-noc", "simple-bus";
98 #address-cells = <1>; 98 #address-cells = <1>;
99 #size-cells = <1>; 99 #size-cells = <1>;
100 ranges; 100 ranges;
101 ti,hwmods = "l3_main_1", "l3_main_2"; 101 ti,hwmods = "l3_main_1", "l3_main_2";
102 reg = <0x44000000 0x2000>, 102 reg = <0x44000000 0x1000000>,
103 <0x44800000 0x3000>; 103 <0x45000000 0x1000>;
104 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 104 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
105 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 105 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
106 106