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authorAxel Lin <axel.lin@ingics.com>2014-03-21 01:24:14 -0400
committerMark Brown <broonie@linaro.org>2014-03-21 13:49:04 -0400
commitfb534f10755954827a4b71b9a21f9b5fa93707a9 (patch)
treec61737b35f0d2ccb815969be694e73d27a8aa4f4
parent8120ff8c48396a75cc9e5fa26a7a476479003fab (diff)
spi: nuc900: Fix setting multiple bits settings in register
The correct way to set multiple bits settings is always clear these bit fields before set new settings. Current code does not cause problem because the reset value of these bit fields are 0, and these settings only set once during probe. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
-rw-r--r--drivers/spi/spi-nuc900.c18
1 files changed, 8 insertions, 10 deletions
diff --git a/drivers/spi/spi-nuc900.c b/drivers/spi/spi-nuc900.c
index 6d36c35c86f5..f12e27cdbf49 100644
--- a/drivers/spi/spi-nuc900.c
+++ b/drivers/spi/spi-nuc900.c
@@ -38,7 +38,9 @@
38/* usi register bit */ 38/* usi register bit */
39#define ENINT (0x01 << 17) 39#define ENINT (0x01 << 17)
40#define ENFLG (0x01 << 16) 40#define ENFLG (0x01 << 16)
41#define SLEEP (0x0f << 12)
41#define TXNUM (0x03 << 8) 42#define TXNUM (0x03 << 8)
43#define TXBITLEN (0x1f << 3)
42#define TXNEG (0x01 << 2) 44#define TXNEG (0x01 << 2)
43#define RXNEG (0x01 << 1) 45#define RXNEG (0x01 << 1)
44#define LSB (0x01 << 10) 46#define LSB (0x01 << 10)
@@ -116,19 +118,16 @@ static void nuc900_spi_chipsel(struct spi_device *spi, int value)
116 } 118 }
117} 119}
118 120
119static void nuc900_spi_setup_txnum(struct nuc900_spi *hw, 121static void nuc900_spi_setup_txnum(struct nuc900_spi *hw, unsigned int txnum)
120 unsigned int txnum)
121{ 122{
122 unsigned int val; 123 unsigned int val;
123 unsigned long flags; 124 unsigned long flags;
124 125
125 spin_lock_irqsave(&hw->lock, flags); 126 spin_lock_irqsave(&hw->lock, flags);
126 127
127 val = __raw_readl(hw->regs + USI_CNT); 128 val = __raw_readl(hw->regs + USI_CNT) & ~TXNUM;
128 129
129 if (!txnum) 130 if (txnum)
130 val &= ~TXNUM;
131 else
132 val |= txnum << 0x08; 131 val |= txnum << 0x08;
133 132
134 __raw_writel(val, hw->regs + USI_CNT); 133 __raw_writel(val, hw->regs + USI_CNT);
@@ -145,7 +144,7 @@ static void nuc900_spi_setup_txbitlen(struct nuc900_spi *hw,
145 144
146 spin_lock_irqsave(&hw->lock, flags); 145 spin_lock_irqsave(&hw->lock, flags);
147 146
148 val = __raw_readl(hw->regs + USI_CNT); 147 val = __raw_readl(hw->regs + USI_CNT) & ~TXBITLEN;
149 148
150 val |= (txbitlen << 0x03); 149 val |= (txbitlen << 0x03);
151 150
@@ -284,12 +283,11 @@ static void nuc900_set_sleep(struct nuc900_spi *hw, unsigned int sleep)
284 283
285 spin_lock_irqsave(&hw->lock, flags); 284 spin_lock_irqsave(&hw->lock, flags);
286 285
287 val = __raw_readl(hw->regs + USI_CNT); 286 val = __raw_readl(hw->regs + USI_CNT) & ~SLEEP;
288 287
289 if (sleep) 288 if (sleep)
290 val |= (sleep << 12); 289 val |= (sleep << 12);
291 else 290
292 val &= ~(0x0f << 12);
293 __raw_writel(val, hw->regs + USI_CNT); 291 __raw_writel(val, hw->regs + USI_CNT);
294 292
295 spin_unlock_irqrestore(&hw->lock, flags); 293 spin_unlock_irqrestore(&hw->lock, flags);