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authorVincent Guittot <vincent.guittot@linaro.org>2014-04-11 05:44:41 -0400
committerIngo Molnar <mingo@kernel.org>2014-05-07 07:33:52 -0400
commitfb2aa85564f4de35d25db022ab93640f8bb51821 (patch)
tree2fc54b7c2eb2e558a4277202efb2c47861ec6917
parentd77b3ed5c9f8ebedf154b52b5e943c461f3d37e6 (diff)
sched, ARM: Create a dedicated scheduler topology table
Create a dedicated topology table for ARM which will create new level to differentiate CPUs that can or not powergate independantly from others. The patch gives an example of how to add domain that will take advantage of SD_SHARE_POWERDOMAIN. Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org> Reviewed-by: Dietmar Eggemann <dietmar.eggemann@arm.com> Tested-by: Dietmar Eggemann <dietmar.eggemann@arm.com> Signed-off-by: Peter Zijlstra <peterz@infradead.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Grant Likely <grant.likely@linaro.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Mark Brown <broonie@linaro.org> Cc: Nicolas Pitre <nico@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com Cc: schwidefsky@de.ibm.com Cc: cmetcalf@tilera.com Cc: benh@kernel.crashing.org Cc: preeti@linux.vnet.ibm.com Link: http://lkml.kernel.org/r/1397209481-28542-6-git-send-email-vincent.guittot@linaro.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
-rw-r--r--arch/arm/kernel/topology.c26
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
index 0bc94b1fd1ae..71e1fec6d31a 100644
--- a/arch/arm/kernel/topology.c
+++ b/arch/arm/kernel/topology.c
@@ -185,6 +185,15 @@ const struct cpumask *cpu_coregroup_mask(int cpu)
185 return &cpu_topology[cpu].core_sibling; 185 return &cpu_topology[cpu].core_sibling;
186} 186}
187 187
188/*
189 * The current assumption is that we can power gate each core independently.
190 * This will be superseded by DT binding once available.
191 */
192const struct cpumask *cpu_corepower_mask(int cpu)
193{
194 return &cpu_topology[cpu].thread_sibling;
195}
196
188static void update_siblings_masks(unsigned int cpuid) 197static void update_siblings_masks(unsigned int cpuid)
189{ 198{
190 struct cputopo_arm *cpu_topo, *cpuid_topo = &cpu_topology[cpuid]; 199 struct cputopo_arm *cpu_topo, *cpuid_topo = &cpu_topology[cpuid];
@@ -266,6 +275,20 @@ void store_cpu_topology(unsigned int cpuid)
266 cpu_topology[cpuid].socket_id, mpidr); 275 cpu_topology[cpuid].socket_id, mpidr);
267} 276}
268 277
278static inline const int cpu_corepower_flags(void)
279{
280 return SD_SHARE_PKG_RESOURCES | SD_SHARE_POWERDOMAIN;
281}
282
283static struct sched_domain_topology_level arm_topology[] = {
284#ifdef CONFIG_SCHED_MC
285 { cpu_corepower_mask, cpu_corepower_flags, SD_INIT_NAME(GMC) },
286 { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
287#endif
288 { cpu_cpu_mask, SD_INIT_NAME(DIE) },
289 { NULL, },
290};
291
269/* 292/*
270 * init_cpu_topology is called at boot when only one cpu is running 293 * init_cpu_topology is called at boot when only one cpu is running
271 * which prevent simultaneous write access to cpu_topology array 294 * which prevent simultaneous write access to cpu_topology array
@@ -289,4 +312,7 @@ void __init init_cpu_topology(void)
289 smp_wmb(); 312 smp_wmb();
290 313
291 parse_dt_topology(); 314 parse_dt_topology();
315
316 /* Set scheduler topology descriptor */
317 set_sched_topology(arm_topology);
292} 318}