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authorLinus Torvalds <torvalds@linux-foundation.org>2012-06-17 04:44:41 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-06-17 04:44:41 -0400
commitfb09185a88cad9c59e22e84f8c0594303595e9af (patch)
treea7287193506fe491cff1ac84b72e1865906991d7
parent41a328b95c00fa00ed5832c2876aee7186222438 (diff)
parentc4af5c4597a7a5d64e058703e1328f315a59794e (diff)
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie: "Radeon is most of the work, one regression, one BUG fix in the new prime code, some fixes to init code to make streamout not lock up the hardware, and just some code to enable users to test HDMI audio on later hw (its off by default). Intel adds edp edid caching for some strange Dell Vostros that black screen on startup if keep reading their EDID, and a fix for a DP regression. Otherwise fix for via/sis and one to stop udl binding to multiple non-video usb." * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm/i915: cache the EDID for eDP panels Revert "drm/i915/dp: Use auxch precharge value of 5 everywhere" drm/i915: eDP aux needs vdd drm/i915: don't enumerate HDMID if an eDP panel is already active on the port drm/radeon: add support for STRMOUT_BASE_UPDATE on 7xx drm/radeon: add some additional 6xx/7xx/EG register init drm/radeon: enable HDMI on DCE5 (AKA NI excluding Aruba) drm sis: initialize object_idr drm via: initialize object_idr drm/radeon/prime: reserve/unreserve around pin drm/radeon: fix regression in dynpm due to multi-ring rework vga_switcheroo.h: fix pci_dev warning drm/udl: only bind to the video devices on the hub.
-rw-r--r--drivers/gpu/drm/i915/intel_display.c2
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c60
-rw-r--r--drivers/gpu/drm/radeon/atombios_encoders.c4
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c3
-rw-r--r--drivers/gpu/drm/radeon/evergreen_hdmi.c3
-rw-r--r--drivers/gpu/drm/radeon/evergreend.h1
-rw-r--r--drivers/gpu/drm/radeon/ni.c5
-rw-r--r--drivers/gpu/drm/radeon/r600.c1
-rw-r--r--drivers/gpu/drm/radeon/r600_audio.c2
-rw-r--r--drivers/gpu/drm/radeon/r600_cs.c42
-rw-r--r--drivers/gpu/drm/radeon/r600_hdmi.c7
-rw-r--r--drivers/gpu/drm/radeon/r600d.h2
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.c3
-rw-r--r--drivers/gpu/drm/radeon/radeon_pm.c10
-rw-r--r--drivers/gpu/drm/radeon/radeon_prime.c10
-rw-r--r--drivers/gpu/drm/radeon/rv770.c5
-rw-r--r--drivers/gpu/drm/radeon/rv770d.h3
-rw-r--r--drivers/gpu/drm/sis/sis_drv.c2
-rw-r--r--drivers/gpu/drm/udl/udl_drv.c15
-rw-r--r--drivers/gpu/drm/via/via_map.c3
-rw-r--r--include/linux/vga_switcheroo.h2
21 files changed, 156 insertions, 29 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e0aa064def31..a7c727d0c105 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6558,7 +6558,7 @@ static void intel_setup_outputs(struct drm_device *dev)
6558 if (I915_READ(HDMIC) & PORT_DETECTED) 6558 if (I915_READ(HDMIC) & PORT_DETECTED)
6559 intel_hdmi_init(dev, HDMIC); 6559 intel_hdmi_init(dev, HDMIC);
6560 6560
6561 if (I915_READ(HDMID) & PORT_DETECTED) 6561 if (!dpd_is_edp && I915_READ(HDMID) & PORT_DETECTED)
6562 intel_hdmi_init(dev, HDMID); 6562 intel_hdmi_init(dev, HDMID);
6563 6563
6564 if (I915_READ(PCH_DP_C) & DP_DETECTED) 6564 if (I915_READ(PCH_DP_C) & DP_DETECTED)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 296cfc201a81..c0449324143c 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -32,6 +32,7 @@
32#include "drm.h" 32#include "drm.h"
33#include "drm_crtc.h" 33#include "drm_crtc.h"
34#include "drm_crtc_helper.h" 34#include "drm_crtc_helper.h"
35#include "drm_edid.h"
35#include "intel_drv.h" 36#include "intel_drv.h"
36#include "i915_drm.h" 37#include "i915_drm.h"
37#include "i915_drv.h" 38#include "i915_drv.h"
@@ -67,6 +68,8 @@ struct intel_dp {
67 struct drm_display_mode *panel_fixed_mode; /* for eDP */ 68 struct drm_display_mode *panel_fixed_mode; /* for eDP */
68 struct delayed_work panel_vdd_work; 69 struct delayed_work panel_vdd_work;
69 bool want_panel_vdd; 70 bool want_panel_vdd;
71 struct edid *edid; /* cached EDID for eDP */
72 int edid_mode_count;
70}; 73};
71 74
72/** 75/**
@@ -371,7 +374,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
371 int recv_bytes; 374 int recv_bytes;
372 uint32_t status; 375 uint32_t status;
373 uint32_t aux_clock_divider; 376 uint32_t aux_clock_divider;
374 int try, precharge = 5; 377 int try, precharge;
375 378
376 intel_dp_check_edp(intel_dp); 379 intel_dp_check_edp(intel_dp);
377 /* The clock divider is based off the hrawclk, 380 /* The clock divider is based off the hrawclk,
@@ -391,6 +394,11 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
391 else 394 else
392 aux_clock_divider = intel_hrawclk(dev) / 2; 395 aux_clock_divider = intel_hrawclk(dev) / 2;
393 396
397 if (IS_GEN6(dev))
398 precharge = 3;
399 else
400 precharge = 5;
401
394 /* Try to wait for any previous AUX channel activity */ 402 /* Try to wait for any previous AUX channel activity */
395 for (try = 0; try < 3; try++) { 403 for (try = 0; try < 3; try++) {
396 status = I915_READ(ch_ctl); 404 status = I915_READ(ch_ctl);
@@ -1973,6 +1981,8 @@ intel_dp_probe_oui(struct intel_dp *intel_dp)
1973 if (!(intel_dp->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT)) 1981 if (!(intel_dp->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT))
1974 return; 1982 return;
1975 1983
1984 ironlake_edp_panel_vdd_on(intel_dp);
1985
1976 if (intel_dp_aux_native_read_retry(intel_dp, DP_SINK_OUI, buf, 3)) 1986 if (intel_dp_aux_native_read_retry(intel_dp, DP_SINK_OUI, buf, 3))
1977 DRM_DEBUG_KMS("Sink OUI: %02hx%02hx%02hx\n", 1987 DRM_DEBUG_KMS("Sink OUI: %02hx%02hx%02hx\n",
1978 buf[0], buf[1], buf[2]); 1988 buf[0], buf[1], buf[2]);
@@ -1980,6 +1990,8 @@ intel_dp_probe_oui(struct intel_dp *intel_dp)
1980 if (intel_dp_aux_native_read_retry(intel_dp, DP_BRANCH_OUI, buf, 3)) 1990 if (intel_dp_aux_native_read_retry(intel_dp, DP_BRANCH_OUI, buf, 3))
1981 DRM_DEBUG_KMS("Branch OUI: %02hx%02hx%02hx\n", 1991 DRM_DEBUG_KMS("Branch OUI: %02hx%02hx%02hx\n",
1982 buf[0], buf[1], buf[2]); 1992 buf[0], buf[1], buf[2]);
1993
1994 ironlake_edp_panel_vdd_off(intel_dp, false);
1983} 1995}
1984 1996
1985static bool 1997static bool
@@ -2116,10 +2128,22 @@ intel_dp_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
2116{ 2128{
2117 struct intel_dp *intel_dp = intel_attached_dp(connector); 2129 struct intel_dp *intel_dp = intel_attached_dp(connector);
2118 struct edid *edid; 2130 struct edid *edid;
2131 int size;
2132
2133 if (is_edp(intel_dp)) {
2134 if (!intel_dp->edid)
2135 return NULL;
2136
2137 size = (intel_dp->edid->extensions + 1) * EDID_LENGTH;
2138 edid = kmalloc(size, GFP_KERNEL);
2139 if (!edid)
2140 return NULL;
2141
2142 memcpy(edid, intel_dp->edid, size);
2143 return edid;
2144 }
2119 2145
2120 ironlake_edp_panel_vdd_on(intel_dp);
2121 edid = drm_get_edid(connector, adapter); 2146 edid = drm_get_edid(connector, adapter);
2122 ironlake_edp_panel_vdd_off(intel_dp, false);
2123 return edid; 2147 return edid;
2124} 2148}
2125 2149
@@ -2129,9 +2153,17 @@ intel_dp_get_edid_modes(struct drm_connector *connector, struct i2c_adapter *ada
2129 struct intel_dp *intel_dp = intel_attached_dp(connector); 2153 struct intel_dp *intel_dp = intel_attached_dp(connector);
2130 int ret; 2154 int ret;
2131 2155
2132 ironlake_edp_panel_vdd_on(intel_dp); 2156 if (is_edp(intel_dp)) {
2157 drm_mode_connector_update_edid_property(connector,
2158 intel_dp->edid);
2159 ret = drm_add_edid_modes(connector, intel_dp->edid);
2160 drm_edid_to_eld(connector,
2161 intel_dp->edid);
2162 connector->display_info.raw_edid = NULL;
2163 return intel_dp->edid_mode_count;
2164 }
2165
2133 ret = intel_ddc_get_modes(connector, adapter); 2166 ret = intel_ddc_get_modes(connector, adapter);
2134 ironlake_edp_panel_vdd_off(intel_dp, false);
2135 return ret; 2167 return ret;
2136} 2168}
2137 2169
@@ -2321,6 +2353,7 @@ static void intel_dp_encoder_destroy(struct drm_encoder *encoder)
2321 i2c_del_adapter(&intel_dp->adapter); 2353 i2c_del_adapter(&intel_dp->adapter);
2322 drm_encoder_cleanup(encoder); 2354 drm_encoder_cleanup(encoder);
2323 if (is_edp(intel_dp)) { 2355 if (is_edp(intel_dp)) {
2356 kfree(intel_dp->edid);
2324 cancel_delayed_work_sync(&intel_dp->panel_vdd_work); 2357 cancel_delayed_work_sync(&intel_dp->panel_vdd_work);
2325 ironlake_panel_vdd_off_sync(intel_dp); 2358 ironlake_panel_vdd_off_sync(intel_dp);
2326 } 2359 }
@@ -2504,11 +2537,14 @@ intel_dp_init(struct drm_device *dev, int output_reg)
2504 break; 2537 break;
2505 } 2538 }
2506 2539
2540 intel_dp_i2c_init(intel_dp, intel_connector, name);
2541
2507 /* Cache some DPCD data in the eDP case */ 2542 /* Cache some DPCD data in the eDP case */
2508 if (is_edp(intel_dp)) { 2543 if (is_edp(intel_dp)) {
2509 bool ret; 2544 bool ret;
2510 struct edp_power_seq cur, vbt; 2545 struct edp_power_seq cur, vbt;
2511 u32 pp_on, pp_off, pp_div; 2546 u32 pp_on, pp_off, pp_div;
2547 struct edid *edid;
2512 2548
2513 pp_on = I915_READ(PCH_PP_ON_DELAYS); 2549 pp_on = I915_READ(PCH_PP_ON_DELAYS);
2514 pp_off = I915_READ(PCH_PP_OFF_DELAYS); 2550 pp_off = I915_READ(PCH_PP_OFF_DELAYS);
@@ -2576,9 +2612,19 @@ intel_dp_init(struct drm_device *dev, int output_reg)
2576 intel_dp_destroy(&intel_connector->base); 2612 intel_dp_destroy(&intel_connector->base);
2577 return; 2613 return;
2578 } 2614 }
2579 }
2580 2615
2581 intel_dp_i2c_init(intel_dp, intel_connector, name); 2616 ironlake_edp_panel_vdd_on(intel_dp);
2617 edid = drm_get_edid(connector, &intel_dp->adapter);
2618 if (edid) {
2619 drm_mode_connector_update_edid_property(connector,
2620 edid);
2621 intel_dp->edid_mode_count =
2622 drm_add_edid_modes(connector, edid);
2623 drm_edid_to_eld(connector, edid);
2624 intel_dp->edid = edid;
2625 }
2626 ironlake_edp_panel_vdd_off(intel_dp, false);
2627 }
2582 2628
2583 intel_encoder->hot_plug = intel_dp_hot_plug; 2629 intel_encoder->hot_plug = intel_dp_hot_plug;
2584 2630
diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c
index e7b1ec5ae8c6..486ccdf4aacd 100644
--- a/drivers/gpu/drm/radeon/atombios_encoders.c
+++ b/drivers/gpu/drm/radeon/atombios_encoders.c
@@ -1926,7 +1926,9 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
1926 1926
1927 if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_HDMI) { 1927 if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_HDMI) {
1928 r600_hdmi_enable(encoder); 1928 r600_hdmi_enable(encoder);
1929 if (ASIC_IS_DCE4(rdev)) 1929 if (ASIC_IS_DCE6(rdev))
1930 ; /* TODO (use pointers instead of if-s?) */
1931 else if (ASIC_IS_DCE4(rdev))
1930 evergreen_hdmi_setmode(encoder, adjusted_mode); 1932 evergreen_hdmi_setmode(encoder, adjusted_mode);
1931 else 1933 else
1932 r600_hdmi_setmode(encoder, adjusted_mode); 1934 r600_hdmi_setmode(encoder, adjusted_mode);
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 01550d05e273..7fb3d2e0434c 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -1932,6 +1932,9 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
1932 smx_dc_ctl0 |= NUMBER_OF_SETS(rdev->config.evergreen.sx_num_of_sets); 1932 smx_dc_ctl0 |= NUMBER_OF_SETS(rdev->config.evergreen.sx_num_of_sets);
1933 WREG32(SMX_DC_CTL0, smx_dc_ctl0); 1933 WREG32(SMX_DC_CTL0, smx_dc_ctl0);
1934 1934
1935 if (rdev->family <= CHIP_SUMO2)
1936 WREG32(SMX_SAR_CTL0, 0x00010000);
1937
1935 WREG32(SX_EXPORT_BUFFER_SIZES, (COLOR_BUFFER_SIZE((rdev->config.evergreen.sx_max_export_size / 4) - 1) | 1938 WREG32(SX_EXPORT_BUFFER_SIZES, (COLOR_BUFFER_SIZE((rdev->config.evergreen.sx_max_export_size / 4) - 1) |
1936 POSITION_BUFFER_SIZE((rdev->config.evergreen.sx_max_export_pos_size / 4) - 1) | 1939 POSITION_BUFFER_SIZE((rdev->config.evergreen.sx_max_export_pos_size / 4) - 1) |
1937 SMX_BUFFER_SIZE((rdev->config.evergreen.sx_max_export_smx_size / 4) - 1))); 1940 SMX_BUFFER_SIZE((rdev->config.evergreen.sx_max_export_smx_size / 4) - 1)));
diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.c b/drivers/gpu/drm/radeon/evergreen_hdmi.c
index a51f880985f8..65c54160028b 100644
--- a/drivers/gpu/drm/radeon/evergreen_hdmi.c
+++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c
@@ -156,9 +156,6 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode
156 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 156 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
157 uint32_t offset; 157 uint32_t offset;
158 158
159 if (ASIC_IS_DCE5(rdev))
160 return;
161
162 /* Silent, r600_hdmi_enable will raise WARN for us */ 159 /* Silent, r600_hdmi_enable will raise WARN for us */
163 if (!dig->afmt->enabled) 160 if (!dig->afmt->enabled)
164 return; 161 return;
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index 2773039b4902..b50b15c70498 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -503,6 +503,7 @@
503#define SCRATCH_UMSK 0x8540 503#define SCRATCH_UMSK 0x8540
504#define SCRATCH_ADDR 0x8544 504#define SCRATCH_ADDR 0x8544
505 505
506#define SMX_SAR_CTL0 0xA008
506#define SMX_DC_CTL0 0xA020 507#define SMX_DC_CTL0 0xA020
507#define USE_HASH_FUNCTION (1 << 0) 508#define USE_HASH_FUNCTION (1 << 0)
508#define NUMBER_OF_SETS(x) ((x) << 1) 509#define NUMBER_OF_SETS(x) ((x) << 1)
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 3186522a4458..b7bf18e40215 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1303,6 +1303,10 @@ static int cayman_startup(struct radeon_device *rdev)
1303 if (r) 1303 if (r)
1304 return r; 1304 return r;
1305 1305
1306 r = r600_audio_init(rdev);
1307 if (r)
1308 return r;
1309
1306 return 0; 1310 return 0;
1307} 1311}
1308 1312
@@ -1329,6 +1333,7 @@ int cayman_resume(struct radeon_device *rdev)
1329 1333
1330int cayman_suspend(struct radeon_device *rdev) 1334int cayman_suspend(struct radeon_device *rdev)
1331{ 1335{
1336 r600_audio_fini(rdev);
1332 /* FIXME: we should wait for ring to be empty */ 1337 /* FIXME: we should wait for ring to be empty */
1333 radeon_ib_pool_suspend(rdev); 1338 radeon_ib_pool_suspend(rdev);
1334 radeon_vm_manager_suspend(rdev); 1339 radeon_vm_manager_suspend(rdev);
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index f30dc95f83b1..bff627293812 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1839,6 +1839,7 @@ void r600_gpu_init(struct radeon_device *rdev)
1839 WREG32(PA_CL_ENHANCE, (CLIP_VTX_REORDER_ENA | 1839 WREG32(PA_CL_ENHANCE, (CLIP_VTX_REORDER_ENA |
1840 NUM_CLIP_SEQ(3))); 1840 NUM_CLIP_SEQ(3)));
1841 WREG32(PA_SC_ENHANCE, FORCE_EOV_MAX_CLK_CNT(4095)); 1841 WREG32(PA_SC_ENHANCE, FORCE_EOV_MAX_CLK_CNT(4095));
1842 WREG32(VC_ENHANCE, 0);
1842} 1843}
1843 1844
1844 1845
diff --git a/drivers/gpu/drm/radeon/r600_audio.c b/drivers/gpu/drm/radeon/r600_audio.c
index 7479a5c503e4..79b55916cf90 100644
--- a/drivers/gpu/drm/radeon/r600_audio.c
+++ b/drivers/gpu/drm/radeon/r600_audio.c
@@ -57,7 +57,7 @@ static bool radeon_dig_encoder(struct drm_encoder *encoder)
57 */ 57 */
58static int r600_audio_chipset_supported(struct radeon_device *rdev) 58static int r600_audio_chipset_supported(struct radeon_device *rdev)
59{ 59{
60 return (rdev->family >= CHIP_R600 && !ASIC_IS_DCE5(rdev)) 60 return (rdev->family >= CHIP_R600 && !ASIC_IS_DCE6(rdev))
61 || rdev->family == CHIP_RS600 61 || rdev->family == CHIP_RS600
62 || rdev->family == CHIP_RS690 62 || rdev->family == CHIP_RS690
63 || rdev->family == CHIP_RS740; 63 || rdev->family == CHIP_RS740;
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
index 0133f5f09bd6..ca87f7afaf23 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -2079,6 +2079,48 @@ static int r600_packet3_check(struct radeon_cs_parser *p,
2079 return -EINVAL; 2079 return -EINVAL;
2080 } 2080 }
2081 break; 2081 break;
2082 case PACKET3_STRMOUT_BASE_UPDATE:
2083 if (p->family < CHIP_RV770) {
2084 DRM_ERROR("STRMOUT_BASE_UPDATE only supported on 7xx\n");
2085 return -EINVAL;
2086 }
2087 if (pkt->count != 1) {
2088 DRM_ERROR("bad STRMOUT_BASE_UPDATE packet count\n");
2089 return -EINVAL;
2090 }
2091 if (idx_value > 3) {
2092 DRM_ERROR("bad STRMOUT_BASE_UPDATE index\n");
2093 return -EINVAL;
2094 }
2095 {
2096 u64 offset;
2097
2098 r = r600_cs_packet_next_reloc(p, &reloc);
2099 if (r) {
2100 DRM_ERROR("bad STRMOUT_BASE_UPDATE reloc\n");
2101 return -EINVAL;
2102 }
2103
2104 if (reloc->robj != track->vgt_strmout_bo[idx_value]) {
2105 DRM_ERROR("bad STRMOUT_BASE_UPDATE, bo does not match\n");
2106 return -EINVAL;
2107 }
2108
2109 offset = radeon_get_ib_value(p, idx+1) << 8;
2110 if (offset != track->vgt_strmout_bo_offset[idx_value]) {
2111 DRM_ERROR("bad STRMOUT_BASE_UPDATE, bo offset does not match: 0x%llx, 0x%x\n",
2112 offset, track->vgt_strmout_bo_offset[idx_value]);
2113 return -EINVAL;
2114 }
2115
2116 if ((offset + 4) > radeon_bo_size(reloc->robj)) {
2117 DRM_ERROR("bad STRMOUT_BASE_UPDATE bo too small: 0x%llx, 0x%lx\n",
2118 offset + 4, radeon_bo_size(reloc->robj));
2119 return -EINVAL;
2120 }
2121 ib[idx+1] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);
2122 }
2123 break;
2082 case PACKET3_SURFACE_BASE_UPDATE: 2124 case PACKET3_SURFACE_BASE_UPDATE:
2083 if (p->family >= CHIP_RV770 || p->family == CHIP_R600) { 2125 if (p->family >= CHIP_RV770 || p->family == CHIP_R600) {
2084 DRM_ERROR("bad SURFACE_BASE_UPDATE\n"); 2126 DRM_ERROR("bad SURFACE_BASE_UPDATE\n");
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c
index 969c27529dfe..82a0a4c919c0 100644
--- a/drivers/gpu/drm/radeon/r600_hdmi.c
+++ b/drivers/gpu/drm/radeon/r600_hdmi.c
@@ -322,9 +322,6 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod
322 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 322 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
323 uint32_t offset; 323 uint32_t offset;
324 324
325 if (ASIC_IS_DCE5(rdev))
326 return;
327
328 /* Silent, r600_hdmi_enable will raise WARN for us */ 325 /* Silent, r600_hdmi_enable will raise WARN for us */
329 if (!dig->afmt->enabled) 326 if (!dig->afmt->enabled)
330 return; 327 return;
@@ -483,7 +480,7 @@ void r600_hdmi_enable(struct drm_encoder *encoder)
483 uint32_t offset; 480 uint32_t offset;
484 u32 hdmi; 481 u32 hdmi;
485 482
486 if (ASIC_IS_DCE5(rdev)) 483 if (ASIC_IS_DCE6(rdev))
487 return; 484 return;
488 485
489 /* Silent, r600_hdmi_enable will raise WARN for us */ 486 /* Silent, r600_hdmi_enable will raise WARN for us */
@@ -543,7 +540,7 @@ void r600_hdmi_disable(struct drm_encoder *encoder)
543 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 540 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
544 uint32_t offset; 541 uint32_t offset;
545 542
546 if (ASIC_IS_DCE5(rdev)) 543 if (ASIC_IS_DCE6(rdev))
547 return; 544 return;
548 545
549 /* Called for ATOM_ENCODER_MODE_HDMI only */ 546 /* Called for ATOM_ENCODER_MODE_HDMI only */
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
index a0dbf1fe6a40..025fd5b6c08c 100644
--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -485,6 +485,7 @@
485#define TC_L2_SIZE(x) ((x)<<5) 485#define TC_L2_SIZE(x) ((x)<<5)
486#define L2_DISABLE_LATE_HIT (1<<9) 486#define L2_DISABLE_LATE_HIT (1<<9)
487 487
488#define VC_ENHANCE 0x9714
488 489
489#define VGT_CACHE_INVALIDATION 0x88C4 490#define VGT_CACHE_INVALIDATION 0x88C4
490#define CACHE_INVALIDATION(x) ((x)<<0) 491#define CACHE_INVALIDATION(x) ((x)<<0)
@@ -1163,6 +1164,7 @@
1163#define PACKET3_SET_CTL_CONST 0x6F 1164#define PACKET3_SET_CTL_CONST 0x6F
1164#define PACKET3_SET_CTL_CONST_OFFSET 0x0003cff0 1165#define PACKET3_SET_CTL_CONST_OFFSET 0x0003cff0
1165#define PACKET3_SET_CTL_CONST_END 0x0003e200 1166#define PACKET3_SET_CTL_CONST_END 0x0003e200
1167#define PACKET3_STRMOUT_BASE_UPDATE 0x72 /* r7xx */
1166#define PACKET3_SURFACE_BASE_UPDATE 0x73 1168#define PACKET3_SURFACE_BASE_UPDATE 0x73
1167 1169
1168 1170
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index 03e5f5df40f1..2c4d53fd20c5 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -58,9 +58,10 @@
58 * 2.14.0 - add evergreen tiling informations 58 * 2.14.0 - add evergreen tiling informations
59 * 2.15.0 - add max_pipes query 59 * 2.15.0 - add max_pipes query
60 * 2.16.0 - fix evergreen 2D tiled surface calculation 60 * 2.16.0 - fix evergreen 2D tiled surface calculation
61 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
61 */ 62 */
62#define KMS_DRIVER_MAJOR 2 63#define KMS_DRIVER_MAJOR 2
63#define KMS_DRIVER_MINOR 16 64#define KMS_DRIVER_MINOR 17
64#define KMS_DRIVER_PATCHLEVEL 0 65#define KMS_DRIVER_PATCHLEVEL 0
65int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); 66int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
66int radeon_driver_unload_kms(struct drm_device *dev); 67int radeon_driver_unload_kms(struct drm_device *dev);
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index 08825548ee69..5b37e283ec38 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -801,9 +801,13 @@ static void radeon_dynpm_idle_work_handler(struct work_struct *work)
801 int i; 801 int i;
802 802
803 for (i = 0; i < RADEON_NUM_RINGS; ++i) { 803 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
804 not_processed += radeon_fence_count_emitted(rdev, i); 804 struct radeon_ring *ring = &rdev->ring[i];
805 if (not_processed >= 3) 805
806 break; 806 if (ring->ready) {
807 not_processed += radeon_fence_count_emitted(rdev, i);
808 if (not_processed >= 3)
809 break;
810 }
807 } 811 }
808 812
809 if (not_processed >= 3) { /* should upclock */ 813 if (not_processed >= 3) { /* should upclock */
diff --git a/drivers/gpu/drm/radeon/radeon_prime.c b/drivers/gpu/drm/radeon/radeon_prime.c
index 8ddab4c76710..6bef46ace831 100644
--- a/drivers/gpu/drm/radeon/radeon_prime.c
+++ b/drivers/gpu/drm/radeon/radeon_prime.c
@@ -169,11 +169,17 @@ struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
169 struct radeon_bo *bo = gem_to_radeon_bo(obj); 169 struct radeon_bo *bo = gem_to_radeon_bo(obj);
170 int ret = 0; 170 int ret = 0;
171 171
172 ret = radeon_bo_reserve(bo, false);
173 if (unlikely(ret != 0))
174 return ERR_PTR(ret);
175
172 /* pin buffer into GTT */ 176 /* pin buffer into GTT */
173 ret = radeon_bo_pin(bo, RADEON_GEM_DOMAIN_GTT, NULL); 177 ret = radeon_bo_pin(bo, RADEON_GEM_DOMAIN_GTT, NULL);
174 if (ret) 178 if (ret) {
179 radeon_bo_unreserve(bo);
175 return ERR_PTR(ret); 180 return ERR_PTR(ret);
176 181 }
182 radeon_bo_unreserve(bo);
177 return dma_buf_export(bo, &radeon_dmabuf_ops, obj->size, flags); 183 return dma_buf_export(bo, &radeon_dmabuf_ops, obj->size, flags);
178} 184}
179 185
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 4ad0281fdc37..b4f51c569c36 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -616,6 +616,9 @@ static void rv770_gpu_init(struct radeon_device *rdev)
616 ACK_FLUSH_CTL(3) | 616 ACK_FLUSH_CTL(3) |
617 SYNC_FLUSH_CTL)); 617 SYNC_FLUSH_CTL));
618 618
619 if (rdev->family != CHIP_RV770)
620 WREG32(SMX_SAR_CTL0, 0x00003f3f);
621
619 db_debug3 = RREG32(DB_DEBUG3); 622 db_debug3 = RREG32(DB_DEBUG3);
620 db_debug3 &= ~DB_CLK_OFF_DELAY(0x1f); 623 db_debug3 &= ~DB_CLK_OFF_DELAY(0x1f);
621 switch (rdev->family) { 624 switch (rdev->family) {
@@ -792,7 +795,7 @@ static void rv770_gpu_init(struct radeon_device *rdev)
792 795
793 WREG32(PA_CL_ENHANCE, (CLIP_VTX_REORDER_ENA | 796 WREG32(PA_CL_ENHANCE, (CLIP_VTX_REORDER_ENA |
794 NUM_CLIP_SEQ(3))); 797 NUM_CLIP_SEQ(3)));
795 798 WREG32(VC_ENHANCE, 0);
796} 799}
797 800
798void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc) 801void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc)
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h
index fdc089896011..b0adfc595d75 100644
--- a/drivers/gpu/drm/radeon/rv770d.h
+++ b/drivers/gpu/drm/radeon/rv770d.h
@@ -211,6 +211,7 @@
211#define SCRATCH_UMSK 0x8540 211#define SCRATCH_UMSK 0x8540
212#define SCRATCH_ADDR 0x8544 212#define SCRATCH_ADDR 0x8544
213 213
214#define SMX_SAR_CTL0 0xA008
214#define SMX_DC_CTL0 0xA020 215#define SMX_DC_CTL0 0xA020
215#define USE_HASH_FUNCTION (1 << 0) 216#define USE_HASH_FUNCTION (1 << 0)
216#define CACHE_DEPTH(x) ((x) << 1) 217#define CACHE_DEPTH(x) ((x) << 1)
@@ -310,6 +311,8 @@
310#define TCP_CNTL 0x9610 311#define TCP_CNTL 0x9610
311#define TCP_CHAN_STEER 0x9614 312#define TCP_CHAN_STEER 0x9614
312 313
314#define VC_ENHANCE 0x9714
315
313#define VGT_CACHE_INVALIDATION 0x88C4 316#define VGT_CACHE_INVALIDATION 0x88C4
314#define CACHE_INVALIDATION(x) ((x)<<0) 317#define CACHE_INVALIDATION(x) ((x)<<0)
315#define VC_ONLY 0 318#define VC_ONLY 0
diff --git a/drivers/gpu/drm/sis/sis_drv.c b/drivers/gpu/drm/sis/sis_drv.c
index 30d98d14b5c5..dd14cd1a0033 100644
--- a/drivers/gpu/drm/sis/sis_drv.c
+++ b/drivers/gpu/drm/sis/sis_drv.c
@@ -47,9 +47,9 @@ static int sis_driver_load(struct drm_device *dev, unsigned long chipset)
47 if (dev_priv == NULL) 47 if (dev_priv == NULL)
48 return -ENOMEM; 48 return -ENOMEM;
49 49
50 idr_init(&dev_priv->object_idr);
50 dev->dev_private = (void *)dev_priv; 51 dev->dev_private = (void *)dev_priv;
51 dev_priv->chipset = chipset; 52 dev_priv->chipset = chipset;
52 idr_init(&dev->object_name_idr);
53 53
54 return 0; 54 return 0;
55} 55}
diff --git a/drivers/gpu/drm/udl/udl_drv.c b/drivers/gpu/drm/udl/udl_drv.c
index 4d02c46a9420..6e52069894b3 100644
--- a/drivers/gpu/drm/udl/udl_drv.c
+++ b/drivers/gpu/drm/udl/udl_drv.c
@@ -13,8 +13,21 @@
13 13
14static struct drm_driver driver; 14static struct drm_driver driver;
15 15
16/*
17 * There are many DisplayLink-based graphics products, all with unique PIDs.
18 * So we match on DisplayLink's VID + Vendor-Defined Interface Class (0xff)
19 * We also require a match on SubClass (0x00) and Protocol (0x00),
20 * which is compatible with all known USB 2.0 era graphics chips and firmware,
21 * but allows DisplayLink to increment those for any future incompatible chips
22 */
16static struct usb_device_id id_table[] = { 23static struct usb_device_id id_table[] = {
17 {.idVendor = 0x17e9, .match_flags = USB_DEVICE_ID_MATCH_VENDOR,}, 24 {.idVendor = 0x17e9, .bInterfaceClass = 0xff,
25 .bInterfaceSubClass = 0x00,
26 .bInterfaceProtocol = 0x00,
27 .match_flags = USB_DEVICE_ID_MATCH_VENDOR |
28 USB_DEVICE_ID_MATCH_INT_CLASS |
29 USB_DEVICE_ID_MATCH_INT_SUBCLASS |
30 USB_DEVICE_ID_MATCH_INT_PROTOCOL,},
18 {}, 31 {},
19}; 32};
20MODULE_DEVICE_TABLE(usb, id_table); 33MODULE_DEVICE_TABLE(usb, id_table);
diff --git a/drivers/gpu/drm/via/via_map.c b/drivers/gpu/drm/via/via_map.c
index 1f182254e81e..c126182ac07e 100644
--- a/drivers/gpu/drm/via/via_map.c
+++ b/drivers/gpu/drm/via/via_map.c
@@ -100,12 +100,11 @@ int via_driver_load(struct drm_device *dev, unsigned long chipset)
100 if (dev_priv == NULL) 100 if (dev_priv == NULL)
101 return -ENOMEM; 101 return -ENOMEM;
102 102
103 idr_init(&dev_priv->object_idr);
103 dev->dev_private = (void *)dev_priv; 104 dev->dev_private = (void *)dev_priv;
104 105
105 dev_priv->chipset = chipset; 106 dev_priv->chipset = chipset;
106 107
107 idr_init(&dev->object_name_idr);
108
109 pci_set_master(dev->pdev); 108 pci_set_master(dev->pdev);
110 109
111 ret = drm_vblank_init(dev, 1); 110 ret = drm_vblank_init(dev, 1);
diff --git a/include/linux/vga_switcheroo.h b/include/linux/vga_switcheroo.h
index 60da41fe9dc2..d844b7790ea6 100644
--- a/include/linux/vga_switcheroo.h
+++ b/include/linux/vga_switcheroo.h
@@ -9,6 +9,8 @@
9 9
10#include <linux/fb.h> 10#include <linux/fb.h>
11 11
12struct pci_dev;
13
12enum vga_switcheroo_state { 14enum vga_switcheroo_state {
13 VGA_SWITCHEROO_OFF, 15 VGA_SWITCHEROO_OFF,
14 VGA_SWITCHEROO_ON, 16 VGA_SWITCHEROO_ON,