diff options
author | Georgi Djakov <georgi.djakov@linaro.org> | 2015-03-20 12:30:25 -0400 |
---|---|---|
committer | Stephen Boyd <sboyd@codeaurora.org> | 2015-03-23 19:09:18 -0400 |
commit | fae507afbdf3384227ced662c51c5b6cbff223c8 (patch) | |
tree | 878766b4166ae9dfbd5e8d46d6f6889cae98416e | |
parent | 7f218978f10693f65e35b0bbcdcd539fbe78221a (diff) |
clk: qcom: Do some error handling in configure_bank()
Currently configure_bank() returns void. Add some error
checking on the regmap calls and propagate if there is
any error.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-rw-r--r-- | drivers/clk/qcom/clk-rcg.c | 63 |
1 files changed, 42 insertions, 21 deletions
diff --git a/drivers/clk/qcom/clk-rcg.c b/drivers/clk/qcom/clk-rcg.c index 59a093e56366..2c5d85961f54 100644 --- a/drivers/clk/qcom/clk-rcg.c +++ b/drivers/clk/qcom/clk-rcg.c | |||
@@ -203,10 +203,10 @@ static u32 mn_to_reg(struct mn *mn, u32 m, u32 n, u32 val) | |||
203 | return val; | 203 | return val; |
204 | } | 204 | } |
205 | 205 | ||
206 | static void configure_bank(struct clk_dyn_rcg *rcg, const struct freq_tbl *f) | 206 | static int configure_bank(struct clk_dyn_rcg *rcg, const struct freq_tbl *f) |
207 | { | 207 | { |
208 | u32 ns, md, reg; | 208 | u32 ns, md, reg; |
209 | int bank, new_bank; | 209 | int bank, new_bank, ret; |
210 | struct mn *mn; | 210 | struct mn *mn; |
211 | struct pre_div *p; | 211 | struct pre_div *p; |
212 | struct src_sel *s; | 212 | struct src_sel *s; |
@@ -218,38 +218,56 @@ static void configure_bank(struct clk_dyn_rcg *rcg, const struct freq_tbl *f) | |||
218 | 218 | ||
219 | enabled = __clk_is_enabled(hw->clk); | 219 | enabled = __clk_is_enabled(hw->clk); |
220 | 220 | ||
221 | regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®); | 221 | ret = regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®); |
222 | if (ret) | ||
223 | return ret; | ||
222 | bank = reg_to_bank(rcg, reg); | 224 | bank = reg_to_bank(rcg, reg); |
223 | new_bank = enabled ? !bank : bank; | 225 | new_bank = enabled ? !bank : bank; |
224 | 226 | ||
225 | ns_reg = rcg->ns_reg[new_bank]; | 227 | ns_reg = rcg->ns_reg[new_bank]; |
226 | regmap_read(rcg->clkr.regmap, ns_reg, &ns); | 228 | ret = regmap_read(rcg->clkr.regmap, ns_reg, &ns); |
229 | if (ret) | ||
230 | return ret; | ||
227 | 231 | ||
228 | if (banked_mn) { | 232 | if (banked_mn) { |
229 | mn = &rcg->mn[new_bank]; | 233 | mn = &rcg->mn[new_bank]; |
230 | md_reg = rcg->md_reg[new_bank]; | 234 | md_reg = rcg->md_reg[new_bank]; |
231 | 235 | ||
232 | ns |= BIT(mn->mnctr_reset_bit); | 236 | ns |= BIT(mn->mnctr_reset_bit); |
233 | regmap_write(rcg->clkr.regmap, ns_reg, ns); | 237 | ret = regmap_write(rcg->clkr.regmap, ns_reg, ns); |
238 | if (ret) | ||
239 | return ret; | ||
234 | 240 | ||
235 | regmap_read(rcg->clkr.regmap, md_reg, &md); | 241 | ret = regmap_read(rcg->clkr.regmap, md_reg, &md); |
242 | if (ret) | ||
243 | return ret; | ||
236 | md = mn_to_md(mn, f->m, f->n, md); | 244 | md = mn_to_md(mn, f->m, f->n, md); |
237 | regmap_write(rcg->clkr.regmap, md_reg, md); | 245 | ret = regmap_write(rcg->clkr.regmap, md_reg, md); |
238 | 246 | if (ret) | |
247 | return ret; | ||
239 | ns = mn_to_ns(mn, f->m, f->n, ns); | 248 | ns = mn_to_ns(mn, f->m, f->n, ns); |
240 | regmap_write(rcg->clkr.regmap, ns_reg, ns); | 249 | ret = regmap_write(rcg->clkr.regmap, ns_reg, ns); |
250 | if (ret) | ||
251 | return ret; | ||
241 | 252 | ||
242 | /* Two NS registers means mode control is in NS register */ | 253 | /* Two NS registers means mode control is in NS register */ |
243 | if (rcg->ns_reg[0] != rcg->ns_reg[1]) { | 254 | if (rcg->ns_reg[0] != rcg->ns_reg[1]) { |
244 | ns = mn_to_reg(mn, f->m, f->n, ns); | 255 | ns = mn_to_reg(mn, f->m, f->n, ns); |
245 | regmap_write(rcg->clkr.regmap, ns_reg, ns); | 256 | ret = regmap_write(rcg->clkr.regmap, ns_reg, ns); |
257 | if (ret) | ||
258 | return ret; | ||
246 | } else { | 259 | } else { |
247 | reg = mn_to_reg(mn, f->m, f->n, reg); | 260 | reg = mn_to_reg(mn, f->m, f->n, reg); |
248 | regmap_write(rcg->clkr.regmap, rcg->bank_reg, reg); | 261 | ret = regmap_write(rcg->clkr.regmap, rcg->bank_reg, |
262 | reg); | ||
263 | if (ret) | ||
264 | return ret; | ||
249 | } | 265 | } |
250 | 266 | ||
251 | ns &= ~BIT(mn->mnctr_reset_bit); | 267 | ns &= ~BIT(mn->mnctr_reset_bit); |
252 | regmap_write(rcg->clkr.regmap, ns_reg, ns); | 268 | ret = regmap_write(rcg->clkr.regmap, ns_reg, ns); |
269 | if (ret) | ||
270 | return ret; | ||
253 | } | 271 | } |
254 | 272 | ||
255 | if (banked_p) { | 273 | if (banked_p) { |
@@ -259,13 +277,20 @@ static void configure_bank(struct clk_dyn_rcg *rcg, const struct freq_tbl *f) | |||
259 | 277 | ||
260 | s = &rcg->s[new_bank]; | 278 | s = &rcg->s[new_bank]; |
261 | ns = src_to_ns(s, s->parent_map[f->src], ns); | 279 | ns = src_to_ns(s, s->parent_map[f->src], ns); |
262 | regmap_write(rcg->clkr.regmap, ns_reg, ns); | 280 | ret = regmap_write(rcg->clkr.regmap, ns_reg, ns); |
281 | if (ret) | ||
282 | return ret; | ||
263 | 283 | ||
264 | if (enabled) { | 284 | if (enabled) { |
265 | regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®); | 285 | ret = regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®); |
286 | if (ret) | ||
287 | return ret; | ||
266 | reg ^= BIT(rcg->mux_sel_bit); | 288 | reg ^= BIT(rcg->mux_sel_bit); |
267 | regmap_write(rcg->clkr.regmap, rcg->bank_reg, reg); | 289 | ret = regmap_write(rcg->clkr.regmap, rcg->bank_reg, reg); |
290 | if (ret) | ||
291 | return ret; | ||
268 | } | 292 | } |
293 | return 0; | ||
269 | } | 294 | } |
270 | 295 | ||
271 | static int clk_dyn_rcg_set_parent(struct clk_hw *hw, u8 index) | 296 | static int clk_dyn_rcg_set_parent(struct clk_hw *hw, u8 index) |
@@ -292,9 +317,7 @@ static int clk_dyn_rcg_set_parent(struct clk_hw *hw, u8 index) | |||
292 | f.pre_div = ns_to_pre_div(&rcg->p[bank], ns) + 1; | 317 | f.pre_div = ns_to_pre_div(&rcg->p[bank], ns) + 1; |
293 | 318 | ||
294 | f.src = index; | 319 | f.src = index; |
295 | configure_bank(rcg, &f); | 320 | return configure_bank(rcg, &f); |
296 | |||
297 | return 0; | ||
298 | } | 321 | } |
299 | 322 | ||
300 | /* | 323 | /* |
@@ -567,9 +590,7 @@ static int __clk_dyn_rcg_set_rate(struct clk_hw *hw, unsigned long rate) | |||
567 | if (!f) | 590 | if (!f) |
568 | return -EINVAL; | 591 | return -EINVAL; |
569 | 592 | ||
570 | configure_bank(rcg, f); | 593 | return configure_bank(rcg, f); |
571 | |||
572 | return 0; | ||
573 | } | 594 | } |
574 | 595 | ||
575 | static int clk_dyn_rcg_set_rate(struct clk_hw *hw, unsigned long rate, | 596 | static int clk_dyn_rcg_set_rate(struct clk_hw *hw, unsigned long rate, |