diff options
author | Ilia Mirkin <imirkin@alum.mit.edu> | 2014-02-05 14:33:02 -0500 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2014-02-17 19:36:45 -0500 |
commit | fa8c9ac72fe0bcdf5bc7cc84e85cc2a1af53f9fd (patch) | |
tree | 02369541335e85511dea682c55f5c70ed2f9963d | |
parent | 7d3428cd4b2ad51af86fdbdf8284ca38fa95e601 (diff) |
drm/nv4c/mc: nv4x igp's have a different msi rearm register
See https://bugs.freedesktop.org/show_bug.cgi?id=74492
Reported-by: Ronald <ronald645@gmail.com>
Suggested-by: Marcin KoĆcielnicki <koriakin@0x04.net>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
-rw-r--r-- | drivers/gpu/drm/nouveau/Makefile | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/device/nv40.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/core/include/subdev/mc.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/mc/nv04.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/mc/nv44.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/mc/nv4c.c | 45 |
6 files changed, 54 insertions, 6 deletions
diff --git a/drivers/gpu/drm/nouveau/Makefile b/drivers/gpu/drm/nouveau/Makefile index e88145ba1bf5..d310c195bdfe 100644 --- a/drivers/gpu/drm/nouveau/Makefile +++ b/drivers/gpu/drm/nouveau/Makefile | |||
@@ -141,6 +141,7 @@ nouveau-y += core/subdev/mc/base.o | |||
141 | nouveau-y += core/subdev/mc/nv04.o | 141 | nouveau-y += core/subdev/mc/nv04.o |
142 | nouveau-y += core/subdev/mc/nv40.o | 142 | nouveau-y += core/subdev/mc/nv40.o |
143 | nouveau-y += core/subdev/mc/nv44.o | 143 | nouveau-y += core/subdev/mc/nv44.o |
144 | nouveau-y += core/subdev/mc/nv4c.o | ||
144 | nouveau-y += core/subdev/mc/nv50.o | 145 | nouveau-y += core/subdev/mc/nv50.o |
145 | nouveau-y += core/subdev/mc/nv94.o | 146 | nouveau-y += core/subdev/mc/nv94.o |
146 | nouveau-y += core/subdev/mc/nv98.o | 147 | nouveau-y += core/subdev/mc/nv98.o |
diff --git a/drivers/gpu/drm/nouveau/core/engine/device/nv40.c b/drivers/gpu/drm/nouveau/core/engine/device/nv40.c index 1b653dd74a70..08b88591ed60 100644 --- a/drivers/gpu/drm/nouveau/core/engine/device/nv40.c +++ b/drivers/gpu/drm/nouveau/core/engine/device/nv40.c | |||
@@ -311,7 +311,7 @@ nv40_identify(struct nouveau_device *device) | |||
311 | device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv40_clock_oclass; | 311 | device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv40_clock_oclass; |
312 | device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; | 312 | device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; |
313 | device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass; | 313 | device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass; |
314 | device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass; | 314 | device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass; |
315 | device->oclass[NVDEV_SUBDEV_BUS ] = nv31_bus_oclass; | 315 | device->oclass[NVDEV_SUBDEV_BUS ] = nv31_bus_oclass; |
316 | device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; | 316 | device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; |
317 | device->oclass[NVDEV_SUBDEV_FB ] = nv46_fb_oclass; | 317 | device->oclass[NVDEV_SUBDEV_FB ] = nv46_fb_oclass; |
@@ -334,7 +334,7 @@ nv40_identify(struct nouveau_device *device) | |||
334 | device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv40_clock_oclass; | 334 | device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv40_clock_oclass; |
335 | device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; | 335 | device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; |
336 | device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass; | 336 | device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass; |
337 | device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass; | 337 | device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass; |
338 | device->oclass[NVDEV_SUBDEV_BUS ] = nv31_bus_oclass; | 338 | device->oclass[NVDEV_SUBDEV_BUS ] = nv31_bus_oclass; |
339 | device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; | 339 | device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; |
340 | device->oclass[NVDEV_SUBDEV_FB ] = nv4e_fb_oclass; | 340 | device->oclass[NVDEV_SUBDEV_FB ] = nv4e_fb_oclass; |
@@ -357,7 +357,7 @@ nv40_identify(struct nouveau_device *device) | |||
357 | device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv40_clock_oclass; | 357 | device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv40_clock_oclass; |
358 | device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; | 358 | device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; |
359 | device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass; | 359 | device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass; |
360 | device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass; | 360 | device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass; |
361 | device->oclass[NVDEV_SUBDEV_BUS ] = nv31_bus_oclass; | 361 | device->oclass[NVDEV_SUBDEV_BUS ] = nv31_bus_oclass; |
362 | device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; | 362 | device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; |
363 | device->oclass[NVDEV_SUBDEV_FB ] = nv46_fb_oclass; | 363 | device->oclass[NVDEV_SUBDEV_FB ] = nv46_fb_oclass; |
@@ -380,7 +380,7 @@ nv40_identify(struct nouveau_device *device) | |||
380 | device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv40_clock_oclass; | 380 | device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv40_clock_oclass; |
381 | device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; | 381 | device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; |
382 | device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass; | 382 | device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass; |
383 | device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass; | 383 | device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass; |
384 | device->oclass[NVDEV_SUBDEV_BUS ] = nv31_bus_oclass; | 384 | device->oclass[NVDEV_SUBDEV_BUS ] = nv31_bus_oclass; |
385 | device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; | 385 | device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; |
386 | device->oclass[NVDEV_SUBDEV_FB ] = nv46_fb_oclass; | 386 | device->oclass[NVDEV_SUBDEV_FB ] = nv46_fb_oclass; |
@@ -403,7 +403,7 @@ nv40_identify(struct nouveau_device *device) | |||
403 | device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv40_clock_oclass; | 403 | device->oclass[NVDEV_SUBDEV_CLOCK ] = &nv40_clock_oclass; |
404 | device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; | 404 | device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass; |
405 | device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass; | 405 | device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass; |
406 | device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass; | 406 | device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass; |
407 | device->oclass[NVDEV_SUBDEV_BUS ] = nv31_bus_oclass; | 407 | device->oclass[NVDEV_SUBDEV_BUS ] = nv31_bus_oclass; |
408 | device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; | 408 | device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; |
409 | device->oclass[NVDEV_SUBDEV_FB ] = nv46_fb_oclass; | 409 | device->oclass[NVDEV_SUBDEV_FB ] = nv46_fb_oclass; |
diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/mc.h b/drivers/gpu/drm/nouveau/core/include/subdev/mc.h index adc88b73d911..3c6738edd127 100644 --- a/drivers/gpu/drm/nouveau/core/include/subdev/mc.h +++ b/drivers/gpu/drm/nouveau/core/include/subdev/mc.h | |||
@@ -47,6 +47,7 @@ struct nouveau_mc_oclass { | |||
47 | extern struct nouveau_oclass *nv04_mc_oclass; | 47 | extern struct nouveau_oclass *nv04_mc_oclass; |
48 | extern struct nouveau_oclass *nv40_mc_oclass; | 48 | extern struct nouveau_oclass *nv40_mc_oclass; |
49 | extern struct nouveau_oclass *nv44_mc_oclass; | 49 | extern struct nouveau_oclass *nv44_mc_oclass; |
50 | extern struct nouveau_oclass *nv4c_mc_oclass; | ||
50 | extern struct nouveau_oclass *nv50_mc_oclass; | 51 | extern struct nouveau_oclass *nv50_mc_oclass; |
51 | extern struct nouveau_oclass *nv94_mc_oclass; | 52 | extern struct nouveau_oclass *nv94_mc_oclass; |
52 | extern struct nouveau_oclass *nv98_mc_oclass; | 53 | extern struct nouveau_oclass *nv98_mc_oclass; |
diff --git a/drivers/gpu/drm/nouveau/core/subdev/mc/nv04.h b/drivers/gpu/drm/nouveau/core/subdev/mc/nv04.h index b0d5c31606c1..81a408e7d034 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/mc/nv04.h +++ b/drivers/gpu/drm/nouveau/core/subdev/mc/nv04.h | |||
@@ -14,6 +14,7 @@ int nv04_mc_ctor(struct nouveau_object *, struct nouveau_object *, | |||
14 | extern const struct nouveau_mc_intr nv04_mc_intr[]; | 14 | extern const struct nouveau_mc_intr nv04_mc_intr[]; |
15 | int nv04_mc_init(struct nouveau_object *); | 15 | int nv04_mc_init(struct nouveau_object *); |
16 | void nv40_mc_msi_rearm(struct nouveau_mc *); | 16 | void nv40_mc_msi_rearm(struct nouveau_mc *); |
17 | int nv44_mc_init(struct nouveau_object *object); | ||
17 | int nv50_mc_init(struct nouveau_object *); | 18 | int nv50_mc_init(struct nouveau_object *); |
18 | extern const struct nouveau_mc_intr nv50_mc_intr[]; | 19 | extern const struct nouveau_mc_intr nv50_mc_intr[]; |
19 | extern const struct nouveau_mc_intr nvc0_mc_intr[]; | 20 | extern const struct nouveau_mc_intr nvc0_mc_intr[]; |
diff --git a/drivers/gpu/drm/nouveau/core/subdev/mc/nv44.c b/drivers/gpu/drm/nouveau/core/subdev/mc/nv44.c index 3bfee5c6c4f2..cc4d0d2d886e 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/mc/nv44.c +++ b/drivers/gpu/drm/nouveau/core/subdev/mc/nv44.c | |||
@@ -24,7 +24,7 @@ | |||
24 | 24 | ||
25 | #include "nv04.h" | 25 | #include "nv04.h" |
26 | 26 | ||
27 | static int | 27 | int |
28 | nv44_mc_init(struct nouveau_object *object) | 28 | nv44_mc_init(struct nouveau_object *object) |
29 | { | 29 | { |
30 | struct nv04_mc_priv *priv = (void *)object; | 30 | struct nv04_mc_priv *priv = (void *)object; |
diff --git a/drivers/gpu/drm/nouveau/core/subdev/mc/nv4c.c b/drivers/gpu/drm/nouveau/core/subdev/mc/nv4c.c new file mode 100644 index 000000000000..a75c35ccf25c --- /dev/null +++ b/drivers/gpu/drm/nouveau/core/subdev/mc/nv4c.c | |||
@@ -0,0 +1,45 @@ | |||
1 | /* | ||
2 | * Copyright 2014 Ilia Mirkin | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||
20 | * OTHER DEALINGS IN THE SOFTWARE. | ||
21 | * | ||
22 | * Authors: Ilia Mirkin | ||
23 | */ | ||
24 | |||
25 | #include "nv04.h" | ||
26 | |||
27 | static void | ||
28 | nv4c_mc_msi_rearm(struct nouveau_mc *pmc) | ||
29 | { | ||
30 | struct nv04_mc_priv *priv = (void *)pmc; | ||
31 | nv_wr08(priv, 0x088050, 0xff); | ||
32 | } | ||
33 | |||
34 | struct nouveau_oclass * | ||
35 | nv4c_mc_oclass = &(struct nouveau_mc_oclass) { | ||
36 | .base.handle = NV_SUBDEV(MC, 0x4c), | ||
37 | .base.ofuncs = &(struct nouveau_ofuncs) { | ||
38 | .ctor = nv04_mc_ctor, | ||
39 | .dtor = _nouveau_mc_dtor, | ||
40 | .init = nv44_mc_init, | ||
41 | .fini = _nouveau_mc_fini, | ||
42 | }, | ||
43 | .intr = nv04_mc_intr, | ||
44 | .msi_rearm = nv4c_mc_msi_rearm, | ||
45 | }.base; | ||