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authorGreg Ungerer <gerg@uclinux.org>2011-12-23 21:56:10 -0500
committerGreg Ungerer <gerg@uclinux.org>2012-03-04 18:43:09 -0500
commitfa1fc24662d57170259948314b0759376eb75777 (patch)
tree9a721ae615c33bd34d665ec43946426858319722
parented8a2798f6cff0dc68ca7d5800279525aa310fd0 (diff)
m68knommu: merge common ColdFire QSPI platform setup code
The ColdFire QSPI is common to quite a few ColdFire CPUs. No need to duplicate its platform setup code for every CPU family member that has it. Merge all the setup code into a single shared file. This also results in few platforms no longer needing any local platform setup code. In those cases remove the empty devices array and initcall code as well. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat
-rw-r--r--arch/m68k/platform/520x/config.c146
-rw-r--r--arch/m68k/platform/523x/config.c157
-rw-r--r--arch/m68k/platform/5249/config.c162
-rw-r--r--arch/m68k/platform/527x/config.c165
-rw-r--r--arch/m68k/platform/528x/config.c130
-rw-r--r--arch/m68k/platform/532x/config.c117
-rw-r--r--arch/m68k/platform/coldfire/device.c162
7 files changed, 185 insertions, 854 deletions
diff --git a/arch/m68k/platform/520x/config.c b/arch/m68k/platform/520x/config.c
index c83fd1a3d47c..6c318dbe158a 100644
--- a/arch/m68k/platform/520x/config.c
+++ b/arch/m68k/platform/520x/config.c
@@ -15,138 +15,14 @@
15#include <linux/param.h> 15#include <linux/param.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/spi/spi.h>
19#include <linux/gpio.h>
20#include <asm/machdep.h> 18#include <asm/machdep.h>
21#include <asm/coldfire.h> 19#include <asm/coldfire.h>
22#include <asm/mcfsim.h> 20#include <asm/mcfsim.h>
23#include <asm/mcfuart.h> 21#include <asm/mcfuart.h>
24#include <asm/mcfqspi.h>
25 22
26/***************************************************************************/ 23/***************************************************************************/
27 24
28#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) 25#ifdef CONFIG_SPI_COLDFIRE_QSPI
29static struct resource m520x_qspi_resources[] = {
30 {
31 .start = MCFQSPI_BASE,
32 .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1,
33 .flags = IORESOURCE_MEM,
34 },
35 {
36 .start = MCF_IRQ_QSPI,
37 .end = MCF_IRQ_QSPI,
38 .flags = IORESOURCE_IRQ,
39 },
40};
41
42static int m520x_cs_setup(struct mcfqspi_cs_control *cs_control)
43{
44 int status;
45
46 status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
47 if (status) {
48 pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
49 goto fail0;
50 }
51 status = gpio_direction_output(MCFQSPI_CS0, 1);
52 if (status) {
53 pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
54 goto fail1;
55 }
56
57 status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
58 if (status) {
59 pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
60 goto fail1;
61 }
62 status = gpio_direction_output(MCFQSPI_CS1, 1);
63 if (status) {
64 pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
65 goto fail2;
66 }
67
68 status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
69 if (status) {
70 pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
71 goto fail2;
72 }
73 status = gpio_direction_output(MCFQSPI_CS2, 1);
74 if (status) {
75 pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
76 goto fail3;
77 }
78
79 return 0;
80
81fail3:
82 gpio_free(MCFQSPI_CS2);
83fail2:
84 gpio_free(MCFQSPI_CS1);
85fail1:
86 gpio_free(MCFQSPI_CS0);
87fail0:
88 return status;
89}
90
91static void m520x_cs_teardown(struct mcfqspi_cs_control *cs_control)
92{
93 gpio_free(MCFQSPI_CS2);
94 gpio_free(MCFQSPI_CS1);
95 gpio_free(MCFQSPI_CS0);
96}
97
98static void m520x_cs_select(struct mcfqspi_cs_control *cs_control,
99 u8 chip_select, bool cs_high)
100{
101 switch (chip_select) {
102 case 0:
103 gpio_set_value(MCFQSPI_CS0, cs_high);
104 break;
105 case 1:
106 gpio_set_value(MCFQSPI_CS1, cs_high);
107 break;
108 case 2:
109 gpio_set_value(MCFQSPI_CS2, cs_high);
110 break;
111 }
112}
113
114static void m520x_cs_deselect(struct mcfqspi_cs_control *cs_control,
115 u8 chip_select, bool cs_high)
116{
117 switch (chip_select) {
118 case 0:
119 gpio_set_value(MCFQSPI_CS0, !cs_high);
120 break;
121 case 1:
122 gpio_set_value(MCFQSPI_CS1, !cs_high);
123 break;
124 case 2:
125 gpio_set_value(MCFQSPI_CS2, !cs_high);
126 break;
127 }
128}
129
130static struct mcfqspi_cs_control m520x_cs_control = {
131 .setup = m520x_cs_setup,
132 .teardown = m520x_cs_teardown,
133 .select = m520x_cs_select,
134 .deselect = m520x_cs_deselect,
135};
136
137static struct mcfqspi_platform_data m520x_qspi_data = {
138 .bus_num = 0,
139 .num_chipselect = 3,
140 .cs_control = &m520x_cs_control,
141};
142
143static struct platform_device m520x_qspi = {
144 .name = "mcfqspi",
145 .id = 0,
146 .num_resources = ARRAY_SIZE(m520x_qspi_resources),
147 .resource = m520x_qspi_resources,
148 .dev.platform_data = &m520x_qspi_data,
149};
150 26
151static void __init m520x_qspi_init(void) 27static void __init m520x_qspi_init(void)
152{ 28{
@@ -158,14 +34,8 @@ static void __init m520x_qspi_init(void)
158 par &= 0x00ff; 34 par &= 0x00ff;
159 writew(par, MCF_GPIO_PAR_UART); 35 writew(par, MCF_GPIO_PAR_UART);
160} 36}
161#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
162 37
163 38#endif /* CONFIG_SPI_COLDFIRE_QSPI */
164static struct platform_device *m520x_devices[] __initdata = {
165#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
166 &m520x_qspi,
167#endif
168};
169 39
170/***************************************************************************/ 40/***************************************************************************/
171 41
@@ -218,19 +88,9 @@ void __init config_BSP(char *commandp, int size)
218 mach_sched_init = hw_timer_init; 88 mach_sched_init = hw_timer_init;
219 m520x_uarts_init(); 89 m520x_uarts_init();
220 m520x_fec_init(); 90 m520x_fec_init();
221#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) 91#ifdef CONFIG_SPI_COLDFIRE_QSPI
222 m520x_qspi_init(); 92 m520x_qspi_init();
223#endif 93#endif
224} 94}
225 95
226/***************************************************************************/ 96/***************************************************************************/
227
228static int __init init_BSP(void)
229{
230 platform_add_devices(m520x_devices, ARRAY_SIZE(m520x_devices));
231 return 0;
232}
233
234arch_initcall(init_BSP);
235
236/***************************************************************************/
diff --git a/arch/m68k/platform/523x/config.c b/arch/m68k/platform/523x/config.c
index bd8a6fd4e993..94e93943cbf8 100644
--- a/arch/m68k/platform/523x/config.c
+++ b/arch/m68k/platform/523x/config.c
@@ -16,158 +16,14 @@
16#include <linux/param.h> 16#include <linux/param.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/spi/spi.h>
20#include <linux/gpio.h>
21#include <asm/machdep.h> 19#include <asm/machdep.h>
22#include <asm/coldfire.h> 20#include <asm/coldfire.h>
23#include <asm/mcfsim.h> 21#include <asm/mcfsim.h>
24#include <asm/mcfuart.h> 22#include <asm/mcfuart.h>
25#include <asm/mcfqspi.h>
26 23
27/***************************************************************************/ 24/***************************************************************************/
28 25
29#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) 26#ifdef CONFIG_SPI_COLDFIRE_QSPI
30static struct resource m523x_qspi_resources[] = {
31 {
32 .start = MCFQSPI_BASE,
33 .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1,
34 .flags = IORESOURCE_MEM,
35 },
36 {
37 .start = MCF_IRQ_QSPI,
38 .end = MCF_IRQ_QSPI,
39 .flags = IORESOURCE_IRQ,
40 },
41};
42
43static int m523x_cs_setup(struct mcfqspi_cs_control *cs_control)
44{
45 int status;
46
47 status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
48 if (status) {
49 pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
50 goto fail0;
51 }
52 status = gpio_direction_output(MCFQSPI_CS0, 1);
53 if (status) {
54 pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
55 goto fail1;
56 }
57
58 status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
59 if (status) {
60 pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
61 goto fail1;
62 }
63 status = gpio_direction_output(MCFQSPI_CS1, 1);
64 if (status) {
65 pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
66 goto fail2;
67 }
68
69 status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
70 if (status) {
71 pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
72 goto fail2;
73 }
74 status = gpio_direction_output(MCFQSPI_CS2, 1);
75 if (status) {
76 pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
77 goto fail3;
78 }
79
80 status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3");
81 if (status) {
82 pr_debug("gpio_request for MCFQSPI_CS3 failed\n");
83 goto fail3;
84 }
85 status = gpio_direction_output(MCFQSPI_CS3, 1);
86 if (status) {
87 pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n");
88 goto fail4;
89 }
90
91 return 0;
92
93fail4:
94 gpio_free(MCFQSPI_CS3);
95fail3:
96 gpio_free(MCFQSPI_CS2);
97fail2:
98 gpio_free(MCFQSPI_CS1);
99fail1:
100 gpio_free(MCFQSPI_CS0);
101fail0:
102 return status;
103}
104
105static void m523x_cs_teardown(struct mcfqspi_cs_control *cs_control)
106{
107 gpio_free(MCFQSPI_CS3);
108 gpio_free(MCFQSPI_CS2);
109 gpio_free(MCFQSPI_CS1);
110 gpio_free(MCFQSPI_CS0);
111}
112
113static void m523x_cs_select(struct mcfqspi_cs_control *cs_control,
114 u8 chip_select, bool cs_high)
115{
116 switch (chip_select) {
117 case 0:
118 gpio_set_value(MCFQSPI_CS0, cs_high);
119 break;
120 case 1:
121 gpio_set_value(MCFQSPI_CS1, cs_high);
122 break;
123 case 2:
124 gpio_set_value(MCFQSPI_CS2, cs_high);
125 break;
126 case 3:
127 gpio_set_value(MCFQSPI_CS3, cs_high);
128 break;
129 }
130}
131
132static void m523x_cs_deselect(struct mcfqspi_cs_control *cs_control,
133 u8 chip_select, bool cs_high)
134{
135 switch (chip_select) {
136 case 0:
137 gpio_set_value(MCFQSPI_CS0, !cs_high);
138 break;
139 case 1:
140 gpio_set_value(MCFQSPI_CS1, !cs_high);
141 break;
142 case 2:
143 gpio_set_value(MCFQSPI_CS2, !cs_high);
144 break;
145 case 3:
146 gpio_set_value(MCFQSPI_CS3, !cs_high);
147 break;
148 }
149}
150
151static struct mcfqspi_cs_control m523x_cs_control = {
152 .setup = m523x_cs_setup,
153 .teardown = m523x_cs_teardown,
154 .select = m523x_cs_select,
155 .deselect = m523x_cs_deselect,
156};
157
158static struct mcfqspi_platform_data m523x_qspi_data = {
159 .bus_num = 0,
160 .num_chipselect = 4,
161 .cs_control = &m523x_cs_control,
162};
163
164static struct platform_device m523x_qspi = {
165 .name = "mcfqspi",
166 .id = 0,
167 .num_resources = ARRAY_SIZE(m523x_qspi_resources),
168 .resource = m523x_qspi_resources,
169 .dev.platform_data = &m523x_qspi_data,
170};
171 27
172static void __init m523x_qspi_init(void) 28static void __init m523x_qspi_init(void)
173{ 29{
@@ -180,14 +36,8 @@ static void __init m523x_qspi_init(void)
180 par &= 0x3f3f; 36 par &= 0x3f3f;
181 writew(par, MCFGPIO_PAR_TIMER); 37 writew(par, MCFGPIO_PAR_TIMER);
182} 38}
183#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
184 39
185static struct platform_device *m523x_devices[] __initdata = { 40#endif /* CONFIG_SPI_COLDFIRE_QSPI */
186 &m523x_fec,
187#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
188 &m523x_qspi,
189#endif
190};
191 41
192/***************************************************************************/ 42/***************************************************************************/
193 43
@@ -223,10 +73,9 @@ void __init config_BSP(char *commandp, int size)
223 73
224static int __init init_BSP(void) 74static int __init init_BSP(void)
225{ 75{
226#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) 76#ifdef CONFIG_SPI_COLDFIRE_QSPI
227 m523x_qspi_init(); 77 m523x_qspi_init();
228#endif 78#endif
229 platform_add_devices(m523x_devices, ARRAY_SIZE(m523x_devices));
230 return 0; 79 return 0;
231} 80}
232 81
diff --git a/arch/m68k/platform/5249/config.c b/arch/m68k/platform/5249/config.c
index 1e176376010b..d00e12a378cc 100644
--- a/arch/m68k/platform/5249/config.c
+++ b/arch/m68k/platform/5249/config.c
@@ -12,12 +12,10 @@
12#include <linux/param.h> 12#include <linux/param.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/spi/spi.h> 15#include <linux/platform_device.h>
16#include <linux/gpio.h>
17#include <asm/machdep.h> 16#include <asm/machdep.h>
18#include <asm/coldfire.h> 17#include <asm/coldfire.h>
19#include <asm/mcfsim.h> 18#include <asm/mcfsim.h>
20#include <asm/mcfqspi.h>
21 19
22/***************************************************************************/ 20/***************************************************************************/
23 21
@@ -45,148 +43,15 @@ static struct platform_device m5249_smc91x = {
45 43
46#endif /* CONFIG_M5249C3 */ 44#endif /* CONFIG_M5249C3 */
47 45
48#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) 46static struct platform_device *m5249_devices[] __initdata = {
49static struct resource m5249_qspi_resources[] = { 47#ifdef CONFIG_M5249C3
50 { 48 &m5249_smc91x,
51 .start = MCFQSPI_BASE, 49#endif
52 .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1,
53 .flags = IORESOURCE_MEM,
54 },
55 {
56 .start = MCF_IRQ_QSPI,
57 .end = MCF_IRQ_QSPI,
58 .flags = IORESOURCE_IRQ,
59 },
60};
61
62static int m5249_cs_setup(struct mcfqspi_cs_control *cs_control)
63{
64 int status;
65
66 status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
67 if (status) {
68 pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
69 goto fail0;
70 }
71 status = gpio_direction_output(MCFQSPI_CS0, 1);
72 if (status) {
73 pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
74 goto fail1;
75 }
76
77 status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
78 if (status) {
79 pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
80 goto fail1;
81 }
82 status = gpio_direction_output(MCFQSPI_CS1, 1);
83 if (status) {
84 pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
85 goto fail2;
86 }
87
88 status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
89 if (status) {
90 pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
91 goto fail2;
92 }
93 status = gpio_direction_output(MCFQSPI_CS2, 1);
94 if (status) {
95 pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
96 goto fail3;
97 }
98
99 status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3");
100 if (status) {
101 pr_debug("gpio_request for MCFQSPI_CS3 failed\n");
102 goto fail3;
103 }
104 status = gpio_direction_output(MCFQSPI_CS3, 1);
105 if (status) {
106 pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n");
107 goto fail4;
108 }
109
110 return 0;
111
112fail4:
113 gpio_free(MCFQSPI_CS3);
114fail3:
115 gpio_free(MCFQSPI_CS2);
116fail2:
117 gpio_free(MCFQSPI_CS1);
118fail1:
119 gpio_free(MCFQSPI_CS0);
120fail0:
121 return status;
122}
123
124static void m5249_cs_teardown(struct mcfqspi_cs_control *cs_control)
125{
126 gpio_free(MCFQSPI_CS3);
127 gpio_free(MCFQSPI_CS2);
128 gpio_free(MCFQSPI_CS1);
129 gpio_free(MCFQSPI_CS0);
130}
131
132static void m5249_cs_select(struct mcfqspi_cs_control *cs_control,
133 u8 chip_select, bool cs_high)
134{
135 switch (chip_select) {
136 case 0:
137 gpio_set_value(MCFQSPI_CS0, cs_high);
138 break;
139 case 1:
140 gpio_set_value(MCFQSPI_CS1, cs_high);
141 break;
142 case 2:
143 gpio_set_value(MCFQSPI_CS2, cs_high);
144 break;
145 case 3:
146 gpio_set_value(MCFQSPI_CS3, cs_high);
147 break;
148 }
149}
150
151static void m5249_cs_deselect(struct mcfqspi_cs_control *cs_control,
152 u8 chip_select, bool cs_high)
153{
154 switch (chip_select) {
155 case 0:
156 gpio_set_value(MCFQSPI_CS0, !cs_high);
157 break;
158 case 1:
159 gpio_set_value(MCFQSPI_CS1, !cs_high);
160 break;
161 case 2:
162 gpio_set_value(MCFQSPI_CS2, !cs_high);
163 break;
164 case 3:
165 gpio_set_value(MCFQSPI_CS3, !cs_high);
166 break;
167 }
168}
169
170static struct mcfqspi_cs_control m5249_cs_control = {
171 .setup = m5249_cs_setup,
172 .teardown = m5249_cs_teardown,
173 .select = m5249_cs_select,
174 .deselect = m5249_cs_deselect,
175}; 50};
176 51
177static struct mcfqspi_platform_data m5249_qspi_data = { 52/***************************************************************************/
178 .bus_num = 0,
179 .num_chipselect = 4,
180 .cs_control = &m5249_cs_control,
181};
182 53
183static struct platform_device m5249_qspi = { 54#ifdef CONFIG_SPI_COLDFIRE_QSPI
184 .name = "mcfqspi",
185 .id = 0,
186 .num_resources = ARRAY_SIZE(m5249_qspi_resources),
187 .resource = m5249_qspi_resources,
188 .dev.platform_data = &m5249_qspi_data,
189};
190 55
191static void __init m5249_qspi_init(void) 56static void __init m5249_qspi_init(void)
192{ 57{
@@ -195,17 +60,8 @@ static void __init m5249_qspi_init(void)
195 MCF_MBAR + MCFSIM_QSPIICR); 60 MCF_MBAR + MCFSIM_QSPIICR);
196 mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI); 61 mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI);
197} 62}
198#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
199 63
200 64#endif /* CONFIG_SPI_COLDFIRE_QSPI */
201static struct platform_device *m5249_devices[] __initdata = {
202#ifdef CONFIG_M5249C3
203 &m5249_smc91x,
204#endif
205#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
206 &m5249_qspi,
207#endif
208};
209 65
210/***************************************************************************/ 66/***************************************************************************/
211 67
@@ -263,7 +119,7 @@ void __init config_BSP(char *commandp, int size)
263#ifdef CONFIG_M5249C3 119#ifdef CONFIG_M5249C3
264 m5249_smc91x_init(); 120 m5249_smc91x_init();
265#endif 121#endif
266#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) 122#ifdef CONFIG_SPI_COLDFIRE_QSPI
267 m5249_qspi_init(); 123 m5249_qspi_init();
268#endif 124#endif
269} 125}
diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/527x/config.c
index e86ff3a0ba15..9bdf522d9f08 100644
--- a/arch/m68k/platform/527x/config.c
+++ b/arch/m68k/platform/527x/config.c
@@ -16,158 +16,14 @@
16#include <linux/param.h> 16#include <linux/param.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/spi/spi.h>
20#include <linux/gpio.h>
21#include <asm/machdep.h> 19#include <asm/machdep.h>
22#include <asm/coldfire.h> 20#include <asm/coldfire.h>
23#include <asm/mcfsim.h> 21#include <asm/mcfsim.h>
24#include <asm/mcfuart.h> 22#include <asm/mcfuart.h>
25#include <asm/mcfqspi.h>
26 23
27/***************************************************************************/ 24/***************************************************************************/
28 25
29#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) 26#ifdef CONFIG_SPI_COLDFIRE_QSPI
30static struct resource m527x_qspi_resources[] = {
31 {
32 .start = MCFQSPI_BASE,
33 .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1,
34 .flags = IORESOURCE_MEM,
35 },
36 {
37 .start = MCF_IRQ_QSPI,
38 .end = MCF_IRQ_QSPI,
39 .flags = IORESOURCE_IRQ,
40 },
41};
42
43static int m527x_cs_setup(struct mcfqspi_cs_control *cs_control)
44{
45 int status;
46
47 status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
48 if (status) {
49 pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
50 goto fail0;
51 }
52 status = gpio_direction_output(MCFQSPI_CS0, 1);
53 if (status) {
54 pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
55 goto fail1;
56 }
57
58 status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
59 if (status) {
60 pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
61 goto fail1;
62 }
63 status = gpio_direction_output(MCFQSPI_CS1, 1);
64 if (status) {
65 pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
66 goto fail2;
67 }
68
69 status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
70 if (status) {
71 pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
72 goto fail2;
73 }
74 status = gpio_direction_output(MCFQSPI_CS2, 1);
75 if (status) {
76 pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
77 goto fail3;
78 }
79
80 status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3");
81 if (status) {
82 pr_debug("gpio_request for MCFQSPI_CS3 failed\n");
83 goto fail3;
84 }
85 status = gpio_direction_output(MCFQSPI_CS3, 1);
86 if (status) {
87 pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n");
88 goto fail4;
89 }
90
91 return 0;
92
93fail4:
94 gpio_free(MCFQSPI_CS3);
95fail3:
96 gpio_free(MCFQSPI_CS2);
97fail2:
98 gpio_free(MCFQSPI_CS1);
99fail1:
100 gpio_free(MCFQSPI_CS0);
101fail0:
102 return status;
103}
104
105static void m527x_cs_teardown(struct mcfqspi_cs_control *cs_control)
106{
107 gpio_free(MCFQSPI_CS3);
108 gpio_free(MCFQSPI_CS2);
109 gpio_free(MCFQSPI_CS1);
110 gpio_free(MCFQSPI_CS0);
111}
112
113static void m527x_cs_select(struct mcfqspi_cs_control *cs_control,
114 u8 chip_select, bool cs_high)
115{
116 switch (chip_select) {
117 case 0:
118 gpio_set_value(MCFQSPI_CS0, cs_high);
119 break;
120 case 1:
121 gpio_set_value(MCFQSPI_CS1, cs_high);
122 break;
123 case 2:
124 gpio_set_value(MCFQSPI_CS2, cs_high);
125 break;
126 case 3:
127 gpio_set_value(MCFQSPI_CS3, cs_high);
128 break;
129 }
130}
131
132static void m527x_cs_deselect(struct mcfqspi_cs_control *cs_control,
133 u8 chip_select, bool cs_high)
134{
135 switch (chip_select) {
136 case 0:
137 gpio_set_value(MCFQSPI_CS0, !cs_high);
138 break;
139 case 1:
140 gpio_set_value(MCFQSPI_CS1, !cs_high);
141 break;
142 case 2:
143 gpio_set_value(MCFQSPI_CS2, !cs_high);
144 break;
145 case 3:
146 gpio_set_value(MCFQSPI_CS3, !cs_high);
147 break;
148 }
149}
150
151static struct mcfqspi_cs_control m527x_cs_control = {
152 .setup = m527x_cs_setup,
153 .teardown = m527x_cs_teardown,
154 .select = m527x_cs_select,
155 .deselect = m527x_cs_deselect,
156};
157
158static struct mcfqspi_platform_data m527x_qspi_data = {
159 .bus_num = 0,
160 .num_chipselect = 4,
161 .cs_control = &m527x_cs_control,
162};
163
164static struct platform_device m527x_qspi = {
165 .name = "mcfqspi",
166 .id = 0,
167 .num_resources = ARRAY_SIZE(m527x_qspi_resources),
168 .resource = m527x_qspi_resources,
169 .dev.platform_data = &m527x_qspi_data,
170};
171 27
172static void __init m527x_qspi_init(void) 28static void __init m527x_qspi_init(void)
173{ 29{
@@ -185,13 +41,8 @@ static void __init m527x_qspi_init(void)
185 writew(0x003e, MCFGPIO_PAR_QSPI); 41 writew(0x003e, MCFGPIO_PAR_QSPI);
186#endif 42#endif
187} 43}
188#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
189 44
190static struct platform_device *m527x_devices[] __initdata = { 45#endif /* CONFIG_SPI_COLDFIRE_QSPI */
191#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
192 &m527x_qspi,
193#endif
194};
195 46
196/***************************************************************************/ 47/***************************************************************************/
197 48
@@ -250,19 +101,9 @@ void __init config_BSP(char *commandp, int size)
250 mach_sched_init = hw_timer_init; 101 mach_sched_init = hw_timer_init;
251 m527x_uarts_init(); 102 m527x_uarts_init();
252 m527x_fec_init(); 103 m527x_fec_init();
253#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) 104#ifdef CONFIG_SPI_COLDFIRE_QSPI
254 m527x_qspi_init(); 105 m527x_qspi_init();
255#endif 106#endif
256} 107}
257 108
258/***************************************************************************/ 109/***************************************************************************/
259
260static int __init init_BSP(void)
261{
262 platform_add_devices(m527x_devices, ARRAY_SIZE(m527x_devices));
263 return 0;
264}
265
266arch_initcall(init_BSP);
267
268/***************************************************************************/
diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/528x/config.c
index 24f5afcf0082..264456ce45dc 100644
--- a/arch/m68k/platform/528x/config.c
+++ b/arch/m68k/platform/528x/config.c
@@ -17,145 +17,22 @@
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/spi/spi.h>
21#include <linux/gpio.h>
22#include <asm/machdep.h> 20#include <asm/machdep.h>
23#include <asm/coldfire.h> 21#include <asm/coldfire.h>
24#include <asm/mcfsim.h> 22#include <asm/mcfsim.h>
25#include <asm/mcfuart.h> 23#include <asm/mcfuart.h>
26#include <asm/mcfqspi.h>
27 24
28/***************************************************************************/ 25/***************************************************************************/
29 26
30#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) 27#ifdef CONFIG_SPI_COLDFIRE_QSPI
31static struct resource m528x_qspi_resources[] = {
32 {
33 .start = MCFQSPI_BASE,
34 .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1,
35 .flags = IORESOURCE_MEM,
36 },
37 {
38 .start = MCF_IRQ_QSPI,
39 .end = MCF_IRQ_QSPI,
40 .flags = IORESOURCE_IRQ,
41 },
42};
43
44static int m528x_cs_setup(struct mcfqspi_cs_control *cs_control)
45{
46 int status;
47
48 status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
49 if (status) {
50 pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
51 goto fail0;
52 }
53 status = gpio_direction_output(MCFQSPI_CS0, 1);
54 if (status) {
55 pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
56 goto fail1;
57 }
58
59 status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
60 if (status) {
61 pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
62 goto fail1;
63 }
64 status = gpio_direction_output(MCFQSPI_CS1, 1);
65 if (status) {
66 pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
67 goto fail2;
68 }
69
70 status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
71 if (status) {
72 pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
73 goto fail2;
74 }
75 status = gpio_direction_output(MCFQSPI_CS2, 1);
76 if (status) {
77 pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
78 goto fail3;
79 }
80
81 status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3");
82 if (status) {
83 pr_debug("gpio_request for MCFQSPI_CS3 failed\n");
84 goto fail3;
85 }
86 status = gpio_direction_output(MCFQSPI_CS3, 1);
87 if (status) {
88 pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n");
89 goto fail4;
90 }
91
92 return 0;
93
94fail4:
95 gpio_free(MCFQSPI_CS3);
96fail3:
97 gpio_free(MCFQSPI_CS2);
98fail2:
99 gpio_free(MCFQSPI_CS1);
100fail1:
101 gpio_free(MCFQSPI_CS0);
102fail0:
103 return status;
104}
105
106static void m528x_cs_teardown(struct mcfqspi_cs_control *cs_control)
107{
108 gpio_free(MCFQSPI_CS3);
109 gpio_free(MCFQSPI_CS2);
110 gpio_free(MCFQSPI_CS1);
111 gpio_free(MCFQSPI_CS0);
112}
113
114static void m528x_cs_select(struct mcfqspi_cs_control *cs_control,
115 u8 chip_select, bool cs_high)
116{
117 gpio_set_value(MCFQSPI_CS0 + chip_select, cs_high);
118}
119
120static void m528x_cs_deselect(struct mcfqspi_cs_control *cs_control,
121 u8 chip_select, bool cs_high)
122{
123 gpio_set_value(MCFQSPI_CS0 + chip_select, !cs_high);
124}
125
126static struct mcfqspi_cs_control m528x_cs_control = {
127 .setup = m528x_cs_setup,
128 .teardown = m528x_cs_teardown,
129 .select = m528x_cs_select,
130 .deselect = m528x_cs_deselect,
131};
132
133static struct mcfqspi_platform_data m528x_qspi_data = {
134 .bus_num = 0,
135 .num_chipselect = 4,
136 .cs_control = &m528x_cs_control,
137};
138
139static struct platform_device m528x_qspi = {
140 .name = "mcfqspi",
141 .id = 0,
142 .num_resources = ARRAY_SIZE(m528x_qspi_resources),
143 .resource = m528x_qspi_resources,
144 .dev.platform_data = &m528x_qspi_data,
145};
146 28
147static void __init m528x_qspi_init(void) 29static void __init m528x_qspi_init(void)
148{ 30{
149 /* setup Port QS for QSPI with gpio CS control */ 31 /* setup Port QS for QSPI with gpio CS control */
150 __raw_writeb(0x07, MCFGPIO_PQSPAR); 32 __raw_writeb(0x07, MCFGPIO_PQSPAR);
151} 33}
152#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
153 34
154static struct platform_device *m528x_devices[] __initdata = { 35#endif /* CONFIG_SPI_COLDFIRE_QSPI */
155#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
156 &m528x_qspi,
157#endif
158};
159 36
160/***************************************************************************/ 37/***************************************************************************/
161 38
@@ -236,10 +113,9 @@ static int __init init_BSP(void)
236 mach_sched_init = hw_timer_init; 113 mach_sched_init = hw_timer_init;
237 m528x_uarts_init(); 114 m528x_uarts_init();
238 m528x_fec_init(); 115 m528x_fec_init();
239#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) 116#ifdef CONFIG_SPI_COLDFIRE_QSPI
240 m528x_qspi_init(); 117 m528x_qspi_init();
241#endif 118#endif
242 platform_add_devices(m528x_devices, ARRAY_SIZE(m528x_devices));
243 return 0; 119 return 0;
244} 120}
245 121
diff --git a/arch/m68k/platform/532x/config.c b/arch/m68k/platform/532x/config.c
index c8e1395e9344..8c0dd5caae97 100644
--- a/arch/m68k/platform/532x/config.c
+++ b/arch/m68k/platform/532x/config.c
@@ -21,134 +21,24 @@
21#include <linux/param.h> 21#include <linux/param.h>
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/spi/spi.h>
25#include <linux/gpio.h>
26#include <asm/machdep.h> 24#include <asm/machdep.h>
27#include <asm/coldfire.h> 25#include <asm/coldfire.h>
28#include <asm/mcfsim.h> 26#include <asm/mcfsim.h>
29#include <asm/mcfuart.h> 27#include <asm/mcfuart.h>
30#include <asm/mcfdma.h> 28#include <asm/mcfdma.h>
31#include <asm/mcfwdebug.h> 29#include <asm/mcfwdebug.h>
32#include <asm/mcfqspi.h>
33 30
34/***************************************************************************/ 31/***************************************************************************/
35 32
36#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) 33#ifdef CONFIG_SPI_COLDFIRE_QSPI
37static struct resource m532x_qspi_resources[] = {
38 {
39 .start = MCFQSPI_BASE,
40 .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1,
41 .flags = IORESOURCE_MEM,
42 },
43 {
44 .start = MCF_IRQ_QSPI,
45 .end = MCF_IRQ_QSPI,
46 .flags = IORESOURCE_IRQ,
47 },
48};
49
50static int m532x_cs_setup(struct mcfqspi_cs_control *cs_control)
51{
52 int status;
53
54 status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
55 if (status) {
56 pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
57 goto fail0;
58 }
59 status = gpio_direction_output(MCFQSPI_CS0, 1);
60 if (status) {
61 pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
62 goto fail1;
63 }
64
65 status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
66 if (status) {
67 pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
68 goto fail1;
69 }
70 status = gpio_direction_output(MCFQSPI_CS1, 1);
71 if (status) {
72 pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
73 goto fail2;
74 }
75
76 status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
77 if (status) {
78 pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
79 goto fail2;
80 }
81 status = gpio_direction_output(MCFQSPI_CS2, 1);
82 if (status) {
83 pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
84 goto fail3;
85 }
86
87 return 0;
88
89fail3:
90 gpio_free(MCFQSPI_CS2);
91fail2:
92 gpio_free(MCFQSPI_CS1);
93fail1:
94 gpio_free(MCFQSPI_CS0);
95fail0:
96 return status;
97}
98
99static void m532x_cs_teardown(struct mcfqspi_cs_control *cs_control)
100{
101 gpio_free(MCFQSPI_CS2);
102 gpio_free(MCFQSPI_CS1);
103 gpio_free(MCFQSPI_CS0);
104}
105
106static void m532x_cs_select(struct mcfqspi_cs_control *cs_control,
107 u8 chip_select, bool cs_high)
108{
109 gpio_set_value(MCFQSPI_CS0 + chip_select, cs_high);
110}
111
112static void m532x_cs_deselect(struct mcfqspi_cs_control *cs_control,
113 u8 chip_select, bool cs_high)
114{
115 gpio_set_value(MCFQSPI_CS0 + chip_select, !cs_high);
116}
117
118static struct mcfqspi_cs_control m532x_cs_control = {
119 .setup = m532x_cs_setup,
120 .teardown = m532x_cs_teardown,
121 .select = m532x_cs_select,
122 .deselect = m532x_cs_deselect,
123};
124
125static struct mcfqspi_platform_data m532x_qspi_data = {
126 .bus_num = 0,
127 .num_chipselect = 3,
128 .cs_control = &m532x_cs_control,
129};
130
131static struct platform_device m532x_qspi = {
132 .name = "mcfqspi",
133 .id = 0,
134 .num_resources = ARRAY_SIZE(m532x_qspi_resources),
135 .resource = m532x_qspi_resources,
136 .dev.platform_data = &m532x_qspi_data,
137};
138 34
139static void __init m532x_qspi_init(void) 35static void __init m532x_qspi_init(void)
140{ 36{
141 /* setup QSPS pins for QSPI with gpio CS control */ 37 /* setup QSPS pins for QSPI with gpio CS control */
142 writew(0x01f0, MCF_GPIO_PAR_QSPI); 38 writew(0x01f0, MCF_GPIO_PAR_QSPI);
143} 39}
144#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
145
146 40
147static struct platform_device *m532x_devices[] __initdata = { 41#endif /* CONFIG_SPI_COLDFIRE_QSPI */
148#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
149 &m532x_qspi,
150#endif
151};
152 42
153/***************************************************************************/ 43/***************************************************************************/
154 44
@@ -210,10 +100,9 @@ static int __init init_BSP(void)
210{ 100{
211 m532x_uarts_init(); 101 m532x_uarts_init();
212 m532x_fec_init(); 102 m532x_fec_init();
213#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) 103#ifdef CONFIG_SPI_COLDFIRE_QSPI
214 m532x_qspi_init(); 104 m532x_qspi_init();
215#endif 105#endif
216 platform_add_devices(m532x_devices, ARRAY_SIZE(m532x_devices));
217 return 0; 106 return 0;
218} 107}
219 108
diff --git a/arch/m68k/platform/coldfire/device.c b/arch/m68k/platform/coldfire/device.c
index 24b0d5e5350a..fa50c48292ff 100644
--- a/arch/m68k/platform/coldfire/device.c
+++ b/arch/m68k/platform/coldfire/device.c
@@ -11,10 +11,13 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/io.h> 13#include <linux/io.h>
14#include <linux/spi/spi.h>
15#include <linux/gpio.h>
14#include <asm/traps.h> 16#include <asm/traps.h>
15#include <asm/coldfire.h> 17#include <asm/coldfire.h>
16#include <asm/mcfsim.h> 18#include <asm/mcfsim.h>
17#include <asm/mcfuart.h> 19#include <asm/mcfuart.h>
20#include <asm/mcfqspi.h>
18 21
19/* 22/*
20 * All current ColdFire parts contain from 2, 3 or 4 UARTS. 23 * All current ColdFire parts contain from 2, 3 or 4 UARTS.
@@ -118,6 +121,161 @@ static struct platform_device mcf_fec1 = {
118#endif /* MCFFEC_BASE1 */ 121#endif /* MCFFEC_BASE1 */
119#endif /* CONFIG_FEC */ 122#endif /* CONFIG_FEC */
120 123
124#ifdef CONFIG_SPI_COLDFIRE_QSPI
125/*
126 * The ColdFire QSPI module is an SPI protocol hardware block used
127 * on a number of different ColdFire CPUs.
128 */
129static struct resource mcf_qspi_resources[] = {
130 {
131 .start = MCFQSPI_BASE,
132 .end = MCFQSPI_BASE + MCFQSPI_SIZE - 1,
133 .flags = IORESOURCE_MEM,
134 },
135 {
136 .start = MCF_IRQ_QSPI,
137 .end = MCF_IRQ_QSPI,
138 .flags = IORESOURCE_IRQ,
139 },
140};
141
142static int mcf_cs_setup(struct mcfqspi_cs_control *cs_control)
143{
144 int status;
145
146 status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
147 if (status) {
148 pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
149 goto fail0;
150 }
151 status = gpio_direction_output(MCFQSPI_CS0, 1);
152 if (status) {
153 pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
154 goto fail1;
155 }
156
157 status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
158 if (status) {
159 pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
160 goto fail1;
161 }
162 status = gpio_direction_output(MCFQSPI_CS1, 1);
163 if (status) {
164 pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
165 goto fail2;
166 }
167
168 status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
169 if (status) {
170 pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
171 goto fail2;
172 }
173 status = gpio_direction_output(MCFQSPI_CS2, 1);
174 if (status) {
175 pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
176 goto fail3;
177 }
178
179#ifdef MCFQSPI_CS3
180 status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3");
181 if (status) {
182 pr_debug("gpio_request for MCFQSPI_CS3 failed\n");
183 goto fail3;
184 }
185 status = gpio_direction_output(MCFQSPI_CS3, 1);
186 if (status) {
187 pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n");
188 gpio_free(MCFQSPI_CS3);
189 goto fail3;
190 }
191#endif
192
193 return 0;
194
195fail3:
196 gpio_free(MCFQSPI_CS2);
197fail2:
198 gpio_free(MCFQSPI_CS1);
199fail1:
200 gpio_free(MCFQSPI_CS0);
201fail0:
202 return status;
203}
204
205static void mcf_cs_teardown(struct mcfqspi_cs_control *cs_control)
206{
207#ifdef MCFQSPI_CS3
208 gpio_free(MCFQSPI_CS3);
209#endif
210 gpio_free(MCFQSPI_CS2);
211 gpio_free(MCFQSPI_CS1);
212 gpio_free(MCFQSPI_CS0);
213}
214
215static void mcf_cs_select(struct mcfqspi_cs_control *cs_control,
216 u8 chip_select, bool cs_high)
217{
218 switch (chip_select) {
219 case 0:
220 gpio_set_value(MCFQSPI_CS0, cs_high);
221 break;
222 case 1:
223 gpio_set_value(MCFQSPI_CS1, cs_high);
224 break;
225 case 2:
226 gpio_set_value(MCFQSPI_CS2, cs_high);
227 break;
228#ifdef MCFQSPI_CS3
229 case 3:
230 gpio_set_value(MCFQSPI_CS3, cs_high);
231 break;
232#endif
233 }
234}
235
236static void mcf_cs_deselect(struct mcfqspi_cs_control *cs_control,
237 u8 chip_select, bool cs_high)
238{
239 switch (chip_select) {
240 case 0:
241 gpio_set_value(MCFQSPI_CS0, !cs_high);
242 break;
243 case 1:
244 gpio_set_value(MCFQSPI_CS1, !cs_high);
245 break;
246 case 2:
247 gpio_set_value(MCFQSPI_CS2, !cs_high);
248 break;
249#ifdef MCFQSPI_CS3
250 case 3:
251 gpio_set_value(MCFQSPI_CS3, !cs_high);
252 break;
253#endif
254 }
255}
256
257static struct mcfqspi_cs_control mcf_cs_control = {
258 .setup = mcf_cs_setup,
259 .teardown = mcf_cs_teardown,
260 .select = mcf_cs_select,
261 .deselect = mcf_cs_deselect,
262};
263
264static struct mcfqspi_platform_data mcf_qspi_data = {
265 .bus_num = 0,
266 .num_chipselect = 4,
267 .cs_control = &mcf_cs_control,
268};
269
270static struct platform_device mcf_qspi = {
271 .name = "mcfqspi",
272 .id = 0,
273 .num_resources = ARRAY_SIZE(mcf_qspi_resources),
274 .resource = mcf_qspi_resources,
275 .dev.platform_data = &mcf_qspi_data,
276};
277#endif /* CONFIG_SPI_COLDFIRE_QSPI */
278
121static struct platform_device *mcf_devices[] __initdata = { 279static struct platform_device *mcf_devices[] __initdata = {
122 &mcf_uart, 280 &mcf_uart,
123#ifdef CONFIG_FEC 281#ifdef CONFIG_FEC
@@ -126,9 +284,11 @@ static struct platform_device *mcf_devices[] __initdata = {
126 &mcf_fec1, 284 &mcf_fec1,
127#endif 285#endif
128#endif 286#endif
287#ifdef CONFIG_SPI_COLDFIRE_QSPI
288 &mcf_qspi,
289#endif
129}; 290};
130 291
131
132/* 292/*
133 * Some ColdFire UARTs let you set the IRQ line to use. 293 * Some ColdFire UARTs let you set the IRQ line to use.
134 */ 294 */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-25 23:51:17 -0500