diff options
author | Arnd Bergmann <arnd@arndb.de> | 2013-06-20 15:41:06 -0400 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2013-06-20 15:41:06 -0400 |
commit | f9f697a77d23dfbd00bd75b27b67fea1fd7a1767 (patch) | |
tree | 350d9a39fe56c145e36d703074c2892bc7fbeadb | |
parent | 8fe14e5a74d3f45589c83c06ed63b5c8a376a824 (diff) | |
parent | d2e993289cc5f1780ce74188e3a8d2b404748397 (diff) |
Merge tag 'omap-for-v3.11/mailbox-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
From Tony Lindgren:
Move OMAP Mailbox framework to drivers via Suman Anna <s-anna@ti.com>
The OMAP Mailbox driver framework is moved out of arch/arm folder
into drivers/mailbox folder, to re-enable building it and also serve
as a baseline for adapting to the new mailbox driver framework. The
changes mainly contain:
- a minor bug fix and cleanup of mach-specific mailbox code
- remove any header dependencies from plat-omap for multi-platform
support
- represent mailbox device data through platform data/hwmod attrs
- move the omap mailbox code out of plat-omap/mach-omapX to
drivers/mailbox folder
* tag 'omap-for-v3.11/mailbox-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
mailbox/omap: move the OMAP mailbox framework to drivers
ARM: OMAP2+: add user and fifo info to mailbox platform data
ARM: OMAP2+: mbox: remove dependencies with soc.h
omap: mailbox: correct the argument type for irq ops
omap: mailbox: call request_irq after mbox queues are allocated
omap: mailbox: check iomem resource before dereferencing it
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
21 files changed, 355 insertions, 276 deletions
diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig index 9940f7b4e438..d74edbad18fc 100644 --- a/arch/arm/configs/omap1_defconfig +++ b/arch/arm/configs/omap1_defconfig | |||
@@ -26,7 +26,8 @@ CONFIG_ARCH_OMAP=y | |||
26 | CONFIG_ARCH_OMAP1=y | 26 | CONFIG_ARCH_OMAP1=y |
27 | CONFIG_OMAP_RESET_CLOCKS=y | 27 | CONFIG_OMAP_RESET_CLOCKS=y |
28 | # CONFIG_OMAP_MUX is not set | 28 | # CONFIG_OMAP_MUX is not set |
29 | CONFIG_OMAP_MBOX_FWK=y | 29 | CONFIG_MAILBOX=y |
30 | CONFIG_OMAP1_MBOX=y | ||
30 | CONFIG_OMAP_32K_TIMER=y | 31 | CONFIG_OMAP_32K_TIMER=y |
31 | CONFIG_OMAP_DM_TIMER=y | 32 | CONFIG_OMAP_DM_TIMER=y |
32 | CONFIG_ARCH_OMAP730=y | 33 | CONFIG_ARCH_OMAP730=y |
diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index 222d58c0ae76..3889b6cd211e 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile | |||
@@ -19,10 +19,6 @@ obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o | |||
19 | # Power Management | 19 | # Power Management |
20 | obj-$(CONFIG_PM) += pm.o sleep.o | 20 | obj-$(CONFIG_PM) += pm.o sleep.o |
21 | 21 | ||
22 | # DSP | ||
23 | obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o | ||
24 | mailbox_mach-objs := mailbox.o | ||
25 | |||
26 | i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o | 22 | i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o |
27 | obj-y += $(i2c-omap-m) $(i2c-omap-y) | 23 | obj-y += $(i2c-omap-m) $(i2c-omap-y) |
28 | 24 | ||
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 55a9d6777683..f2d19af051eb 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile | |||
@@ -203,9 +203,6 @@ obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o | |||
203 | obj-$(CONFIG_OMAP3_EMU) += emu.o | 203 | obj-$(CONFIG_OMAP3_EMU) += emu.o |
204 | obj-$(CONFIG_HW_PERF_EVENTS) += pmu.o | 204 | obj-$(CONFIG_HW_PERF_EVENTS) += pmu.o |
205 | 205 | ||
206 | obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox_mach.o | ||
207 | mailbox_mach-objs := mailbox.o | ||
208 | |||
209 | iommu-$(CONFIG_OMAP_IOMMU) := omap-iommu.o | 206 | iommu-$(CONFIG_OMAP_IOMMU) := omap-iommu.o |
210 | obj-y += $(iommu-m) $(iommu-y) | 207 | obj-y += $(iommu-m) $(iommu-y) |
211 | 208 | ||
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 4269fc145698..73762accd128 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/pinctrl/machine.h> | 20 | #include <linux/pinctrl/machine.h> |
21 | #include <linux/platform_data/omap4-keypad.h> | 21 | #include <linux/platform_data/omap4-keypad.h> |
22 | #include <linux/platform_data/omap_ocp2scp.h> | 22 | #include <linux/platform_data/omap_ocp2scp.h> |
23 | #include <linux/platform_data/mailbox-omap.h> | ||
23 | #include <linux/usb/omap_control_usb.h> | 24 | #include <linux/usb/omap_control_usb.h> |
24 | 25 | ||
25 | #include <asm/mach-types.h> | 26 | #include <asm/mach-types.h> |
@@ -327,25 +328,31 @@ int __init omap4_keyboard_init(struct omap4_keypad_platform_data | |||
327 | return 0; | 328 | return 0; |
328 | } | 329 | } |
329 | 330 | ||
330 | #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE) | 331 | #if defined(CONFIG_OMAP2PLUS_MBOX) || defined(CONFIG_OMAP2PLUS_MBOX_MODULE) |
331 | static inline void __init omap_init_mbox(void) | 332 | static inline void __init omap_init_mbox(void) |
332 | { | 333 | { |
333 | struct omap_hwmod *oh; | 334 | struct omap_hwmod *oh; |
334 | struct platform_device *pdev; | 335 | struct platform_device *pdev; |
336 | struct omap_mbox_pdata *pdata; | ||
335 | 337 | ||
336 | oh = omap_hwmod_lookup("mailbox"); | 338 | oh = omap_hwmod_lookup("mailbox"); |
337 | if (!oh) { | 339 | if (!oh) { |
338 | pr_err("%s: unable to find hwmod\n", __func__); | 340 | pr_err("%s: unable to find hwmod\n", __func__); |
339 | return; | 341 | return; |
340 | } | 342 | } |
343 | if (!oh->dev_attr) { | ||
344 | pr_err("%s: hwmod doesn't have valid attrs\n", __func__); | ||
345 | return; | ||
346 | } | ||
341 | 347 | ||
342 | pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0); | 348 | pdata = (struct omap_mbox_pdata *)oh->dev_attr; |
349 | pdev = omap_device_build("omap-mailbox", -1, oh, pdata, sizeof(*pdata)); | ||
343 | WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n", | 350 | WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n", |
344 | __func__, PTR_ERR(pdev)); | 351 | __func__, PTR_ERR(pdev)); |
345 | } | 352 | } |
346 | #else | 353 | #else |
347 | static inline void omap_init_mbox(void) { } | 354 | static inline void omap_init_mbox(void) { } |
348 | #endif /* CONFIG_OMAP_MBOX_FWK */ | 355 | #endif /* CONFIG_OMAP2PLUS_MBOX */ |
349 | 356 | ||
350 | static inline void omap_init_sti(void) {} | 357 | static inline void omap_init_sti(void) {} |
351 | 358 | ||
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 5137cc84b504..d8b9d60f854f 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/i2c-omap.h> | 16 | #include <linux/i2c-omap.h> |
17 | #include <linux/platform_data/spi-omap2-mcspi.h> | 17 | #include <linux/platform_data/spi-omap2-mcspi.h> |
18 | #include <linux/omap-dma.h> | 18 | #include <linux/omap-dma.h> |
19 | #include <linux/platform_data/mailbox-omap.h> | ||
19 | #include <plat/dmtimer.h> | 20 | #include <plat/dmtimer.h> |
20 | 21 | ||
21 | #include "omap_hwmod.h" | 22 | #include "omap_hwmod.h" |
@@ -166,6 +167,18 @@ static struct omap_hwmod omap2420_dma_system_hwmod = { | |||
166 | }; | 167 | }; |
167 | 168 | ||
168 | /* mailbox */ | 169 | /* mailbox */ |
170 | static struct omap_mbox_dev_info omap2420_mailbox_info[] = { | ||
171 | { .name = "dsp", .tx_id = 0, .rx_id = 1, .irq_id = 0, .usr_id = 0 }, | ||
172 | { .name = "iva", .tx_id = 2, .rx_id = 3, .irq_id = 1, .usr_id = 3 }, | ||
173 | }; | ||
174 | |||
175 | static struct omap_mbox_pdata omap2420_mailbox_attrs = { | ||
176 | .num_users = 4, | ||
177 | .num_fifos = 6, | ||
178 | .info_cnt = ARRAY_SIZE(omap2420_mailbox_info), | ||
179 | .info = omap2420_mailbox_info, | ||
180 | }; | ||
181 | |||
169 | static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { | 182 | static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { |
170 | { .name = "dsp", .irq = 26 + OMAP_INTC_START, }, | 183 | { .name = "dsp", .irq = 26 + OMAP_INTC_START, }, |
171 | { .name = "iva", .irq = 34 + OMAP_INTC_START, }, | 184 | { .name = "iva", .irq = 34 + OMAP_INTC_START, }, |
@@ -186,6 +199,7 @@ static struct omap_hwmod omap2420_mailbox_hwmod = { | |||
186 | .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT, | 199 | .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT, |
187 | }, | 200 | }, |
188 | }, | 201 | }, |
202 | .dev_attr = &omap2420_mailbox_attrs, | ||
189 | }; | 203 | }; |
190 | 204 | ||
191 | /* | 205 | /* |
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 4ce999ee3ee9..5b9083461dc5 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/platform_data/asoc-ti-mcbsp.h> | 17 | #include <linux/platform_data/asoc-ti-mcbsp.h> |
18 | #include <linux/platform_data/spi-omap2-mcspi.h> | 18 | #include <linux/platform_data/spi-omap2-mcspi.h> |
19 | #include <linux/omap-dma.h> | 19 | #include <linux/omap-dma.h> |
20 | #include <linux/platform_data/mailbox-omap.h> | ||
20 | #include <plat/dmtimer.h> | 21 | #include <plat/dmtimer.h> |
21 | 22 | ||
22 | #include "omap_hwmod.h" | 23 | #include "omap_hwmod.h" |
@@ -170,6 +171,17 @@ static struct omap_hwmod omap2430_dma_system_hwmod = { | |||
170 | }; | 171 | }; |
171 | 172 | ||
172 | /* mailbox */ | 173 | /* mailbox */ |
174 | static struct omap_mbox_dev_info omap2430_mailbox_info[] = { | ||
175 | { .name = "dsp", .tx_id = 0, .rx_id = 1 }, | ||
176 | }; | ||
177 | |||
178 | static struct omap_mbox_pdata omap2430_mailbox_attrs = { | ||
179 | .num_users = 4, | ||
180 | .num_fifos = 6, | ||
181 | .info_cnt = ARRAY_SIZE(omap2430_mailbox_info), | ||
182 | .info = omap2430_mailbox_info, | ||
183 | }; | ||
184 | |||
173 | static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { | 185 | static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { |
174 | { .irq = 26 + OMAP_INTC_START, }, | 186 | { .irq = 26 + OMAP_INTC_START, }, |
175 | { .irq = -1 }, | 187 | { .irq = -1 }, |
@@ -189,6 +201,7 @@ static struct omap_hwmod omap2430_mailbox_hwmod = { | |||
189 | .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT, | 201 | .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT, |
190 | }, | 202 | }, |
191 | }, | 203 | }, |
204 | .dev_attr = &omap2430_mailbox_attrs, | ||
192 | }; | 205 | }; |
193 | 206 | ||
194 | /* mcspi3 */ | 207 | /* mcspi3 */ |
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 31c7126eb3bb..8e4cbc99ce28 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/platform_data/asoc-ti-mcbsp.h> | 25 | #include <linux/platform_data/asoc-ti-mcbsp.h> |
26 | #include <linux/platform_data/spi-omap2-mcspi.h> | 26 | #include <linux/platform_data/spi-omap2-mcspi.h> |
27 | #include <linux/platform_data/iommu-omap.h> | 27 | #include <linux/platform_data/iommu-omap.h> |
28 | #include <linux/platform_data/mailbox-omap.h> | ||
28 | #include <plat/dmtimer.h> | 29 | #include <plat/dmtimer.h> |
29 | 30 | ||
30 | #include "am35xx.h" | 31 | #include "am35xx.h" |
@@ -1505,6 +1506,17 @@ static struct omap_hwmod_class omap3xxx_mailbox_hwmod_class = { | |||
1505 | .sysc = &omap3xxx_mailbox_sysc, | 1506 | .sysc = &omap3xxx_mailbox_sysc, |
1506 | }; | 1507 | }; |
1507 | 1508 | ||
1509 | static struct omap_mbox_dev_info omap3xxx_mailbox_info[] = { | ||
1510 | { .name = "dsp", .tx_id = 0, .rx_id = 1 }, | ||
1511 | }; | ||
1512 | |||
1513 | static struct omap_mbox_pdata omap3xxx_mailbox_attrs = { | ||
1514 | .num_users = 2, | ||
1515 | .num_fifos = 2, | ||
1516 | .info_cnt = ARRAY_SIZE(omap3xxx_mailbox_info), | ||
1517 | .info = omap3xxx_mailbox_info, | ||
1518 | }; | ||
1519 | |||
1508 | static struct omap_hwmod_irq_info omap3xxx_mailbox_irqs[] = { | 1520 | static struct omap_hwmod_irq_info omap3xxx_mailbox_irqs[] = { |
1509 | { .irq = 26 + OMAP_INTC_START, }, | 1521 | { .irq = 26 + OMAP_INTC_START, }, |
1510 | { .irq = -1 }, | 1522 | { .irq = -1 }, |
@@ -1524,6 +1536,7 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = { | |||
1524 | .idlest_idle_bit = OMAP3430_ST_MAILBOXES_SHIFT, | 1536 | .idlest_idle_bit = OMAP3430_ST_MAILBOXES_SHIFT, |
1525 | }, | 1537 | }, |
1526 | }, | 1538 | }, |
1539 | .dev_attr = &omap3xxx_mailbox_attrs, | ||
1527 | }; | 1540 | }; |
1528 | 1541 | ||
1529 | /* | 1542 | /* |
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index ce66eb9be481..f82bae2171eb 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig | |||
@@ -86,22 +86,6 @@ config OMAP_MUX_WARNINGS | |||
86 | to change the pin multiplexing setup. When there are no warnings | 86 | to change the pin multiplexing setup. When there are no warnings |
87 | printed, it's safe to deselect OMAP_MUX for your product. | 87 | printed, it's safe to deselect OMAP_MUX for your product. |
88 | 88 | ||
89 | config OMAP_MBOX_FWK | ||
90 | tristate "Mailbox framework support" | ||
91 | depends on ARCH_OMAP && !ARCH_MULTIPLATFORM | ||
92 | help | ||
93 | Say Y here if you want to use OMAP Mailbox framework support for | ||
94 | DSP, IVA1.0 and IVA2 in OMAP1/2/3. | ||
95 | |||
96 | config OMAP_MBOX_KFIFO_SIZE | ||
97 | int "Mailbox kfifo default buffer size (bytes)" | ||
98 | depends on OMAP_MBOX_FWK | ||
99 | default 256 | ||
100 | help | ||
101 | Specify the default size of mailbox's kfifo buffers (bytes). | ||
102 | This can also be changed at runtime (via the mbox_kfifo_size | ||
103 | module parameter). | ||
104 | |||
105 | config OMAP_IOMMU_IVA2 | 89 | config OMAP_IOMMU_IVA2 |
106 | bool | 90 | bool |
107 | 91 | ||
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index 31199417b56a..0b01b68fd033 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile | |||
@@ -17,6 +17,3 @@ obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o | |||
17 | i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o | 17 | i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o |
18 | obj-y += $(i2c-omap-m) $(i2c-omap-y) | 18 | obj-y += $(i2c-omap-m) $(i2c-omap-y) |
19 | 19 | ||
20 | # OMAP mailbox framework | ||
21 | obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o | ||
22 | |||
diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig index 9545c9f03809..c8b5c13bcd05 100644 --- a/drivers/mailbox/Kconfig +++ b/drivers/mailbox/Kconfig | |||
@@ -16,4 +16,38 @@ config PL320_MBOX | |||
16 | Management Engine, primarily for cpufreq. Say Y here if you want | 16 | Management Engine, primarily for cpufreq. Say Y here if you want |
17 | to use the PL320 IPCM support. | 17 | to use the PL320 IPCM support. |
18 | 18 | ||
19 | config OMAP_MBOX | ||
20 | tristate | ||
21 | help | ||
22 | This option is selected by any OMAP architecture specific mailbox | ||
23 | driver such as CONFIG_OMAP1_MBOX or CONFIG_OMAP2PLUS_MBOX. This | ||
24 | enables the common OMAP mailbox framework code. | ||
25 | |||
26 | config OMAP1_MBOX | ||
27 | tristate "OMAP1 Mailbox framework support" | ||
28 | depends on ARCH_OMAP1 | ||
29 | select OMAP_MBOX | ||
30 | help | ||
31 | Mailbox implementation for OMAP chips with hardware for | ||
32 | interprocessor communication involving DSP in OMAP1. Say Y here | ||
33 | if you want to use OMAP1 Mailbox framework support. | ||
34 | |||
35 | config OMAP2PLUS_MBOX | ||
36 | tristate "OMAP2+ Mailbox framework support" | ||
37 | depends on ARCH_OMAP2PLUS | ||
38 | select OMAP_MBOX | ||
39 | help | ||
40 | Mailbox implementation for OMAP family chips with hardware for | ||
41 | interprocessor communication involving DSP, IVA1.0 and IVA2 in | ||
42 | OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you | ||
43 | want to use OMAP2+ Mailbox framework support. | ||
44 | |||
45 | config OMAP_MBOX_KFIFO_SIZE | ||
46 | int "Mailbox kfifo default buffer size (bytes)" | ||
47 | depends on OMAP2PLUS_MBOX || OMAP1_MBOX | ||
48 | default 256 | ||
49 | help | ||
50 | Specify the default size of mailbox's kfifo buffers (bytes). | ||
51 | This can also be changed at runtime (via the mbox_kfifo_size | ||
52 | module parameter). | ||
19 | endif | 53 | endif |
diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile index 543ad6a79505..e0facb34084a 100644 --- a/drivers/mailbox/Makefile +++ b/drivers/mailbox/Makefile | |||
@@ -1 +1,7 @@ | |||
1 | obj-$(CONFIG_PL320_MBOX) += pl320-ipc.o | 1 | obj-$(CONFIG_PL320_MBOX) += pl320-ipc.o |
2 | |||
3 | obj-$(CONFIG_OMAP_MBOX) += omap-mailbox.o | ||
4 | obj-$(CONFIG_OMAP1_MBOX) += mailbox_omap1.o | ||
5 | mailbox_omap1-objs := mailbox-omap1.o | ||
6 | obj-$(CONFIG_OMAP2PLUS_MBOX) += mailbox_omap2.o | ||
7 | mailbox_omap2-objs := mailbox-omap2.o | ||
diff --git a/arch/arm/mach-omap1/mailbox.c b/drivers/mailbox/mailbox-omap1.c index efc8f207f6fc..9001b7633f10 100644 --- a/arch/arm/mach-omap1/mailbox.c +++ b/drivers/mailbox/mailbox-omap1.c | |||
@@ -13,7 +13,8 @@ | |||
13 | #include <linux/interrupt.h> | 13 | #include <linux/interrupt.h> |
14 | #include <linux/platform_device.h> | 14 | #include <linux/platform_device.h> |
15 | #include <linux/io.h> | 15 | #include <linux/io.h> |
16 | #include <plat/mailbox.h> | 16 | |
17 | #include "omap-mbox.h" | ||
17 | 18 | ||
18 | #define MAILBOX_ARM2DSP1 0x00 | 19 | #define MAILBOX_ARM2DSP1 0x00 |
19 | #define MAILBOX_ARM2DSP1b 0x04 | 20 | #define MAILBOX_ARM2DSP1b 0x04 |
@@ -86,21 +87,21 @@ static int omap1_mbox_fifo_full(struct omap_mbox *mbox) | |||
86 | 87 | ||
87 | /* irq */ | 88 | /* irq */ |
88 | static void | 89 | static void |
89 | omap1_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_type_t irq) | 90 | omap1_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) |
90 | { | 91 | { |
91 | if (irq == IRQ_RX) | 92 | if (irq == IRQ_RX) |
92 | enable_irq(mbox->irq); | 93 | enable_irq(mbox->irq); |
93 | } | 94 | } |
94 | 95 | ||
95 | static void | 96 | static void |
96 | omap1_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_type_t irq) | 97 | omap1_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) |
97 | { | 98 | { |
98 | if (irq == IRQ_RX) | 99 | if (irq == IRQ_RX) |
99 | disable_irq(mbox->irq); | 100 | disable_irq(mbox->irq); |
100 | } | 101 | } |
101 | 102 | ||
102 | static int | 103 | static int |
103 | omap1_mbox_is_irq(struct omap_mbox *mbox, omap_mbox_type_t irq) | 104 | omap1_mbox_is_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) |
104 | { | 105 | { |
105 | if (irq == IRQ_TX) | 106 | if (irq == IRQ_TX) |
106 | return 0; | 107 | return 0; |
@@ -152,6 +153,9 @@ static int omap1_mbox_probe(struct platform_device *pdev) | |||
152 | list[0]->irq = platform_get_irq_byname(pdev, "dsp"); | 153 | list[0]->irq = platform_get_irq_byname(pdev, "dsp"); |
153 | 154 | ||
154 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 155 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
156 | if (!mem) | ||
157 | return -ENOENT; | ||
158 | |||
155 | mbox_base = ioremap(mem->start, resource_size(mem)); | 159 | mbox_base = ioremap(mem->start, resource_size(mem)); |
156 | if (!mbox_base) | 160 | if (!mbox_base) |
157 | return -ENOMEM; | 161 | return -ENOMEM; |
diff --git a/arch/arm/mach-omap2/mailbox.c b/drivers/mailbox/mailbox-omap2.c index 0b080267b7f6..eba380d7b17f 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/drivers/mailbox/mailbox-omap2.c | |||
@@ -11,15 +11,15 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | #include <linux/slab.h> | ||
14 | #include <linux/clk.h> | 15 | #include <linux/clk.h> |
15 | #include <linux/err.h> | 16 | #include <linux/err.h> |
16 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
17 | #include <linux/io.h> | 18 | #include <linux/io.h> |
18 | #include <linux/pm_runtime.h> | 19 | #include <linux/pm_runtime.h> |
20 | #include <linux/platform_data/mailbox-omap.h> | ||
19 | 21 | ||
20 | #include <plat/mailbox.h> | 22 | #include "omap-mbox.h" |
21 | |||
22 | #include "soc.h" | ||
23 | 23 | ||
24 | #define MAILBOX_REVISION 0x000 | 24 | #define MAILBOX_REVISION 0x000 |
25 | #define MAILBOX_MESSAGE(m) (0x040 + 4 * (m)) | 25 | #define MAILBOX_MESSAGE(m) (0x040 + 4 * (m)) |
@@ -59,11 +59,9 @@ struct omap_mbox2_priv { | |||
59 | u32 notfull_bit; | 59 | u32 notfull_bit; |
60 | u32 ctx[OMAP4_MBOX_NR_REGS]; | 60 | u32 ctx[OMAP4_MBOX_NR_REGS]; |
61 | unsigned long irqdisable; | 61 | unsigned long irqdisable; |
62 | u32 intr_type; | ||
62 | }; | 63 | }; |
63 | 64 | ||
64 | static void omap2_mbox_enable_irq(struct omap_mbox *mbox, | ||
65 | omap_mbox_type_t irq); | ||
66 | |||
67 | static inline unsigned int mbox_read_reg(size_t ofs) | 65 | static inline unsigned int mbox_read_reg(size_t ofs) |
68 | { | 66 | { |
69 | return __raw_readl(mbox_base + ofs); | 67 | return __raw_readl(mbox_base + ofs); |
@@ -124,8 +122,7 @@ static int omap2_mbox_fifo_full(struct omap_mbox *mbox) | |||
124 | } | 122 | } |
125 | 123 | ||
126 | /* Mailbox IRQ handle functions */ | 124 | /* Mailbox IRQ handle functions */ |
127 | static void omap2_mbox_enable_irq(struct omap_mbox *mbox, | 125 | static void omap2_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) |
128 | omap_mbox_type_t irq) | ||
129 | { | 126 | { |
130 | struct omap_mbox2_priv *p = mbox->priv; | 127 | struct omap_mbox2_priv *p = mbox->priv; |
131 | u32 l, bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; | 128 | u32 l, bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; |
@@ -135,20 +132,22 @@ static void omap2_mbox_enable_irq(struct omap_mbox *mbox, | |||
135 | mbox_write_reg(l, p->irqenable); | 132 | mbox_write_reg(l, p->irqenable); |
136 | } | 133 | } |
137 | 134 | ||
138 | static void omap2_mbox_disable_irq(struct omap_mbox *mbox, | 135 | static void omap2_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) |
139 | omap_mbox_type_t irq) | ||
140 | { | 136 | { |
141 | struct omap_mbox2_priv *p = mbox->priv; | 137 | struct omap_mbox2_priv *p = mbox->priv; |
142 | u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; | 138 | u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; |
143 | 139 | ||
144 | if (!cpu_is_omap44xx()) | 140 | /* |
141 | * Read and update the interrupt configuration register for pre-OMAP4. | ||
142 | * OMAP4 and later SoCs have a dedicated interrupt disabling register. | ||
143 | */ | ||
144 | if (!p->intr_type) | ||
145 | bit = mbox_read_reg(p->irqdisable) & ~bit; | 145 | bit = mbox_read_reg(p->irqdisable) & ~bit; |
146 | 146 | ||
147 | mbox_write_reg(bit, p->irqdisable); | 147 | mbox_write_reg(bit, p->irqdisable); |
148 | } | 148 | } |
149 | 149 | ||
150 | static void omap2_mbox_ack_irq(struct omap_mbox *mbox, | 150 | static void omap2_mbox_ack_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) |
151 | omap_mbox_type_t irq) | ||
152 | { | 151 | { |
153 | struct omap_mbox2_priv *p = mbox->priv; | 152 | struct omap_mbox2_priv *p = mbox->priv; |
154 | u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; | 153 | u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; |
@@ -159,8 +158,7 @@ static void omap2_mbox_ack_irq(struct omap_mbox *mbox, | |||
159 | mbox_read_reg(p->irqstatus); | 158 | mbox_read_reg(p->irqstatus); |
160 | } | 159 | } |
161 | 160 | ||
162 | static int omap2_mbox_is_irq(struct omap_mbox *mbox, | 161 | static int omap2_mbox_is_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) |
163 | omap_mbox_type_t irq) | ||
164 | { | 162 | { |
165 | struct omap_mbox2_priv *p = mbox->priv; | 163 | struct omap_mbox2_priv *p = mbox->priv; |
166 | u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; | 164 | u32 bit = (irq == IRQ_TX) ? p->notfull_bit : p->newmsg_bit; |
@@ -175,7 +173,8 @@ static void omap2_mbox_save_ctx(struct omap_mbox *mbox) | |||
175 | int i; | 173 | int i; |
176 | struct omap_mbox2_priv *p = mbox->priv; | 174 | struct omap_mbox2_priv *p = mbox->priv; |
177 | int nr_regs; | 175 | int nr_regs; |
178 | if (cpu_is_omap44xx()) | 176 | |
177 | if (p->intr_type) | ||
179 | nr_regs = OMAP4_MBOX_NR_REGS; | 178 | nr_regs = OMAP4_MBOX_NR_REGS; |
180 | else | 179 | else |
181 | nr_regs = MBOX_NR_REGS; | 180 | nr_regs = MBOX_NR_REGS; |
@@ -192,7 +191,8 @@ static void omap2_mbox_restore_ctx(struct omap_mbox *mbox) | |||
192 | int i; | 191 | int i; |
193 | struct omap_mbox2_priv *p = mbox->priv; | 192 | struct omap_mbox2_priv *p = mbox->priv; |
194 | int nr_regs; | 193 | int nr_regs; |
195 | if (cpu_is_omap44xx()) | 194 | |
195 | if (p->intr_type) | ||
196 | nr_regs = OMAP4_MBOX_NR_REGS; | 196 | nr_regs = OMAP4_MBOX_NR_REGS; |
197 | else | 197 | else |
198 | nr_regs = MBOX_NR_REGS; | 198 | nr_regs = MBOX_NR_REGS; |
@@ -220,192 +220,120 @@ static struct omap_mbox_ops omap2_mbox_ops = { | |||
220 | .restore_ctx = omap2_mbox_restore_ctx, | 220 | .restore_ctx = omap2_mbox_restore_ctx, |
221 | }; | 221 | }; |
222 | 222 | ||
223 | /* | ||
224 | * MAILBOX 0: ARM -> DSP, | ||
225 | * MAILBOX 1: ARM <- DSP. | ||
226 | * MAILBOX 2: ARM -> IVA, | ||
227 | * MAILBOX 3: ARM <- IVA. | ||
228 | */ | ||
229 | |||
230 | /* FIXME: the following structs should be filled automatically by the user id */ | ||
231 | |||
232 | #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP2) | ||
233 | /* DSP */ | ||
234 | static struct omap_mbox2_priv omap2_mbox_dsp_priv = { | ||
235 | .tx_fifo = { | ||
236 | .msg = MAILBOX_MESSAGE(0), | ||
237 | .fifo_stat = MAILBOX_FIFOSTATUS(0), | ||
238 | }, | ||
239 | .rx_fifo = { | ||
240 | .msg = MAILBOX_MESSAGE(1), | ||
241 | .msg_stat = MAILBOX_MSGSTATUS(1), | ||
242 | }, | ||
243 | .irqenable = MAILBOX_IRQENABLE(0), | ||
244 | .irqstatus = MAILBOX_IRQSTATUS(0), | ||
245 | .notfull_bit = MAILBOX_IRQ_NOTFULL(0), | ||
246 | .newmsg_bit = MAILBOX_IRQ_NEWMSG(1), | ||
247 | .irqdisable = MAILBOX_IRQENABLE(0), | ||
248 | }; | ||
249 | |||
250 | struct omap_mbox mbox_dsp_info = { | ||
251 | .name = "dsp", | ||
252 | .ops = &omap2_mbox_ops, | ||
253 | .priv = &omap2_mbox_dsp_priv, | ||
254 | }; | ||
255 | #endif | ||
256 | |||
257 | #if defined(CONFIG_ARCH_OMAP3) | ||
258 | struct omap_mbox *omap3_mboxes[] = { &mbox_dsp_info, NULL }; | ||
259 | #endif | ||
260 | |||
261 | #if defined(CONFIG_SOC_OMAP2420) | ||
262 | /* IVA */ | ||
263 | static struct omap_mbox2_priv omap2_mbox_iva_priv = { | ||
264 | .tx_fifo = { | ||
265 | .msg = MAILBOX_MESSAGE(2), | ||
266 | .fifo_stat = MAILBOX_FIFOSTATUS(2), | ||
267 | }, | ||
268 | .rx_fifo = { | ||
269 | .msg = MAILBOX_MESSAGE(3), | ||
270 | .msg_stat = MAILBOX_MSGSTATUS(3), | ||
271 | }, | ||
272 | .irqenable = MAILBOX_IRQENABLE(3), | ||
273 | .irqstatus = MAILBOX_IRQSTATUS(3), | ||
274 | .notfull_bit = MAILBOX_IRQ_NOTFULL(2), | ||
275 | .newmsg_bit = MAILBOX_IRQ_NEWMSG(3), | ||
276 | .irqdisable = MAILBOX_IRQENABLE(3), | ||
277 | }; | ||
278 | |||
279 | static struct omap_mbox mbox_iva_info = { | ||
280 | .name = "iva", | ||
281 | .ops = &omap2_mbox_ops, | ||
282 | .priv = &omap2_mbox_iva_priv, | ||
283 | }; | ||
284 | #endif | ||
285 | |||
286 | #ifdef CONFIG_ARCH_OMAP2 | ||
287 | struct omap_mbox *omap2_mboxes[] = { | ||
288 | &mbox_dsp_info, | ||
289 | #ifdef CONFIG_SOC_OMAP2420 | ||
290 | &mbox_iva_info, | ||
291 | #endif | ||
292 | NULL | ||
293 | }; | ||
294 | #endif | ||
295 | |||
296 | #if defined(CONFIG_ARCH_OMAP4) | ||
297 | /* OMAP4 */ | ||
298 | static struct omap_mbox2_priv omap2_mbox_1_priv = { | ||
299 | .tx_fifo = { | ||
300 | .msg = MAILBOX_MESSAGE(0), | ||
301 | .fifo_stat = MAILBOX_FIFOSTATUS(0), | ||
302 | }, | ||
303 | .rx_fifo = { | ||
304 | .msg = MAILBOX_MESSAGE(1), | ||
305 | .msg_stat = MAILBOX_MSGSTATUS(1), | ||
306 | }, | ||
307 | .irqenable = OMAP4_MAILBOX_IRQENABLE(0), | ||
308 | .irqstatus = OMAP4_MAILBOX_IRQSTATUS(0), | ||
309 | .notfull_bit = MAILBOX_IRQ_NOTFULL(0), | ||
310 | .newmsg_bit = MAILBOX_IRQ_NEWMSG(1), | ||
311 | .irqdisable = OMAP4_MAILBOX_IRQENABLE_CLR(0), | ||
312 | }; | ||
313 | |||
314 | struct omap_mbox mbox_1_info = { | ||
315 | .name = "mailbox-1", | ||
316 | .ops = &omap2_mbox_ops, | ||
317 | .priv = &omap2_mbox_1_priv, | ||
318 | }; | ||
319 | |||
320 | static struct omap_mbox2_priv omap2_mbox_2_priv = { | ||
321 | .tx_fifo = { | ||
322 | .msg = MAILBOX_MESSAGE(3), | ||
323 | .fifo_stat = MAILBOX_FIFOSTATUS(3), | ||
324 | }, | ||
325 | .rx_fifo = { | ||
326 | .msg = MAILBOX_MESSAGE(2), | ||
327 | .msg_stat = MAILBOX_MSGSTATUS(2), | ||
328 | }, | ||
329 | .irqenable = OMAP4_MAILBOX_IRQENABLE(0), | ||
330 | .irqstatus = OMAP4_MAILBOX_IRQSTATUS(0), | ||
331 | .notfull_bit = MAILBOX_IRQ_NOTFULL(3), | ||
332 | .newmsg_bit = MAILBOX_IRQ_NEWMSG(2), | ||
333 | .irqdisable = OMAP4_MAILBOX_IRQENABLE_CLR(0), | ||
334 | }; | ||
335 | |||
336 | struct omap_mbox mbox_2_info = { | ||
337 | .name = "mailbox-2", | ||
338 | .ops = &omap2_mbox_ops, | ||
339 | .priv = &omap2_mbox_2_priv, | ||
340 | }; | ||
341 | |||
342 | struct omap_mbox *omap4_mboxes[] = { &mbox_1_info, &mbox_2_info, NULL }; | ||
343 | #endif | ||
344 | |||
345 | static int omap2_mbox_probe(struct platform_device *pdev) | 223 | static int omap2_mbox_probe(struct platform_device *pdev) |
346 | { | 224 | { |
347 | struct resource *mem; | 225 | struct resource *mem; |
348 | int ret; | 226 | int ret; |
349 | struct omap_mbox **list; | 227 | struct omap_mbox **list, *mbox, *mboxblk; |
350 | 228 | struct omap_mbox2_priv *priv, *privblk; | |
351 | if (false) | 229 | struct omap_mbox_pdata *pdata = pdev->dev.platform_data; |
352 | ; | 230 | struct omap_mbox_dev_info *info; |
353 | #if defined(CONFIG_ARCH_OMAP3) | 231 | int i; |
354 | else if (cpu_is_omap34xx()) { | ||
355 | list = omap3_mboxes; | ||
356 | 232 | ||
357 | list[0]->irq = platform_get_irq(pdev, 0); | 233 | if (!pdata || !pdata->info_cnt || !pdata->info) { |
234 | pr_err("%s: platform not supported\n", __func__); | ||
235 | return -ENODEV; | ||
358 | } | 236 | } |
359 | #endif | ||
360 | #if defined(CONFIG_ARCH_OMAP2) | ||
361 | else if (cpu_is_omap2430()) { | ||
362 | list = omap2_mboxes; | ||
363 | 237 | ||
364 | list[0]->irq = platform_get_irq(pdev, 0); | 238 | /* allocate one extra for marking end of list */ |
365 | } else if (cpu_is_omap2420()) { | 239 | list = kzalloc((pdata->info_cnt + 1) * sizeof(*list), GFP_KERNEL); |
366 | list = omap2_mboxes; | 240 | if (!list) |
241 | return -ENOMEM; | ||
367 | 242 | ||
368 | list[0]->irq = platform_get_irq_byname(pdev, "dsp"); | 243 | mboxblk = mbox = kzalloc(pdata->info_cnt * sizeof(*mbox), GFP_KERNEL); |
369 | list[1]->irq = platform_get_irq_byname(pdev, "iva"); | 244 | if (!mboxblk) { |
245 | ret = -ENOMEM; | ||
246 | goto free_list; | ||
370 | } | 247 | } |
371 | #endif | ||
372 | #if defined(CONFIG_ARCH_OMAP4) | ||
373 | else if (cpu_is_omap44xx()) { | ||
374 | list = omap4_mboxes; | ||
375 | 248 | ||
376 | list[0]->irq = list[1]->irq = platform_get_irq(pdev, 0); | 249 | privblk = priv = kzalloc(pdata->info_cnt * sizeof(*priv), GFP_KERNEL); |
250 | if (!privblk) { | ||
251 | ret = -ENOMEM; | ||
252 | goto free_mboxblk; | ||
377 | } | 253 | } |
378 | #endif | 254 | |
379 | else { | 255 | info = pdata->info; |
380 | pr_err("%s: platform not supported\n", __func__); | 256 | for (i = 0; i < pdata->info_cnt; i++, info++, priv++) { |
381 | return -ENODEV; | 257 | priv->tx_fifo.msg = MAILBOX_MESSAGE(info->tx_id); |
258 | priv->tx_fifo.fifo_stat = MAILBOX_FIFOSTATUS(info->tx_id); | ||
259 | priv->rx_fifo.msg = MAILBOX_MESSAGE(info->rx_id); | ||
260 | priv->rx_fifo.msg_stat = MAILBOX_MSGSTATUS(info->rx_id); | ||
261 | priv->notfull_bit = MAILBOX_IRQ_NOTFULL(info->tx_id); | ||
262 | priv->newmsg_bit = MAILBOX_IRQ_NEWMSG(info->rx_id); | ||
263 | if (pdata->intr_type) { | ||
264 | priv->irqenable = OMAP4_MAILBOX_IRQENABLE(info->usr_id); | ||
265 | priv->irqstatus = OMAP4_MAILBOX_IRQSTATUS(info->usr_id); | ||
266 | priv->irqdisable = | ||
267 | OMAP4_MAILBOX_IRQENABLE_CLR(info->usr_id); | ||
268 | } else { | ||
269 | priv->irqenable = MAILBOX_IRQENABLE(info->usr_id); | ||
270 | priv->irqstatus = MAILBOX_IRQSTATUS(info->usr_id); | ||
271 | priv->irqdisable = MAILBOX_IRQENABLE(info->usr_id); | ||
272 | } | ||
273 | priv->intr_type = pdata->intr_type; | ||
274 | |||
275 | mbox->priv = priv; | ||
276 | mbox->name = info->name; | ||
277 | mbox->ops = &omap2_mbox_ops; | ||
278 | mbox->irq = platform_get_irq(pdev, info->irq_id); | ||
279 | if (mbox->irq < 0) { | ||
280 | ret = mbox->irq; | ||
281 | goto free_privblk; | ||
282 | } | ||
283 | list[i] = mbox++; | ||
382 | } | 284 | } |
383 | 285 | ||
384 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 286 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
287 | if (!mem) { | ||
288 | ret = -ENOENT; | ||
289 | goto free_privblk; | ||
290 | } | ||
291 | |||
385 | mbox_base = ioremap(mem->start, resource_size(mem)); | 292 | mbox_base = ioremap(mem->start, resource_size(mem)); |
386 | if (!mbox_base) | 293 | if (!mbox_base) { |
387 | return -ENOMEM; | 294 | ret = -ENOMEM; |
295 | goto free_privblk; | ||
296 | } | ||
388 | 297 | ||
389 | ret = omap_mbox_register(&pdev->dev, list); | 298 | ret = omap_mbox_register(&pdev->dev, list); |
390 | if (ret) { | 299 | if (ret) |
391 | iounmap(mbox_base); | 300 | goto unmap_mbox; |
392 | return ret; | 301 | platform_set_drvdata(pdev, list); |
393 | } | ||
394 | 302 | ||
395 | return 0; | 303 | return 0; |
304 | |||
305 | unmap_mbox: | ||
306 | iounmap(mbox_base); | ||
307 | free_privblk: | ||
308 | kfree(privblk); | ||
309 | free_mboxblk: | ||
310 | kfree(mboxblk); | ||
311 | free_list: | ||
312 | kfree(list); | ||
313 | return ret; | ||
396 | } | 314 | } |
397 | 315 | ||
398 | static int omap2_mbox_remove(struct platform_device *pdev) | 316 | static int omap2_mbox_remove(struct platform_device *pdev) |
399 | { | 317 | { |
318 | struct omap_mbox2_priv *privblk; | ||
319 | struct omap_mbox **list = platform_get_drvdata(pdev); | ||
320 | struct omap_mbox *mboxblk = list[0]; | ||
321 | |||
322 | privblk = mboxblk->priv; | ||
400 | omap_mbox_unregister(); | 323 | omap_mbox_unregister(); |
401 | iounmap(mbox_base); | 324 | iounmap(mbox_base); |
325 | kfree(privblk); | ||
326 | kfree(mboxblk); | ||
327 | kfree(list); | ||
328 | platform_set_drvdata(pdev, NULL); | ||
329 | |||
402 | return 0; | 330 | return 0; |
403 | } | 331 | } |
404 | 332 | ||
405 | static struct platform_driver omap2_mbox_driver = { | 333 | static struct platform_driver omap2_mbox_driver = { |
406 | .probe = omap2_mbox_probe, | 334 | .probe = omap2_mbox_probe, |
407 | .remove = omap2_mbox_remove, | 335 | .remove = omap2_mbox_remove, |
408 | .driver = { | 336 | .driver = { |
409 | .name = "omap-mailbox", | 337 | .name = "omap-mailbox", |
410 | }, | 338 | }, |
411 | }; | 339 | }; |
diff --git a/arch/arm/plat-omap/mailbox.c b/drivers/mailbox/omap-mailbox.c index 42377ef9ea3d..d79a646b9042 100644 --- a/arch/arm/plat-omap/mailbox.c +++ b/drivers/mailbox/omap-mailbox.c | |||
@@ -31,7 +31,7 @@ | |||
31 | #include <linux/notifier.h> | 31 | #include <linux/notifier.h> |
32 | #include <linux/module.h> | 32 | #include <linux/module.h> |
33 | 33 | ||
34 | #include <plat/mailbox.h> | 34 | #include "omap-mbox.h" |
35 | 35 | ||
36 | static struct omap_mbox **mboxes; | 36 | static struct omap_mbox **mboxes; |
37 | 37 | ||
@@ -116,6 +116,40 @@ out: | |||
116 | } | 116 | } |
117 | EXPORT_SYMBOL(omap_mbox_msg_send); | 117 | EXPORT_SYMBOL(omap_mbox_msg_send); |
118 | 118 | ||
119 | void omap_mbox_save_ctx(struct omap_mbox *mbox) | ||
120 | { | ||
121 | if (!mbox->ops->save_ctx) { | ||
122 | dev_err(mbox->dev, "%s:\tno save\n", __func__); | ||
123 | return; | ||
124 | } | ||
125 | |||
126 | mbox->ops->save_ctx(mbox); | ||
127 | } | ||
128 | EXPORT_SYMBOL(omap_mbox_save_ctx); | ||
129 | |||
130 | void omap_mbox_restore_ctx(struct omap_mbox *mbox) | ||
131 | { | ||
132 | if (!mbox->ops->restore_ctx) { | ||
133 | dev_err(mbox->dev, "%s:\tno restore\n", __func__); | ||
134 | return; | ||
135 | } | ||
136 | |||
137 | mbox->ops->restore_ctx(mbox); | ||
138 | } | ||
139 | EXPORT_SYMBOL(omap_mbox_restore_ctx); | ||
140 | |||
141 | void omap_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) | ||
142 | { | ||
143 | mbox->ops->enable_irq(mbox, irq); | ||
144 | } | ||
145 | EXPORT_SYMBOL(omap_mbox_enable_irq); | ||
146 | |||
147 | void omap_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq) | ||
148 | { | ||
149 | mbox->ops->disable_irq(mbox, irq); | ||
150 | } | ||
151 | EXPORT_SYMBOL(omap_mbox_disable_irq); | ||
152 | |||
119 | static void mbox_tx_tasklet(unsigned long tx_data) | 153 | static void mbox_tx_tasklet(unsigned long tx_data) |
120 | { | 154 | { |
121 | struct omap_mbox *mbox = (struct omap_mbox *)tx_data; | 155 | struct omap_mbox *mbox = (struct omap_mbox *)tx_data; |
@@ -261,13 +295,6 @@ static int omap_mbox_startup(struct omap_mbox *mbox) | |||
261 | } | 295 | } |
262 | 296 | ||
263 | if (!mbox->use_count++) { | 297 | if (!mbox->use_count++) { |
264 | ret = request_irq(mbox->irq, mbox_interrupt, IRQF_SHARED, | ||
265 | mbox->name, mbox); | ||
266 | if (unlikely(ret)) { | ||
267 | pr_err("failed to register mailbox interrupt:%d\n", | ||
268 | ret); | ||
269 | goto fail_request_irq; | ||
270 | } | ||
271 | mq = mbox_queue_alloc(mbox, NULL, mbox_tx_tasklet); | 298 | mq = mbox_queue_alloc(mbox, NULL, mbox_tx_tasklet); |
272 | if (!mq) { | 299 | if (!mq) { |
273 | ret = -ENOMEM; | 300 | ret = -ENOMEM; |
@@ -282,17 +309,24 @@ static int omap_mbox_startup(struct omap_mbox *mbox) | |||
282 | } | 309 | } |
283 | mbox->rxq = mq; | 310 | mbox->rxq = mq; |
284 | mq->mbox = mbox; | 311 | mq->mbox = mbox; |
312 | ret = request_irq(mbox->irq, mbox_interrupt, IRQF_SHARED, | ||
313 | mbox->name, mbox); | ||
314 | if (unlikely(ret)) { | ||
315 | pr_err("failed to register mailbox interrupt:%d\n", | ||
316 | ret); | ||
317 | goto fail_request_irq; | ||
318 | } | ||
285 | 319 | ||
286 | omap_mbox_enable_irq(mbox, IRQ_RX); | 320 | omap_mbox_enable_irq(mbox, IRQ_RX); |
287 | } | 321 | } |
288 | mutex_unlock(&mbox_configured_lock); | 322 | mutex_unlock(&mbox_configured_lock); |
289 | return 0; | 323 | return 0; |
290 | 324 | ||
325 | fail_request_irq: | ||
326 | mbox_queue_free(mbox->rxq); | ||
291 | fail_alloc_rxq: | 327 | fail_alloc_rxq: |
292 | mbox_queue_free(mbox->txq); | 328 | mbox_queue_free(mbox->txq); |
293 | fail_alloc_txq: | 329 | fail_alloc_txq: |
294 | free_irq(mbox->irq, mbox); | ||
295 | fail_request_irq: | ||
296 | if (mbox->ops->shutdown) | 330 | if (mbox->ops->shutdown) |
297 | mbox->ops->shutdown(mbox); | 331 | mbox->ops->shutdown(mbox); |
298 | mbox->use_count--; | 332 | mbox->use_count--; |
diff --git a/arch/arm/plat-omap/include/plat/mailbox.h b/drivers/mailbox/omap-mbox.h index cc3921e9059c..6cd38fc68599 100644 --- a/arch/arm/plat-omap/include/plat/mailbox.h +++ b/drivers/mailbox/omap-mbox.h | |||
@@ -1,20 +1,20 @@ | |||
1 | /* mailbox.h */ | 1 | /* |
2 | * omap-mbox.h: OMAP mailbox internal definitions | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
2 | 8 | ||
3 | #ifndef MAILBOX_H | 9 | #ifndef OMAP_MBOX_H |
4 | #define MAILBOX_H | 10 | #define OMAP_MBOX_H |
5 | 11 | ||
6 | #include <linux/spinlock.h> | ||
7 | #include <linux/workqueue.h> | ||
8 | #include <linux/interrupt.h> | ||
9 | #include <linux/device.h> | 12 | #include <linux/device.h> |
13 | #include <linux/interrupt.h> | ||
10 | #include <linux/kfifo.h> | 14 | #include <linux/kfifo.h> |
11 | 15 | #include <linux/spinlock.h> | |
12 | typedef u32 mbox_msg_t; | 16 | #include <linux/workqueue.h> |
13 | struct omap_mbox; | 17 | #include <linux/omap-mailbox.h> |
14 | |||
15 | typedef int __bitwise omap_mbox_irq_t; | ||
16 | #define IRQ_TX ((__force omap_mbox_irq_t) 1) | ||
17 | #define IRQ_RX ((__force omap_mbox_irq_t) 2) | ||
18 | 18 | ||
19 | typedef int __bitwise omap_mbox_type_t; | 19 | typedef int __bitwise omap_mbox_type_t; |
20 | #define OMAP_MBOX_TYPE1 ((__force omap_mbox_type_t) 1) | 20 | #define OMAP_MBOX_TYPE1 ((__force omap_mbox_type_t) 1) |
@@ -51,55 +51,17 @@ struct omap_mbox_queue { | |||
51 | }; | 51 | }; |
52 | 52 | ||
53 | struct omap_mbox { | 53 | struct omap_mbox { |
54 | char *name; | 54 | const char *name; |
55 | unsigned int irq; | 55 | unsigned int irq; |
56 | struct omap_mbox_queue *txq, *rxq; | 56 | struct omap_mbox_queue *txq, *rxq; |
57 | struct omap_mbox_ops *ops; | 57 | struct omap_mbox_ops *ops; |
58 | struct device *dev; | 58 | struct device *dev; |
59 | void *priv; | 59 | void *priv; |
60 | int use_count; | 60 | int use_count; |
61 | struct blocking_notifier_head notifier; | 61 | struct blocking_notifier_head notifier; |
62 | }; | 62 | }; |
63 | 63 | ||
64 | int omap_mbox_msg_send(struct omap_mbox *, mbox_msg_t msg); | ||
65 | void omap_mbox_init_seq(struct omap_mbox *); | ||
66 | |||
67 | struct omap_mbox *omap_mbox_get(const char *, struct notifier_block *nb); | ||
68 | void omap_mbox_put(struct omap_mbox *mbox, struct notifier_block *nb); | ||
69 | |||
70 | int omap_mbox_register(struct device *parent, struct omap_mbox **); | 64 | int omap_mbox_register(struct device *parent, struct omap_mbox **); |
71 | int omap_mbox_unregister(void); | 65 | int omap_mbox_unregister(void); |
72 | 66 | ||
73 | static inline void omap_mbox_save_ctx(struct omap_mbox *mbox) | 67 | #endif /* OMAP_MBOX_H */ |
74 | { | ||
75 | if (!mbox->ops->save_ctx) { | ||
76 | dev_err(mbox->dev, "%s:\tno save\n", __func__); | ||
77 | return; | ||
78 | } | ||
79 | |||
80 | mbox->ops->save_ctx(mbox); | ||
81 | } | ||
82 | |||
83 | static inline void omap_mbox_restore_ctx(struct omap_mbox *mbox) | ||
84 | { | ||
85 | if (!mbox->ops->restore_ctx) { | ||
86 | dev_err(mbox->dev, "%s:\tno restore\n", __func__); | ||
87 | return; | ||
88 | } | ||
89 | |||
90 | mbox->ops->restore_ctx(mbox); | ||
91 | } | ||
92 | |||
93 | static inline void omap_mbox_enable_irq(struct omap_mbox *mbox, | ||
94 | omap_mbox_irq_t irq) | ||
95 | { | ||
96 | mbox->ops->enable_irq(mbox, irq); | ||
97 | } | ||
98 | |||
99 | static inline void omap_mbox_disable_irq(struct omap_mbox *mbox, | ||
100 | omap_mbox_irq_t irq) | ||
101 | { | ||
102 | mbox->ops->disable_irq(mbox, irq); | ||
103 | } | ||
104 | |||
105 | #endif /* MAILBOX_H */ | ||
diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig index d4d377c40ec9..ce1743d0b679 100644 --- a/drivers/remoteproc/Kconfig +++ b/drivers/remoteproc/Kconfig | |||
@@ -14,8 +14,9 @@ config OMAP_REMOTEPROC | |||
14 | depends on HAS_DMA | 14 | depends on HAS_DMA |
15 | depends on ARCH_OMAP4 || SOC_OMAP5 | 15 | depends on ARCH_OMAP4 || SOC_OMAP5 |
16 | depends on OMAP_IOMMU | 16 | depends on OMAP_IOMMU |
17 | depends on OMAP_MBOX_FWK | ||
18 | select REMOTEPROC | 17 | select REMOTEPROC |
18 | select MAILBOX | ||
19 | select OMAP2PLUS_MBOX | ||
19 | select RPMSG | 20 | select RPMSG |
20 | help | 21 | help |
21 | Say y here to support OMAP's remote processors (dual M3 | 22 | Say y here to support OMAP's remote processors (dual M3 |
diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index 0e396c155b3b..51689721ea7a 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c | |||
@@ -27,8 +27,8 @@ | |||
27 | #include <linux/platform_device.h> | 27 | #include <linux/platform_device.h> |
28 | #include <linux/dma-mapping.h> | 28 | #include <linux/dma-mapping.h> |
29 | #include <linux/remoteproc.h> | 29 | #include <linux/remoteproc.h> |
30 | #include <linux/omap-mailbox.h> | ||
30 | 31 | ||
31 | #include <plat/mailbox.h> | ||
32 | #include <linux/platform_data/remoteproc-omap.h> | 32 | #include <linux/platform_data/remoteproc-omap.h> |
33 | 33 | ||
34 | #include "omap_remoteproc.h" | 34 | #include "omap_remoteproc.h" |
diff --git a/drivers/staging/tidspbridge/Kconfig b/drivers/staging/tidspbridge/Kconfig index 60848f198b48..165b918b8171 100644 --- a/drivers/staging/tidspbridge/Kconfig +++ b/drivers/staging/tidspbridge/Kconfig | |||
@@ -5,7 +5,8 @@ | |||
5 | menuconfig TIDSPBRIDGE | 5 | menuconfig TIDSPBRIDGE |
6 | tristate "DSP Bridge driver" | 6 | tristate "DSP Bridge driver" |
7 | depends on ARCH_OMAP3 && !ARCH_MULTIPLATFORM | 7 | depends on ARCH_OMAP3 && !ARCH_MULTIPLATFORM |
8 | select OMAP_MBOX_FWK | 8 | select MAILBOX |
9 | select OMAP2PLUS_MBOX | ||
9 | help | 10 | help |
10 | DSP/BIOS Bridge is designed for platforms that contain a GPP and | 11 | DSP/BIOS Bridge is designed for platforms that contain a GPP and |
11 | one or more attached DSPs. The GPP is considered the master or | 12 | one or more attached DSPs. The GPP is considered the master or |
diff --git a/drivers/staging/tidspbridge/include/dspbridge/host_os.h b/drivers/staging/tidspbridge/include/dspbridge/host_os.h index 7f3a1db31619..d1441db469fc 100644 --- a/drivers/staging/tidspbridge/include/dspbridge/host_os.h +++ b/drivers/staging/tidspbridge/include/dspbridge/host_os.h | |||
@@ -41,7 +41,7 @@ | |||
41 | #include <linux/ioport.h> | 41 | #include <linux/ioport.h> |
42 | #include <linux/platform_device.h> | 42 | #include <linux/platform_device.h> |
43 | #include <linux/clk.h> | 43 | #include <linux/clk.h> |
44 | #include <plat/mailbox.h> | 44 | #include <linux/omap-mailbox.h> |
45 | #include <linux/pagemap.h> | 45 | #include <linux/pagemap.h> |
46 | #include <asm/cacheflush.h> | 46 | #include <asm/cacheflush.h> |
47 | #include <linux/dma-mapping.h> | 47 | #include <linux/dma-mapping.h> |
diff --git a/include/linux/omap-mailbox.h b/include/linux/omap-mailbox.h new file mode 100644 index 000000000000..f8322d9cd235 --- /dev/null +++ b/include/linux/omap-mailbox.h | |||
@@ -0,0 +1,29 @@ | |||
1 | /* | ||
2 | * omap-mailbox: interprocessor communication module for OMAP | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #ifndef OMAP_MAILBOX_H | ||
10 | #define OMAP_MAILBOX_H | ||
11 | |||
12 | typedef u32 mbox_msg_t; | ||
13 | struct omap_mbox; | ||
14 | |||
15 | typedef int __bitwise omap_mbox_irq_t; | ||
16 | #define IRQ_TX ((__force omap_mbox_irq_t) 1) | ||
17 | #define IRQ_RX ((__force omap_mbox_irq_t) 2) | ||
18 | |||
19 | int omap_mbox_msg_send(struct omap_mbox *, mbox_msg_t msg); | ||
20 | |||
21 | struct omap_mbox *omap_mbox_get(const char *, struct notifier_block *nb); | ||
22 | void omap_mbox_put(struct omap_mbox *mbox, struct notifier_block *nb); | ||
23 | |||
24 | void omap_mbox_save_ctx(struct omap_mbox *mbox); | ||
25 | void omap_mbox_restore_ctx(struct omap_mbox *mbox); | ||
26 | void omap_mbox_enable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq); | ||
27 | void omap_mbox_disable_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq); | ||
28 | |||
29 | #endif /* OMAP_MAILBOX_H */ | ||
diff --git a/include/linux/platform_data/mailbox-omap.h b/include/linux/platform_data/mailbox-omap.h new file mode 100644 index 000000000000..4631dbb4255e --- /dev/null +++ b/include/linux/platform_data/mailbox-omap.h | |||
@@ -0,0 +1,58 @@ | |||
1 | /* | ||
2 | * mailbox-omap.h | ||
3 | * | ||
4 | * Copyright (C) 2013 Texas Instruments, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * version 2 as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | */ | ||
15 | |||
16 | #ifndef _PLAT_MAILBOX_H | ||
17 | #define _PLAT_MAILBOX_H | ||
18 | |||
19 | /* Interrupt register configuration types */ | ||
20 | #define MBOX_INTR_CFG_TYPE1 (0) | ||
21 | #define MBOX_INTR_CFG_TYPE2 (1) | ||
22 | |||
23 | /** | ||
24 | * struct omap_mbox_dev_info - OMAP mailbox device attribute info | ||
25 | * @name: name of the mailbox device | ||
26 | * @tx_id: mailbox queue id used for transmitting messages | ||
27 | * @rx_id: mailbox queue id on which messages are received | ||
28 | * @irq_id: irq identifier number to use from the hwmod data | ||
29 | * @usr_id: mailbox user id for identifying the interrupt into | ||
30 | * the MPU interrupt controller. | ||
31 | */ | ||
32 | struct omap_mbox_dev_info { | ||
33 | const char *name; | ||
34 | u32 tx_id; | ||
35 | u32 rx_id; | ||
36 | u32 irq_id; | ||
37 | u32 usr_id; | ||
38 | }; | ||
39 | |||
40 | /** | ||
41 | * struct omap_mbox_pdata - OMAP mailbox platform data | ||
42 | * @intr_type: type of interrupt configuration registers used | ||
43 | while programming mailbox queue interrupts | ||
44 | * @num_users: number of users (processor devices) that the mailbox | ||
45 | * h/w block can interrupt | ||
46 | * @num_fifos: number of h/w fifos within the mailbox h/w block | ||
47 | * @info_cnt: number of mailbox devices for the platform | ||
48 | * @info: array of mailbox device attributes | ||
49 | */ | ||
50 | struct omap_mbox_pdata { | ||
51 | u32 intr_type; | ||
52 | u32 num_users; | ||
53 | u32 num_fifos; | ||
54 | u32 info_cnt; | ||
55 | struct omap_mbox_dev_info *info; | ||
56 | }; | ||
57 | |||
58 | #endif /* _PLAT_MAILBOX_H */ | ||