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authorAlexander Shiyan <shc_work@mail.ru>2013-05-06 09:53:53 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2013-08-05 15:46:13 -0400
commitf8e81c2b496d2ab85322feb4f0b581bef63cbff0 (patch)
tree5ad20232f7ab332cc5a8f34bb252b55c123484a4
parentba44039816367e9eebc3c0077ff1f25e95a73c26 (diff)
mtd: nand-gpio: Rename internal variables to match functionality
struct platform_device *dev => pdev struct nand_chip *this => chip Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
-rw-r--r--drivers/mtd/nand/gpio.c60
1 files changed, 30 insertions, 30 deletions
diff --git a/drivers/mtd/nand/gpio.c b/drivers/mtd/nand/gpio.c
index 312c28586245..6bf8f2e073ef 100644
--- a/drivers/mtd/nand/gpio.c
+++ b/drivers/mtd/nand/gpio.c
@@ -186,9 +186,9 @@ gpio_nand_get_io_sync(struct platform_device *pdev)
186 return platform_get_resource(pdev, IORESOURCE_MEM, 1); 186 return platform_get_resource(pdev, IORESOURCE_MEM, 1);
187} 187}
188 188
189static int gpio_nand_remove(struct platform_device *dev) 189static int gpio_nand_remove(struct platform_device *pdev)
190{ 190{
191 struct gpiomtd *gpiomtd = platform_get_drvdata(dev); 191 struct gpiomtd *gpiomtd = platform_get_drvdata(pdev);
192 192
193 nand_release(&gpiomtd->mtd_info); 193 nand_release(&gpiomtd->mtd_info);
194 194
@@ -199,82 +199,82 @@ static int gpio_nand_remove(struct platform_device *dev)
199 return 0; 199 return 0;
200} 200}
201 201
202static int gpio_nand_probe(struct platform_device *dev) 202static int gpio_nand_probe(struct platform_device *pdev)
203{ 203{
204 struct gpiomtd *gpiomtd; 204 struct gpiomtd *gpiomtd;
205 struct nand_chip *this; 205 struct nand_chip *chip;
206 struct resource *res; 206 struct resource *res;
207 struct mtd_part_parser_data ppdata = {}; 207 struct mtd_part_parser_data ppdata = {};
208 int ret = 0; 208 int ret = 0;
209 209
210 if (!dev->dev.of_node && !dev->dev.platform_data) 210 if (!pdev->dev.of_node && !pdev->dev.platform_data)
211 return -EINVAL; 211 return -EINVAL;
212 212
213 gpiomtd = devm_kzalloc(&dev->dev, sizeof(*gpiomtd), GFP_KERNEL); 213 gpiomtd = devm_kzalloc(&pdev->dev, sizeof(*gpiomtd), GFP_KERNEL);
214 if (!gpiomtd) { 214 if (!gpiomtd) {
215 dev_err(&dev->dev, "failed to create NAND MTD\n"); 215 dev_err(&pdev->dev, "failed to create NAND MTD\n");
216 return -ENOMEM; 216 return -ENOMEM;
217 } 217 }
218 218
219 this = &gpiomtd->nand_chip; 219 chip = &gpiomtd->nand_chip;
220 220
221 res = platform_get_resource(dev, IORESOURCE_MEM, 0); 221 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
222 this->IO_ADDR_R = devm_ioremap_resource(&dev->dev, res); 222 chip->IO_ADDR_R = devm_ioremap_resource(&pdev->dev, res);
223 if (IS_ERR(this->IO_ADDR_R)) 223 if (IS_ERR(chip->IO_ADDR_R))
224 return PTR_ERR(this->IO_ADDR_R); 224 return PTR_ERR(chip->IO_ADDR_R);
225 225
226 res = gpio_nand_get_io_sync(dev); 226 res = gpio_nand_get_io_sync(pdev);
227 if (res) { 227 if (res) {
228 gpiomtd->io_sync = devm_ioremap_resource(&dev->dev, res); 228 gpiomtd->io_sync = devm_ioremap_resource(&pdev->dev, res);
229 if (IS_ERR(gpiomtd->io_sync)) 229 if (IS_ERR(gpiomtd->io_sync))
230 return PTR_ERR(gpiomtd->io_sync); 230 return PTR_ERR(gpiomtd->io_sync);
231 } 231 }
232 232
233 ret = gpio_nand_get_config(&dev->dev, &gpiomtd->plat); 233 ret = gpio_nand_get_config(&pdev->dev, &gpiomtd->plat);
234 if (ret) 234 if (ret)
235 return ret; 235 return ret;
236 236
237 ret = devm_gpio_request(&dev->dev, gpiomtd->plat.gpio_nce, "NAND NCE"); 237 ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_nce, "NAND NCE");
238 if (ret) 238 if (ret)
239 return ret; 239 return ret;
240 gpio_direction_output(gpiomtd->plat.gpio_nce, 1); 240 gpio_direction_output(gpiomtd->plat.gpio_nce, 1);
241 241
242 if (gpio_is_valid(gpiomtd->plat.gpio_nwp)) { 242 if (gpio_is_valid(gpiomtd->plat.gpio_nwp)) {
243 ret = devm_gpio_request(&dev->dev, gpiomtd->plat.gpio_nwp, 243 ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_nwp,
244 "NAND NWP"); 244 "NAND NWP");
245 if (ret) 245 if (ret)
246 return ret; 246 return ret;
247 } 247 }
248 248
249 ret = devm_gpio_request(&dev->dev, gpiomtd->plat.gpio_ale, "NAND ALE"); 249 ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_ale, "NAND ALE");
250 if (ret) 250 if (ret)
251 return ret; 251 return ret;
252 gpio_direction_output(gpiomtd->plat.gpio_ale, 0); 252 gpio_direction_output(gpiomtd->plat.gpio_ale, 0);
253 253
254 ret = devm_gpio_request(&dev->dev, gpiomtd->plat.gpio_cle, "NAND CLE"); 254 ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_cle, "NAND CLE");
255 if (ret) 255 if (ret)
256 return ret; 256 return ret;
257 gpio_direction_output(gpiomtd->plat.gpio_cle, 0); 257 gpio_direction_output(gpiomtd->plat.gpio_cle, 0);
258 258
259 if (gpio_is_valid(gpiomtd->plat.gpio_rdy)) { 259 if (gpio_is_valid(gpiomtd->plat.gpio_rdy)) {
260 ret = devm_gpio_request(&dev->dev, gpiomtd->plat.gpio_rdy, 260 ret = devm_gpio_request(&pdev->dev, gpiomtd->plat.gpio_rdy,
261 "NAND RDY"); 261 "NAND RDY");
262 if (ret) 262 if (ret)
263 return ret; 263 return ret;
264 gpio_direction_input(gpiomtd->plat.gpio_rdy); 264 gpio_direction_input(gpiomtd->plat.gpio_rdy);
265 this->dev_ready = gpio_nand_devready; 265 chip->dev_ready = gpio_nand_devready;
266 } 266 }
267 267
268 this->IO_ADDR_W = this->IO_ADDR_R; 268 chip->IO_ADDR_W = chip->IO_ADDR_R;
269 this->ecc.mode = NAND_ECC_SOFT; 269 chip->ecc.mode = NAND_ECC_SOFT;
270 this->options = gpiomtd->plat.options; 270 chip->options = gpiomtd->plat.options;
271 this->chip_delay = gpiomtd->plat.chip_delay; 271 chip->chip_delay = gpiomtd->plat.chip_delay;
272 this->cmd_ctrl = gpio_nand_cmd_ctrl; 272 chip->cmd_ctrl = gpio_nand_cmd_ctrl;
273 273
274 gpiomtd->mtd_info.priv = this; 274 gpiomtd->mtd_info.priv = chip;
275 gpiomtd->mtd_info.owner = THIS_MODULE; 275 gpiomtd->mtd_info.owner = THIS_MODULE;
276 276
277 platform_set_drvdata(dev, gpiomtd); 277 platform_set_drvdata(pdev, gpiomtd);
278 278
279 if (gpio_is_valid(gpiomtd->plat.gpio_nwp)) 279 if (gpio_is_valid(gpiomtd->plat.gpio_nwp))
280 gpio_direction_output(gpiomtd->plat.gpio_nwp, 1); 280 gpio_direction_output(gpiomtd->plat.gpio_nwp, 1);
@@ -288,7 +288,7 @@ static int gpio_nand_probe(struct platform_device *dev)
288 gpiomtd->plat.adjust_parts(&gpiomtd->plat, 288 gpiomtd->plat.adjust_parts(&gpiomtd->plat,
289 gpiomtd->mtd_info.size); 289 gpiomtd->mtd_info.size);
290 290
291 ppdata.of_node = dev->dev.of_node; 291 ppdata.of_node = pdev->dev.of_node;
292 ret = mtd_device_parse_register(&gpiomtd->mtd_info, NULL, &ppdata, 292 ret = mtd_device_parse_register(&gpiomtd->mtd_info, NULL, &ppdata,
293 gpiomtd->plat.parts, 293 gpiomtd->plat.parts,
294 gpiomtd->plat.num_parts); 294 gpiomtd->plat.num_parts);