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authorLaxman Dewangan <ldewangan@nvidia.com>2012-08-10 09:03:02 -0400
committerStephen Warren <swarren@nvidia.com>2012-09-06 13:46:58 -0400
commitf8e798a9e215068e0de3dcc3d61a3dc4b94fde12 (patch)
treeb3a5d4a84e63710a48a9d349b320681b334caabf
parent4cbe5a555fa58a79b6ecbb6c531b8bab0650778d (diff)
ARM: tegra: use IO_ADDRESS for getting virtual address
Use macro IO_ADDRESS for getting virtual address of corresponding physical address to make the consistency with rest of Tegra code-base. This macro calls the IO_TO_VIRT() which is defined in arch/arm/mach-tegra/include/mach/iomap.h Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
-rw-r--r--arch/arm/mach-tegra/apbio.c4
-rw-r--r--arch/arm/mach-tegra/fuse.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/apbio.c b/arch/arm/mach-tegra/apbio.c
index dc0fe389be56..643a37809a15 100644
--- a/arch/arm/mach-tegra/apbio.c
+++ b/arch/arm/mach-tegra/apbio.c
@@ -293,12 +293,12 @@ static apbio_write_fptr apbio_write;
293 293
294static u32 tegra_apb_readl_direct(unsigned long offset) 294static u32 tegra_apb_readl_direct(unsigned long offset)
295{ 295{
296 return readl(IO_TO_VIRT(offset)); 296 return readl(IO_ADDRESS(offset));
297} 297}
298 298
299static void tegra_apb_writel_direct(u32 value, unsigned long offset) 299static void tegra_apb_writel_direct(u32 value, unsigned long offset)
300{ 300{
301 writel(value, IO_TO_VIRT(offset)); 301 writel(value, IO_ADDRESS(offset));
302} 302}
303 303
304void tegra_apb_io_init(void) 304void tegra_apb_io_init(void)
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c
index f946d129423c..0b7db174a5de 100644
--- a/arch/arm/mach-tegra/fuse.c
+++ b/arch/arm/mach-tegra/fuse.c
@@ -93,9 +93,9 @@ void tegra_init_fuse(void)
93{ 93{
94 u32 id; 94 u32 id;
95 95
96 u32 reg = readl(IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48)); 96 u32 reg = readl(IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x48));
97 reg |= 1 << 28; 97 reg |= 1 << 28;
98 writel(reg, IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48)); 98 writel(reg, IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x48));
99 99
100 reg = tegra_fuse_readl(FUSE_SKU_INFO); 100 reg = tegra_fuse_readl(FUSE_SKU_INFO);
101 tegra_sku_id = reg & 0xFF; 101 tegra_sku_id = reg & 0xFF;