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authorThomas Gleixner <tglx@linutronix.de>2011-02-06 18:39:14 -0500
committerGreg Ungerer <gerg@uclinux.org>2011-03-15 07:01:52 -0400
commitf80c353ce8670b1ef336bc1dd74429763cbd7358 (patch)
tree63a9e97f89b6307553a11cc084ca7efaac17868f
parent0bc0f3aa1498e7ec0bb54f32b839e82319cb5fc1 (diff)
m68knommu: Convert coldfire intc-simr irq_chip to new
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
-rw-r--r--arch/m68knommu/platform/coldfire/intc-simr.c18
1 files changed, 12 insertions, 6 deletions
diff --git a/arch/m68knommu/platform/coldfire/intc-simr.c b/arch/m68knommu/platform/coldfire/intc-simr.c
index bb7048636140..69a3b679730b 100644
--- a/arch/m68knommu/platform/coldfire/intc-simr.c
+++ b/arch/m68knommu/platform/coldfire/intc-simr.c
@@ -20,8 +20,10 @@
20#include <asm/mcfsim.h> 20#include <asm/mcfsim.h>
21#include <asm/traps.h> 21#include <asm/traps.h>
22 22
23static void intc_irq_mask(unsigned int irq) 23static void intc_irq_mask(struct irq_data *d)
24{ 24{
25 unsigned int irq = d->irq;
26
25 if (irq >= MCFINT_VECBASE) { 27 if (irq >= MCFINT_VECBASE) {
26 if (irq < MCFINT_VECBASE + 64) 28 if (irq < MCFINT_VECBASE + 64)
27 __raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_SIMR); 29 __raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_SIMR);
@@ -30,8 +32,10 @@ static void intc_irq_mask(unsigned int irq)
30 } 32 }
31} 33}
32 34
33static void intc_irq_unmask(unsigned int irq) 35static void intc_irq_unmask(struct irq_data *d)
34{ 36{
37 unsigned int irq = d->irq;
38
35 if (irq >= MCFINT_VECBASE) { 39 if (irq >= MCFINT_VECBASE) {
36 if (irq < MCFINT_VECBASE + 64) 40 if (irq < MCFINT_VECBASE + 64)
37 __raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_CIMR); 41 __raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_CIMR);
@@ -40,8 +44,10 @@ static void intc_irq_unmask(unsigned int irq)
40 } 44 }
41} 45}
42 46
43static int intc_irq_set_type(unsigned int irq, unsigned int type) 47static int intc_irq_set_type(struct irq_data *d, unsigned int type)
44{ 48{
49 unsigned int irq = d->irq;
50
45 if (irq >= MCFINT_VECBASE) { 51 if (irq >= MCFINT_VECBASE) {
46 if (irq < MCFINT_VECBASE + 64) 52 if (irq < MCFINT_VECBASE + 64)
47 __raw_writeb(5, MCFINTC0_ICR0 + irq - MCFINT_VECBASE); 53 __raw_writeb(5, MCFINTC0_ICR0 + irq - MCFINT_VECBASE);
@@ -53,9 +59,9 @@ static int intc_irq_set_type(unsigned int irq, unsigned int type)
53 59
54static struct irq_chip intc_irq_chip = { 60static struct irq_chip intc_irq_chip = {
55 .name = "CF-INTC", 61 .name = "CF-INTC",
56 .mask = intc_irq_mask, 62 .irq_mask = intc_irq_mask,
57 .unmask = intc_irq_unmask, 63 .irq_unmask = intc_irq_unmask,
58 .set_type = intc_irq_set_type, 64 .irq_set_type = intc_irq_set_type,
59}; 65};
60 66
61void __init init_IRQ(void) 67void __init init_IRQ(void)