diff options
author | Rob Herring <rob.herring@calxeda.com> | 2012-01-09 16:39:19 -0500 |
---|---|---|
committer | Rob Herring <rob.herring@calxeda.com> | 2012-01-16 09:36:04 -0500 |
commit | f7597c02a2e6fada7a065b03efe283ae7ef0e0bc (patch) | |
tree | 56fef0a1d6c8c16840c5a3f1fe7171996f6605e6 | |
parent | 09f759f66b82bbfe21e165acf0e57e7725466312 (diff) |
ARM: exynos: remove incorrect BSYM usage
BSYM macro is only needed for assembly files and its usage in c files is
wrong, so remove it. The linker will correctly set bit 0 for Thumb2
kernels.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Dave Martin <dave.martin@linaro.org>
Cc: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r-- | arch/arm/mach-exynos/headsmp.S | 2 | ||||
-rw-r--r-- | arch/arm/mach-exynos/platsmp.c | 5 |
2 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mach-exynos/headsmp.S b/arch/arm/mach-exynos/headsmp.S index 3cdeb3647542..5364d4bfa8bc 100644 --- a/arch/arm/mach-exynos/headsmp.S +++ b/arch/arm/mach-exynos/headsmp.S | |||
@@ -36,6 +36,8 @@ pen: ldr r7, [r6] | |||
36 | * should now contain the SVC stack for this core | 36 | * should now contain the SVC stack for this core |
37 | */ | 37 | */ |
38 | b secondary_startup | 38 | b secondary_startup |
39 | ENDPROC(exynos4_secondary_startup) | ||
39 | 40 | ||
41 | .align 2 | ||
40 | 1: .long . | 42 | 1: .long . |
41 | .long pen_release | 43 | .long pen_release |
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 69ffb2fb3875..b89bfa5b6b71 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c | |||
@@ -24,7 +24,6 @@ | |||
24 | #include <asm/cacheflush.h> | 24 | #include <asm/cacheflush.h> |
25 | #include <asm/hardware/gic.h> | 25 | #include <asm/hardware/gic.h> |
26 | #include <asm/smp_scu.h> | 26 | #include <asm/smp_scu.h> |
27 | #include <asm/unified.h> | ||
28 | 27 | ||
29 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
30 | #include <mach/regs-clock.h> | 29 | #include <mach/regs-clock.h> |
@@ -163,7 +162,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) | |||
163 | while (time_before(jiffies, timeout)) { | 162 | while (time_before(jiffies, timeout)) { |
164 | smp_rmb(); | 163 | smp_rmb(); |
165 | 164 | ||
166 | __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), | 165 | __raw_writel(virt_to_phys(exynos4_secondary_startup), |
167 | CPU1_BOOT_REG); | 166 | CPU1_BOOT_REG); |
168 | gic_raise_softirq(cpumask_of(cpu), 1); | 167 | gic_raise_softirq(cpumask_of(cpu), 1); |
169 | 168 | ||
@@ -218,6 +217,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus) | |||
218 | * until it receives a soft interrupt, and then the | 217 | * until it receives a soft interrupt, and then the |
219 | * secondary CPU branches to this address. | 218 | * secondary CPU branches to this address. |
220 | */ | 219 | */ |
221 | __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), | 220 | __raw_writel(virt_to_phys(exynos4_secondary_startup), |
222 | CPU1_BOOT_REG); | 221 | CPU1_BOOT_REG); |
223 | } | 222 | } |