diff options
author | Chaoming_Li <chaoming_li@realsil.com.cn> | 2011-04-25 13:53:50 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2011-04-26 16:13:33 -0400 |
commit | f73b279cdb5fc850b4be355307905f2914b2c0bb (patch) | |
tree | c11b14ad16e1784cf428e8e5405afc210124dfe0 | |
parent | c07ccff326a2b3d81520e8c7a8e0f5e8cbc77416 (diff) |
rtlwifi: rtl8192ce: Change hw routine for addition of rtl8192se and rtl8192de
Change rtl8192ce hw routine for addition of RTL8192SE and RTL8192DE.
Signed-off-by: Chaoming_Li <chaoming_li@realsil.com.cn>
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/net/wireless/rtlwifi/rtl8192ce/def.h | 27 | ||||
-rw-r--r-- | drivers/net/wireless/rtlwifi/rtl8192ce/hw.c | 511 | ||||
-rw-r--r-- | drivers/net/wireless/rtlwifi/rtl8192ce/hw.h | 34 | ||||
-rw-r--r-- | drivers/net/wireless/rtlwifi/rtl8192ce/sw.c | 2 | ||||
-rw-r--r-- | drivers/net/wireless/rtlwifi/rtl8192cu/hw.c | 1 | ||||
-rw-r--r-- | drivers/net/wireless/rtlwifi/rtl8192cu/hw.h | 2 |
6 files changed, 362 insertions, 215 deletions
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/def.h b/drivers/net/wireless/rtlwifi/rtl8192ce/def.h index 2f577c8828fc..35ff7df41a1d 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192ce/def.h +++ b/drivers/net/wireless/rtlwifi/rtl8192ce/def.h | |||
@@ -121,19 +121,6 @@ | |||
121 | #define CHIP_92C 0x01 | 121 | #define CHIP_92C 0x01 |
122 | #define CHIP_88C 0x00 | 122 | #define CHIP_88C 0x00 |
123 | 123 | ||
124 | /* Add vendor information into chip version definition. | ||
125 | * Add UMC B-Cut and RTL8723 chip info definition. | ||
126 | * | ||
127 | * BIT 7 Reserved | ||
128 | * BIT 6 UMC BCut | ||
129 | * BIT 5 Manufacturer(TSMC/UMC) | ||
130 | * BIT 4 TEST/NORMAL | ||
131 | * BIT 3 8723 Version | ||
132 | * BIT 2 8723? | ||
133 | * BIT 1 1T2R? | ||
134 | * BIT 0 88C/92C | ||
135 | */ | ||
136 | |||
137 | enum version_8192c { | 124 | enum version_8192c { |
138 | VERSION_A_CHIP_92C = 0x01, | 125 | VERSION_A_CHIP_92C = 0x01, |
139 | VERSION_A_CHIP_88C = 0x00, | 126 | VERSION_A_CHIP_88C = 0x00, |
@@ -280,20 +267,6 @@ struct h2c_cmd_8192c { | |||
280 | u8 *p_cmdbuffer; | 267 | u8 *p_cmdbuffer; |
281 | }; | 268 | }; |
282 | 269 | ||
283 | static inline u8 _rtl92c_get_chnl_group(u8 chnl) | ||
284 | { | ||
285 | u8 group = 0; | ||
286 | |||
287 | if (chnl < 3) | ||
288 | group = 0; | ||
289 | else if (chnl < 9) | ||
290 | group = 1; | ||
291 | else | ||
292 | group = 2; | ||
293 | |||
294 | return group; | ||
295 | } | ||
296 | |||
297 | /* NOTE: reference to rtl8192c_rates struct */ | 270 | /* NOTE: reference to rtl8192c_rates struct */ |
298 | static inline int _rtl92c_rate_mapping(struct ieee80211_hw *hw, bool isHT, | 271 | static inline int _rtl92c_rate_mapping(struct ieee80211_hw *hw, bool isHT, |
299 | u8 desc_rate, bool first_ampdu) | 272 | u8 desc_rate, bool first_ampdu) |
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c b/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c index 05477f465a75..bb604b8ee519 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c +++ b/drivers/net/wireless/rtlwifi/rtl8192ce/hw.c | |||
@@ -30,12 +30,14 @@ | |||
30 | #include "../wifi.h" | 30 | #include "../wifi.h" |
31 | #include "../efuse.h" | 31 | #include "../efuse.h" |
32 | #include "../base.h" | 32 | #include "../base.h" |
33 | #include "../regd.h" | ||
33 | #include "../cam.h" | 34 | #include "../cam.h" |
34 | #include "../ps.h" | 35 | #include "../ps.h" |
35 | #include "../pci.h" | 36 | #include "../pci.h" |
36 | #include "reg.h" | 37 | #include "reg.h" |
37 | #include "def.h" | 38 | #include "def.h" |
38 | #include "phy.h" | 39 | #include "phy.h" |
40 | #include "../rtl8192c/fw_common.h" | ||
39 | #include "dm.h" | 41 | #include "dm.h" |
40 | #include "led.h" | 42 | #include "led.h" |
41 | #include "hw.h" | 43 | #include "hw.h" |
@@ -137,15 +139,6 @@ void rtl92ce_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
137 | 139 | ||
138 | break; | 140 | break; |
139 | } | 141 | } |
140 | case HW_VAR_MGT_FILTER: | ||
141 | *((u16 *) (val)) = rtl_read_word(rtlpriv, REG_RXFLTMAP0); | ||
142 | break; | ||
143 | case HW_VAR_CTRL_FILTER: | ||
144 | *((u16 *) (val)) = rtl_read_word(rtlpriv, REG_RXFLTMAP1); | ||
145 | break; | ||
146 | case HW_VAR_DATA_FILTER: | ||
147 | *((u16 *) (val)) = rtl_read_word(rtlpriv, REG_RXFLTMAP2); | ||
148 | break; | ||
149 | default: | 142 | default: |
150 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, | 143 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, |
151 | ("switch case not process\n")); | 144 | ("switch case not process\n")); |
@@ -156,6 +149,7 @@ void rtl92ce_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
156 | void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | 149 | void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) |
157 | { | 150 | { |
158 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 151 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
152 | struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); | ||
159 | struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); | 153 | struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); |
160 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | 154 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
161 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); | 155 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); |
@@ -178,7 +172,7 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
178 | rate_cfg |= 0x01; | 172 | rate_cfg |= 0x01; |
179 | rtl_write_byte(rtlpriv, REG_RRSR, rate_cfg & 0xff); | 173 | rtl_write_byte(rtlpriv, REG_RRSR, rate_cfg & 0xff); |
180 | rtl_write_byte(rtlpriv, REG_RRSR + 1, | 174 | rtl_write_byte(rtlpriv, REG_RRSR + 1, |
181 | (rate_cfg >> 8)&0xff); | 175 | (rate_cfg >> 8) & 0xff); |
182 | while (rate_cfg > 0x1) { | 176 | while (rate_cfg > 0x1) { |
183 | rate_cfg = (rate_cfg >> 1); | 177 | rate_cfg = (rate_cfg >> 1); |
184 | rate_index++; | 178 | rate_index++; |
@@ -276,13 +270,19 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
276 | break; | 270 | break; |
277 | } | 271 | } |
278 | case HW_VAR_AMPDU_FACTOR:{ | 272 | case HW_VAR_AMPDU_FACTOR:{ |
279 | u8 regtoset_normal[4] = { 0x41, 0xa8, 0x72, 0xb9 }; | 273 | u8 regtoset_normal[4] = {0x41, 0xa8, 0x72, 0xb9}; |
274 | u8 regtoset_bt[4] = {0x31, 0x74, 0x42, 0x97}; | ||
280 | 275 | ||
281 | u8 factor_toset; | 276 | u8 factor_toset; |
282 | u8 *p_regtoset = NULL; | 277 | u8 *p_regtoset = NULL; |
283 | u8 index = 0; | 278 | u8 index = 0; |
284 | 279 | ||
285 | p_regtoset = regtoset_normal; | 280 | if ((rtlpcipriv->bt_coexist.bt_coexistence) && |
281 | (rtlpcipriv->bt_coexist.bt_coexist_type == | ||
282 | BT_CSR_BC4)) | ||
283 | p_regtoset = regtoset_bt; | ||
284 | else | ||
285 | p_regtoset = regtoset_normal; | ||
286 | 286 | ||
287 | factor_toset = *((u8 *) val); | 287 | factor_toset = *((u8 *) val); |
288 | if (factor_toset <= 3) { | 288 | if (factor_toset <= 3) { |
@@ -317,45 +317,7 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
317 | } | 317 | } |
318 | case HW_VAR_AC_PARAM:{ | 318 | case HW_VAR_AC_PARAM:{ |
319 | u8 e_aci = *((u8 *) val); | 319 | u8 e_aci = *((u8 *) val); |
320 | u32 u4b_ac_param; | 320 | rtl92c_dm_init_edca_turbo(hw); |
321 | u16 cw_min = le16_to_cpu(mac->ac[e_aci].cw_min); | ||
322 | u16 cw_max = le16_to_cpu(mac->ac[e_aci].cw_max); | ||
323 | u16 tx_op = le16_to_cpu(mac->ac[e_aci].tx_op); | ||
324 | |||
325 | u4b_ac_param = (u32) mac->ac[e_aci].aifs; | ||
326 | u4b_ac_param |= ((u32)cw_min | ||
327 | & 0xF) << AC_PARAM_ECW_MIN_OFFSET; | ||
328 | u4b_ac_param |= ((u32)cw_max & | ||
329 | 0xF) << AC_PARAM_ECW_MAX_OFFSET; | ||
330 | u4b_ac_param |= (u32)tx_op << AC_PARAM_TXOP_OFFSET; | ||
331 | |||
332 | RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, | ||
333 | ("queue:%x, ac_param:%x\n", e_aci, | ||
334 | u4b_ac_param)); | ||
335 | |||
336 | switch (e_aci) { | ||
337 | case AC1_BK: | ||
338 | rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, | ||
339 | u4b_ac_param); | ||
340 | break; | ||
341 | case AC0_BE: | ||
342 | rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, | ||
343 | u4b_ac_param); | ||
344 | break; | ||
345 | case AC2_VI: | ||
346 | rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, | ||
347 | u4b_ac_param); | ||
348 | break; | ||
349 | case AC3_VO: | ||
350 | rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, | ||
351 | u4b_ac_param); | ||
352 | break; | ||
353 | default: | ||
354 | RT_ASSERT(false, | ||
355 | ("SetHwReg8185(): invalid aci: %d !\n", | ||
356 | e_aci)); | ||
357 | break; | ||
358 | } | ||
359 | 321 | ||
360 | if (rtlpci->acm_method != eAcmWay2_SW) | 322 | if (rtlpci->acm_method != eAcmWay2_SW) |
361 | rtlpriv->cfg->ops->set_hw_reg(hw, | 323 | rtlpriv->cfg->ops->set_hw_reg(hw, |
@@ -526,9 +488,6 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
526 | case HW_VAR_CORRECT_TSF:{ | 488 | case HW_VAR_CORRECT_TSF:{ |
527 | u8 btype_ibss = ((u8 *) (val))[0]; | 489 | u8 btype_ibss = ((u8 *) (val))[0]; |
528 | 490 | ||
529 | /*btype_ibss = (mac->opmode == NL80211_IFTYPE_ADHOC) ? | ||
530 | 1 : 0;*/ | ||
531 | |||
532 | if (btype_ibss == true) | 491 | if (btype_ibss == true) |
533 | _rtl92ce_stop_tx_beacon(hw); | 492 | _rtl92ce_stop_tx_beacon(hw); |
534 | 493 | ||
@@ -537,7 +496,7 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
537 | rtl_write_dword(rtlpriv, REG_TSFTR, | 496 | rtl_write_dword(rtlpriv, REG_TSFTR, |
538 | (u32) (mac->tsf & 0xffffffff)); | 497 | (u32) (mac->tsf & 0xffffffff)); |
539 | rtl_write_dword(rtlpriv, REG_TSFTR + 4, | 498 | rtl_write_dword(rtlpriv, REG_TSFTR + 4, |
540 | (u32) ((mac->tsf >> 32)&0xffffffff)); | 499 | (u32) ((mac->tsf >> 32) & 0xffffffff)); |
541 | 500 | ||
542 | _rtl92ce_set_bcn_ctrl_reg(hw, BIT(3), 0); | 501 | _rtl92ce_set_bcn_ctrl_reg(hw, BIT(3), 0); |
543 | 502 | ||
@@ -547,15 +506,6 @@ void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val) | |||
547 | break; | 506 | break; |
548 | 507 | ||
549 | } | 508 | } |
550 | case HW_VAR_MGT_FILTER: | ||
551 | rtl_write_word(rtlpriv, REG_RXFLTMAP0, *(u16 *) val); | ||
552 | break; | ||
553 | case HW_VAR_CTRL_FILTER: | ||
554 | rtl_write_word(rtlpriv, REG_RXFLTMAP1, *(u16 *) val); | ||
555 | break; | ||
556 | case HW_VAR_DATA_FILTER: | ||
557 | rtl_write_word(rtlpriv, REG_RXFLTMAP2, *(u16 *) val); | ||
558 | break; | ||
559 | default: | 509 | default: |
560 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("switch case " | 510 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("switch case " |
561 | "not process\n")); | 511 | "not process\n")); |
@@ -679,12 +629,12 @@ static void _rtl92ce_gen_refresh_led_state(struct ieee80211_hw *hw) | |||
679 | rtl92ce_sw_led_on(hw, pLed0); | 629 | rtl92ce_sw_led_on(hw, pLed0); |
680 | else | 630 | else |
681 | rtl92ce_sw_led_off(hw, pLed0); | 631 | rtl92ce_sw_led_off(hw, pLed0); |
682 | |||
683 | } | 632 | } |
684 | 633 | ||
685 | static bool _rtl92ce_init_mac(struct ieee80211_hw *hw) | 634 | static bool _rtl92ce_init_mac(struct ieee80211_hw *hw) |
686 | { | 635 | { |
687 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 636 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
637 | struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); | ||
688 | struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); | 638 | struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); |
689 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); | 639 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); |
690 | 640 | ||
@@ -693,9 +643,22 @@ static bool _rtl92ce_init_mac(struct ieee80211_hw *hw) | |||
693 | u16 retry; | 643 | u16 retry; |
694 | 644 | ||
695 | rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x00); | 645 | rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x00); |
646 | if (rtlpcipriv->bt_coexist.bt_coexistence) { | ||
647 | u32 value32; | ||
648 | value32 = rtl_read_dword(rtlpriv, REG_APS_FSMCO); | ||
649 | value32 |= (SOP_ABG | SOP_AMB | XOP_BTCK); | ||
650 | rtl_write_dword(rtlpriv, REG_APS_FSMCO, value32); | ||
651 | } | ||
696 | rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x2b); | 652 | rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x2b); |
697 | rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL, 0x0F); | 653 | rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL, 0x0F); |
698 | 654 | ||
655 | if (rtlpcipriv->bt_coexist.bt_coexistence) { | ||
656 | u32 u4b_tmp = rtl_read_dword(rtlpriv, REG_AFE_XTAL_CTRL); | ||
657 | |||
658 | u4b_tmp &= (~0x00024800); | ||
659 | rtl_write_dword(rtlpriv, REG_AFE_XTAL_CTRL, u4b_tmp); | ||
660 | } | ||
661 | |||
699 | bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1) | BIT(0); | 662 | bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1) | BIT(0); |
700 | udelay(2); | 663 | udelay(2); |
701 | 664 | ||
@@ -726,6 +689,11 @@ static bool _rtl92ce_init_mac(struct ieee80211_hw *hw) | |||
726 | rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL + 1, 0x82); | 689 | rtl_write_byte(rtlpriv, REG_SYS_ISO_CTRL + 1, 0x82); |
727 | udelay(2); | 690 | udelay(2); |
728 | 691 | ||
692 | if (rtlpcipriv->bt_coexist.bt_coexistence) { | ||
693 | bytetmp = rtl_read_byte(rtlpriv, REG_AFE_XTAL_CTRL+2) & 0xfd; | ||
694 | rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL+2, bytetmp); | ||
695 | } | ||
696 | |||
729 | rtl_write_word(rtlpriv, REG_CR, 0x2ff); | 697 | rtl_write_word(rtlpriv, REG_CR, 0x2ff); |
730 | 698 | ||
731 | if (_rtl92ce_llt_table_init(hw) == false) | 699 | if (_rtl92ce_llt_table_init(hw) == false) |
@@ -793,6 +761,7 @@ static void _rtl92ce_hw_configure(struct ieee80211_hw *hw) | |||
793 | { | 761 | { |
794 | struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); | 762 | struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); |
795 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 763 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
764 | struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); | ||
796 | u8 reg_bw_opmode; | 765 | u8 reg_bw_opmode; |
797 | u32 reg_ratr, reg_prsr; | 766 | u32 reg_ratr, reg_prsr; |
798 | 767 | ||
@@ -824,7 +793,11 @@ static void _rtl92ce_hw_configure(struct ieee80211_hw *hw) | |||
824 | rtl_write_dword(rtlpriv, REG_RARFRC, 0x01000000); | 793 | rtl_write_dword(rtlpriv, REG_RARFRC, 0x01000000); |
825 | rtl_write_dword(rtlpriv, REG_RARFRC + 4, 0x07060504); | 794 | rtl_write_dword(rtlpriv, REG_RARFRC + 4, 0x07060504); |
826 | 795 | ||
827 | rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0xb972a841); | 796 | if ((rtlpcipriv->bt_coexist.bt_coexistence) && |
797 | (rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4)) | ||
798 | rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0x97427431); | ||
799 | else | ||
800 | rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0xb972a841); | ||
828 | 801 | ||
829 | rtl_write_byte(rtlpriv, REG_ATIMWND, 0x2); | 802 | rtl_write_byte(rtlpriv, REG_ATIMWND, 0x2); |
830 | 803 | ||
@@ -840,11 +813,20 @@ static void _rtl92ce_hw_configure(struct ieee80211_hw *hw) | |||
840 | rtl_write_byte(rtlpriv, REG_PIFS, 0x1C); | 813 | rtl_write_byte(rtlpriv, REG_PIFS, 0x1C); |
841 | rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16); | 814 | rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16); |
842 | 815 | ||
843 | rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020); | 816 | if ((rtlpcipriv->bt_coexist.bt_coexistence) && |
844 | 817 | (rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4)) { | |
845 | rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020); | 818 | rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020); |
819 | rtl_write_word(rtlpriv, REG_PROT_MODE_CTRL, 0x0402); | ||
820 | } else { | ||
821 | rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020); | ||
822 | rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0020); | ||
823 | } | ||
846 | 824 | ||
847 | rtl_write_dword(rtlpriv, REG_FAST_EDCA_CTRL, 0x086666); | 825 | if ((rtlpcipriv->bt_coexist.bt_coexistence) && |
826 | (rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4)) | ||
827 | rtl_write_dword(rtlpriv, REG_FAST_EDCA_CTRL, 0x03086666); | ||
828 | else | ||
829 | rtl_write_dword(rtlpriv, REG_FAST_EDCA_CTRL, 0x086666); | ||
848 | 830 | ||
849 | rtl_write_byte(rtlpriv, REG_ACKTO, 0x40); | 831 | rtl_write_byte(rtlpriv, REG_ACKTO, 0x40); |
850 | 832 | ||
@@ -948,8 +930,10 @@ int rtl92ce_hw_init(struct ieee80211_hw *hw) | |||
948 | } | 930 | } |
949 | 931 | ||
950 | rtlhal->last_hmeboxnum = 0; | 932 | rtlhal->last_hmeboxnum = 0; |
951 | rtl92ce_phy_mac_config(hw); | 933 | #if 0 /* temporary */ |
952 | rtl92ce_phy_bb_config(hw); | 934 | rtl92c_phy_mac_config(hw); |
935 | rtl92c_phy_bb_config(hw); | ||
936 | #endif | ||
953 | rtlphy->rf_mode = RF_OP_BY_SW_3WIRE; | 937 | rtlphy->rf_mode = RF_OP_BY_SW_3WIRE; |
954 | rtl92c_phy_rf_config(hw); | 938 | rtl92c_phy_rf_config(hw); |
955 | rtlphy->rfreg_chnlval[0] = rtl_get_rfreg(hw, (enum radio_path)0, | 939 | rtlphy->rfreg_chnlval[0] = rtl_get_rfreg(hw, (enum radio_path)0, |
@@ -962,15 +946,20 @@ int rtl92ce_hw_init(struct ieee80211_hw *hw) | |||
962 | _rtl92ce_hw_configure(hw); | 946 | _rtl92ce_hw_configure(hw); |
963 | rtl_cam_reset_all_entry(hw); | 947 | rtl_cam_reset_all_entry(hw); |
964 | rtl92ce_enable_hw_security_config(hw); | 948 | rtl92ce_enable_hw_security_config(hw); |
949 | |||
965 | ppsc->rfpwr_state = ERFON; | 950 | ppsc->rfpwr_state = ERFON; |
951 | |||
966 | rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ETHER_ADDR, mac->mac_addr); | 952 | rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ETHER_ADDR, mac->mac_addr); |
967 | _rtl92ce_enable_aspm_back_door(hw); | 953 | _rtl92ce_enable_aspm_back_door(hw); |
968 | rtlpriv->intf_ops->enable_aspm(hw); | 954 | rtlpriv->intf_ops->enable_aspm(hw); |
955 | |||
956 | rtl8192ce_bt_hw_init(hw); | ||
957 | |||
969 | if (ppsc->rfpwr_state == ERFON) { | 958 | if (ppsc->rfpwr_state == ERFON) { |
970 | rtl92c_phy_set_rfpath_switch(hw, 1); | 959 | rtl92c_phy_set_rfpath_switch(hw, 1); |
971 | if (iqk_initialized) | 960 | if (iqk_initialized) { |
972 | rtl92c_phy_iq_calibrate(hw, true); | 961 | rtl92c_phy_iq_calibrate(hw, true); |
973 | else { | 962 | } else { |
974 | rtl92c_phy_iq_calibrate(hw, false); | 963 | rtl92c_phy_iq_calibrate(hw, false); |
975 | iqk_initialized = true; | 964 | iqk_initialized = true; |
976 | } | 965 | } |
@@ -1128,75 +1117,62 @@ static int _rtl92ce_set_media_status(struct ieee80211_hw *hw, | |||
1128 | return 0; | 1117 | return 0; |
1129 | } | 1118 | } |
1130 | 1119 | ||
1131 | static void _rtl92ce_set_check_bssid(struct ieee80211_hw *hw, | 1120 | void rtl92ce_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid) |
1132 | enum nl80211_iftype type) | ||
1133 | { | 1121 | { |
1134 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 1122 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
1135 | u32 reg_rcr = rtl_read_dword(rtlpriv, REG_RCR); | 1123 | u32 reg_rcr = rtl_read_dword(rtlpriv, REG_RCR); |
1136 | u8 filterout_non_associated_bssid = false; | ||
1137 | 1124 | ||
1138 | switch (type) { | 1125 | if (rtlpriv->psc.rfpwr_state != ERFON) |
1139 | case NL80211_IFTYPE_ADHOC: | 1126 | return; |
1140 | case NL80211_IFTYPE_STATION: | ||
1141 | filterout_non_associated_bssid = true; | ||
1142 | break; | ||
1143 | case NL80211_IFTYPE_UNSPECIFIED: | ||
1144 | case NL80211_IFTYPE_AP: | ||
1145 | default: | ||
1146 | break; | ||
1147 | } | ||
1148 | 1127 | ||
1149 | if (filterout_non_associated_bssid == true) { | 1128 | if (check_bssid == true) { |
1150 | reg_rcr |= (RCR_CBSSID_DATA | RCR_CBSSID_BCN); | 1129 | reg_rcr |= (RCR_CBSSID_DATA | RCR_CBSSID_BCN); |
1151 | rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, | 1130 | rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, |
1152 | (u8 *) (®_rcr)); | 1131 | (u8 *) (®_rcr)); |
1153 | _rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(4)); | 1132 | _rtl92ce_set_bcn_ctrl_reg(hw, 0, BIT(4)); |
1154 | } else if (filterout_non_associated_bssid == false) { | 1133 | } else if (check_bssid == false) { |
1155 | reg_rcr &= (~(RCR_CBSSID_DATA | RCR_CBSSID_BCN)); | 1134 | reg_rcr &= (~(RCR_CBSSID_DATA | RCR_CBSSID_BCN)); |
1156 | _rtl92ce_set_bcn_ctrl_reg(hw, BIT(4), 0); | 1135 | _rtl92ce_set_bcn_ctrl_reg(hw, BIT(4), 0); |
1157 | rtlpriv->cfg->ops->set_hw_reg(hw, | 1136 | rtlpriv->cfg->ops->set_hw_reg(hw, |
1158 | HW_VAR_RCR, (u8 *) (®_rcr)); | 1137 | HW_VAR_RCR, (u8 *) (®_rcr)); |
1159 | } | 1138 | } |
1139 | |||
1160 | } | 1140 | } |
1161 | 1141 | ||
1162 | int rtl92ce_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type) | 1142 | int rtl92ce_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type) |
1163 | { | 1143 | { |
1144 | struct rtl_priv *rtlpriv = rtl_priv(hw); | ||
1145 | |||
1164 | if (_rtl92ce_set_media_status(hw, type)) | 1146 | if (_rtl92ce_set_media_status(hw, type)) |
1165 | return -EOPNOTSUPP; | 1147 | return -EOPNOTSUPP; |
1166 | _rtl92ce_set_check_bssid(hw, type); | 1148 | |
1149 | if (rtlpriv->mac80211.link_state == MAC80211_LINKED) { | ||
1150 | if (type != NL80211_IFTYPE_AP) | ||
1151 | rtl92ce_set_check_bssid(hw, true); | ||
1152 | } else { | ||
1153 | rtl92ce_set_check_bssid(hw, false); | ||
1154 | } | ||
1155 | |||
1167 | return 0; | 1156 | return 0; |
1168 | } | 1157 | } |
1169 | 1158 | ||
1159 | /* don't set REG_EDCA_BE_PARAM here because mac80211 will send pkt when scan */ | ||
1170 | void rtl92ce_set_qos(struct ieee80211_hw *hw, int aci) | 1160 | void rtl92ce_set_qos(struct ieee80211_hw *hw, int aci) |
1171 | { | 1161 | { |
1172 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 1162 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
1173 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | ||
1174 | u32 u4b_ac_param; | ||
1175 | u16 cw_min = le16_to_cpu(mac->ac[aci].cw_min); | ||
1176 | u16 cw_max = le16_to_cpu(mac->ac[aci].cw_max); | ||
1177 | u16 tx_op = le16_to_cpu(mac->ac[aci].tx_op); | ||
1178 | |||
1179 | rtl92c_dm_init_edca_turbo(hw); | 1163 | rtl92c_dm_init_edca_turbo(hw); |
1180 | u4b_ac_param = (u32) mac->ac[aci].aifs; | ||
1181 | u4b_ac_param |= (u32) ((cw_min & 0xF) << AC_PARAM_ECW_MIN_OFFSET); | ||
1182 | u4b_ac_param |= (u32) ((cw_max & 0xF) << AC_PARAM_ECW_MAX_OFFSET); | ||
1183 | u4b_ac_param |= (u32) (tx_op << AC_PARAM_TXOP_OFFSET); | ||
1184 | RT_TRACE(rtlpriv, COMP_QOS, DBG_DMESG, | ||
1185 | ("queue:%x, ac_param:%x aifs:%x cwmin:%x cwmax:%x txop:%x\n", | ||
1186 | aci, u4b_ac_param, mac->ac[aci].aifs, cw_min, | ||
1187 | cw_max, tx_op)); | ||
1188 | switch (aci) { | 1164 | switch (aci) { |
1189 | case AC1_BK: | 1165 | case AC1_BK: |
1190 | rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, u4b_ac_param); | 1166 | rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0xa44f); |
1191 | break; | 1167 | break; |
1192 | case AC0_BE: | 1168 | case AC0_BE: |
1193 | rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, u4b_ac_param); | 1169 | /* rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, u4b_ac_param); */ |
1194 | break; | 1170 | break; |
1195 | case AC2_VI: | 1171 | case AC2_VI: |
1196 | rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, u4b_ac_param); | 1172 | rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, 0x5e4322); |
1197 | break; | 1173 | break; |
1198 | case AC3_VO: | 1174 | case AC3_VO: |
1199 | rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, u4b_ac_param); | 1175 | rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x2f3222); |
1200 | break; | 1176 | break; |
1201 | default: | 1177 | default: |
1202 | RT_ASSERT(false, ("invalid aci: %d !\n", aci)); | 1178 | RT_ASSERT(false, ("invalid aci: %d !\n", aci)); |
@@ -1227,8 +1203,10 @@ void rtl92ce_disable_interrupt(struct ieee80211_hw *hw) | |||
1227 | static void _rtl92ce_poweroff_adapter(struct ieee80211_hw *hw) | 1203 | static void _rtl92ce_poweroff_adapter(struct ieee80211_hw *hw) |
1228 | { | 1204 | { |
1229 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 1205 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
1206 | struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); | ||
1230 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); | 1207 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); |
1231 | u8 u1b_tmp; | 1208 | u8 u1b_tmp; |
1209 | u32 u4b_tmp; | ||
1232 | 1210 | ||
1233 | rtlpriv->intf_ops->enable_aspm(hw); | 1211 | rtlpriv->intf_ops->enable_aspm(hw); |
1234 | rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); | 1212 | rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); |
@@ -1243,13 +1221,27 @@ static void _rtl92ce_poweroff_adapter(struct ieee80211_hw *hw) | |||
1243 | rtl_write_byte(rtlpriv, REG_MCUFWDL, 0x00); | 1221 | rtl_write_byte(rtlpriv, REG_MCUFWDL, 0x00); |
1244 | rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00000000); | 1222 | rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00000000); |
1245 | u1b_tmp = rtl_read_byte(rtlpriv, REG_GPIO_PIN_CTRL); | 1223 | u1b_tmp = rtl_read_byte(rtlpriv, REG_GPIO_PIN_CTRL); |
1246 | rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00FF0000 | | 1224 | if ((rtlpcipriv->bt_coexist.bt_coexistence) && |
1247 | (u1b_tmp << 8)); | 1225 | ((rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4) || |
1226 | (rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC8))) { | ||
1227 | rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00F30000 | | ||
1228 | (u1b_tmp << 8)); | ||
1229 | } else { | ||
1230 | rtl_write_dword(rtlpriv, REG_GPIO_PIN_CTRL, 0x00FF0000 | | ||
1231 | (u1b_tmp << 8)); | ||
1232 | } | ||
1248 | rtl_write_word(rtlpriv, REG_GPIO_IO_SEL, 0x0790); | 1233 | rtl_write_word(rtlpriv, REG_GPIO_IO_SEL, 0x0790); |
1249 | rtl_write_word(rtlpriv, REG_LEDCFG0, 0x8080); | 1234 | rtl_write_word(rtlpriv, REG_LEDCFG0, 0x8080); |
1250 | rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, 0x80); | 1235 | rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, 0x80); |
1251 | rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x23); | 1236 | rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x23); |
1252 | rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL, 0x0e); | 1237 | if (rtlpcipriv->bt_coexist.bt_coexistence) { |
1238 | u4b_tmp = rtl_read_dword(rtlpriv, REG_AFE_XTAL_CTRL); | ||
1239 | u4b_tmp |= 0x03824800; | ||
1240 | rtl_write_dword(rtlpriv, REG_AFE_XTAL_CTRL, u4b_tmp); | ||
1241 | } else { | ||
1242 | rtl_write_dword(rtlpriv, REG_AFE_XTAL_CTRL, 0x0e); | ||
1243 | } | ||
1244 | |||
1253 | rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0e); | 1245 | rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x0e); |
1254 | rtl_write_byte(rtlpriv, REG_APS_FSMCO + 1, 0x10); | 1246 | rtl_write_byte(rtlpriv, REG_APS_FSMCO + 1, 0x10); |
1255 | } | 1247 | } |
@@ -1327,6 +1319,7 @@ void rtl92ce_update_interrupt_mask(struct ieee80211_hw *hw, | |||
1327 | 1319 | ||
1328 | RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD, | 1320 | RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD, |
1329 | ("add_msr:%x, rm_msr:%x\n", add_msr, rm_msr)); | 1321 | ("add_msr:%x, rm_msr:%x\n", add_msr, rm_msr)); |
1322 | |||
1330 | if (add_msr) | 1323 | if (add_msr) |
1331 | rtlpci->irq_mask[0] |= add_msr; | 1324 | rtlpci->irq_mask[0] |= add_msr; |
1332 | if (rm_msr) | 1325 | if (rm_msr) |
@@ -1582,7 +1575,7 @@ static void _rtl92ce_read_adapter_info(struct ieee80211_hw *hw) | |||
1582 | ("RTL819X Not boot from eeprom, check it !!")); | 1575 | ("RTL819X Not boot from eeprom, check it !!")); |
1583 | } | 1576 | } |
1584 | 1577 | ||
1585 | RT_PRINT_DATA(rtlpriv, COMP_INIT, DBG_LOUD, ("MAP\n"), | 1578 | RT_PRINT_DATA(rtlpriv, COMP_INIT, DBG_DMESG, ("MAP\n"), |
1586 | hwinfo, HWSET_MAX_SIZE); | 1579 | hwinfo, HWSET_MAX_SIZE); |
1587 | 1580 | ||
1588 | eeprom_id = *((u16 *)&hwinfo[0]); | 1581 | eeprom_id = *((u16 *)&hwinfo[0]); |
@@ -1610,6 +1603,10 @@ static void _rtl92ce_read_adapter_info(struct ieee80211_hw *hw) | |||
1610 | rtlefuse->autoload_failflag, | 1603 | rtlefuse->autoload_failflag, |
1611 | hwinfo); | 1604 | hwinfo); |
1612 | 1605 | ||
1606 | rtl8192ce_read_bt_coexist_info_from_hwpg(hw, | ||
1607 | rtlefuse->autoload_failflag, | ||
1608 | hwinfo); | ||
1609 | |||
1613 | rtlefuse->eeprom_channelplan = *(u8 *)&hwinfo[EEPROM_CHANNELPLAN]; | 1610 | rtlefuse->eeprom_channelplan = *(u8 *)&hwinfo[EEPROM_CHANNELPLAN]; |
1614 | rtlefuse->eeprom_version = *(u16 *)&hwinfo[EEPROM_VERSION]; | 1611 | rtlefuse->eeprom_version = *(u16 *)&hwinfo[EEPROM_VERSION]; |
1615 | rtlefuse->txpwr_fromeprom = true; | 1612 | rtlefuse->txpwr_fromeprom = true; |
@@ -1618,6 +1615,9 @@ static void _rtl92ce_read_adapter_info(struct ieee80211_hw *hw) | |||
1618 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 1615 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, |
1619 | ("EEPROM Customer ID: 0x%2x\n", rtlefuse->eeprom_oemid)); | 1616 | ("EEPROM Customer ID: 0x%2x\n", rtlefuse->eeprom_oemid)); |
1620 | 1617 | ||
1618 | /* set channel paln to world wide 13 */ | ||
1619 | rtlefuse->channel_plan = COUNTRY_CODE_WORLD_WIDE_13; | ||
1620 | |||
1621 | if (rtlhal->oem_id == RT_CID_DEFAULT) { | 1621 | if (rtlhal->oem_id == RT_CID_DEFAULT) { |
1622 | switch (rtlefuse->eeprom_oemid) { | 1622 | switch (rtlefuse->eeprom_oemid) { |
1623 | case EEPROM_CID_DEFAULT: | 1623 | case EEPROM_CID_DEFAULT: |
@@ -1701,30 +1701,36 @@ void rtl92ce_read_eeprom_info(struct ieee80211_hw *hw) | |||
1701 | } else { | 1701 | } else { |
1702 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("Autoload ERR!!\n")); | 1702 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, ("Autoload ERR!!\n")); |
1703 | } | 1703 | } |
1704 | |||
1705 | _rtl92ce_hal_customized_behavior(hw); | 1704 | _rtl92ce_hal_customized_behavior(hw); |
1706 | } | 1705 | } |
1707 | 1706 | ||
1708 | void rtl92ce_update_hal_rate_table(struct ieee80211_hw *hw) | 1707 | static void rtl92ce_update_hal_rate_table(struct ieee80211_hw *hw, |
1708 | struct ieee80211_sta *sta) | ||
1709 | { | 1709 | { |
1710 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 1710 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
1711 | struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); | ||
1711 | struct rtl_phy *rtlphy = &(rtlpriv->phy); | 1712 | struct rtl_phy *rtlphy = &(rtlpriv->phy); |
1712 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | 1713 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
1713 | 1714 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); | |
1714 | u32 ratr_value = (u32) mac->basic_rates; | 1715 | u32 ratr_value; |
1715 | u8 *mcsrate = mac->mcs; | ||
1716 | u8 ratr_index = 0; | 1716 | u8 ratr_index = 0; |
1717 | u8 nmode = mac->ht_enable; | 1717 | u8 nmode = mac->ht_enable; |
1718 | u8 mimo_ps = 1; | 1718 | u8 mimo_ps = IEEE80211_SMPS_OFF; |
1719 | u16 shortgi_rate; | 1719 | u16 shortgi_rate; |
1720 | u32 tmp_ratr_value; | 1720 | u32 tmp_ratr_value; |
1721 | u8 curtxbw_40mhz = mac->bw_40; | 1721 | u8 curtxbw_40mhz = mac->bw_40; |
1722 | u8 curshortgi_40mhz = mac->sgi_40; | 1722 | u8 curshortgi_40mhz = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) ? |
1723 | u8 curshortgi_20mhz = mac->sgi_20; | 1723 | 1 : 0; |
1724 | u8 curshortgi_20mhz = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20) ? | ||
1725 | 1 : 0; | ||
1724 | enum wireless_mode wirelessmode = mac->mode; | 1726 | enum wireless_mode wirelessmode = mac->mode; |
1725 | 1727 | ||
1726 | ratr_value |= ((*(u16 *) (mcsrate))) << 12; | 1728 | if (rtlhal->current_bandtype == BAND_ON_5G) |
1727 | 1729 | ratr_value = sta->supp_rates[1] << 4; | |
1730 | else | ||
1731 | ratr_value = sta->supp_rates[0]; | ||
1732 | ratr_value |= (sta->ht_cap.mcs.rx_mask[1] << 20 | | ||
1733 | sta->ht_cap.mcs.rx_mask[0] << 12); | ||
1728 | switch (wirelessmode) { | 1734 | switch (wirelessmode) { |
1729 | case WIRELESS_MODE_B: | 1735 | case WIRELESS_MODE_B: |
1730 | if (ratr_value & 0x0000000c) | 1736 | if (ratr_value & 0x0000000c) |
@@ -1738,7 +1744,7 @@ void rtl92ce_update_hal_rate_table(struct ieee80211_hw *hw) | |||
1738 | case WIRELESS_MODE_N_24G: | 1744 | case WIRELESS_MODE_N_24G: |
1739 | case WIRELESS_MODE_N_5G: | 1745 | case WIRELESS_MODE_N_5G: |
1740 | nmode = 1; | 1746 | nmode = 1; |
1741 | if (mimo_ps == 0) { | 1747 | if (mimo_ps == IEEE80211_SMPS_STATIC) { |
1742 | ratr_value &= 0x0007F005; | 1748 | ratr_value &= 0x0007F005; |
1743 | } else { | 1749 | } else { |
1744 | u32 ratr_mask; | 1750 | u32 ratr_mask; |
@@ -1761,10 +1767,19 @@ void rtl92ce_update_hal_rate_table(struct ieee80211_hw *hw) | |||
1761 | break; | 1767 | break; |
1762 | } | 1768 | } |
1763 | 1769 | ||
1764 | ratr_value &= 0x0FFFFFFF; | 1770 | if ((rtlpcipriv->bt_coexist.bt_coexistence) && |
1771 | (rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4) && | ||
1772 | (rtlpcipriv->bt_coexist.bt_cur_state) && | ||
1773 | (rtlpcipriv->bt_coexist.bt_ant_isolation) && | ||
1774 | ((rtlpcipriv->bt_coexist.bt_service == BT_SCO) || | ||
1775 | (rtlpcipriv->bt_coexist.bt_service == BT_BUSY))) | ||
1776 | ratr_value &= 0x0fffcfc0; | ||
1777 | else | ||
1778 | ratr_value &= 0x0FFFFFFF; | ||
1765 | 1779 | ||
1766 | if (nmode && ((curtxbw_40mhz && curshortgi_40mhz) || (!curtxbw_40mhz && | 1780 | if (nmode && ((curtxbw_40mhz && |
1767 | curshortgi_20mhz))) { | 1781 | curshortgi_40mhz) || (!curtxbw_40mhz && |
1782 | curshortgi_20mhz))) { | ||
1768 | 1783 | ||
1769 | ratr_value |= 0x10000000; | 1784 | ratr_value |= 0x10000000; |
1770 | tmp_ratr_value = (ratr_value >> 12); | 1785 | tmp_ratr_value = (ratr_value >> 12); |
@@ -1784,24 +1799,42 @@ void rtl92ce_update_hal_rate_table(struct ieee80211_hw *hw) | |||
1784 | ("%x\n", rtl_read_dword(rtlpriv, REG_ARFR0))); | 1799 | ("%x\n", rtl_read_dword(rtlpriv, REG_ARFR0))); |
1785 | } | 1800 | } |
1786 | 1801 | ||
1787 | void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level) | 1802 | static void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw, |
1803 | struct ieee80211_sta *sta, u8 rssi_level) | ||
1788 | { | 1804 | { |
1789 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 1805 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
1790 | struct rtl_phy *rtlphy = &(rtlpriv->phy); | 1806 | struct rtl_phy *rtlphy = &(rtlpriv->phy); |
1791 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | 1807 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); |
1792 | u32 ratr_bitmap = (u32) mac->basic_rates; | 1808 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); |
1793 | u8 *p_mcsrate = mac->mcs; | 1809 | struct rtl_sta_info *sta_entry = NULL; |
1810 | u32 ratr_bitmap; | ||
1794 | u8 ratr_index; | 1811 | u8 ratr_index; |
1795 | u8 curtxbw_40mhz = mac->bw_40; | 1812 | u8 curtxbw_40mhz = (sta->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40) |
1796 | u8 curshortgi_40mhz = mac->sgi_40; | 1813 | ? 1 : 0; |
1797 | u8 curshortgi_20mhz = mac->sgi_20; | 1814 | u8 curshortgi_40mhz = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) ? |
1798 | enum wireless_mode wirelessmode = mac->mode; | 1815 | 1 : 0; |
1816 | u8 curshortgi_20mhz = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20) ? | ||
1817 | 1 : 0; | ||
1818 | enum wireless_mode wirelessmode = 0; | ||
1799 | bool shortgi = false; | 1819 | bool shortgi = false; |
1800 | u8 rate_mask[5]; | 1820 | u8 rate_mask[5]; |
1801 | u8 macid = 0; | 1821 | u8 macid = 0; |
1802 | u8 mimops = 1; | 1822 | u8 mimo_ps = IEEE80211_SMPS_OFF; |
1803 | 1823 | ||
1804 | ratr_bitmap |= (p_mcsrate[1] << 20) | (p_mcsrate[0] << 12); | 1824 | sta_entry = (struct rtl_sta_info *) sta->drv_priv; |
1825 | wirelessmode = sta_entry->wireless_mode; | ||
1826 | if (mac->opmode == NL80211_IFTYPE_STATION) | ||
1827 | curtxbw_40mhz = mac->bw_40; | ||
1828 | else if (mac->opmode == NL80211_IFTYPE_AP || | ||
1829 | mac->opmode == NL80211_IFTYPE_ADHOC) | ||
1830 | macid = sta->aid + 1; | ||
1831 | |||
1832 | if (rtlhal->current_bandtype == BAND_ON_5G) | ||
1833 | ratr_bitmap = sta->supp_rates[1] << 4; | ||
1834 | else | ||
1835 | ratr_bitmap = sta->supp_rates[0]; | ||
1836 | ratr_bitmap |= (sta->ht_cap.mcs.rx_mask[1] << 20 | | ||
1837 | sta->ht_cap.mcs.rx_mask[0] << 12); | ||
1805 | switch (wirelessmode) { | 1838 | switch (wirelessmode) { |
1806 | case WIRELESS_MODE_B: | 1839 | case WIRELESS_MODE_B: |
1807 | ratr_index = RATR_INX_WIRELESS_B; | 1840 | ratr_index = RATR_INX_WIRELESS_B; |
@@ -1828,7 +1861,7 @@ void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level) | |||
1828 | case WIRELESS_MODE_N_5G: | 1861 | case WIRELESS_MODE_N_5G: |
1829 | ratr_index = RATR_INX_WIRELESS_NGB; | 1862 | ratr_index = RATR_INX_WIRELESS_NGB; |
1830 | 1863 | ||
1831 | if (mimops == 0) { | 1864 | if (mimo_ps == IEEE80211_SMPS_STATIC) { |
1832 | if (rssi_level == 1) | 1865 | if (rssi_level == 1) |
1833 | ratr_bitmap &= 0x00070000; | 1866 | ratr_bitmap &= 0x00070000; |
1834 | else if (rssi_level == 2) | 1867 | else if (rssi_level == 2) |
@@ -1892,8 +1925,8 @@ void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level) | |||
1892 | } | 1925 | } |
1893 | RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, | 1926 | RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, |
1894 | ("ratr_bitmap :%x\n", ratr_bitmap)); | 1927 | ("ratr_bitmap :%x\n", ratr_bitmap)); |
1895 | *(u32 *)&rate_mask = (ratr_bitmap & 0x0fffffff) | | 1928 | *(u32 *)&rate_mask = EF4BYTE((ratr_bitmap & 0x0fffffff) | |
1896 | (ratr_index << 28); | 1929 | (ratr_index << 28)); |
1897 | rate_mask[4] = macid | (shortgi ? 0x20 : 0x00) | 0x80; | 1930 | rate_mask[4] = macid | (shortgi ? 0x20 : 0x00) | 0x80; |
1898 | RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, ("Rate_index:%x, " | 1931 | RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, ("Rate_index:%x, " |
1899 | "ratr_val:%x, %x:%x:%x:%x:%x\n", | 1932 | "ratr_val:%x, %x:%x:%x:%x:%x\n", |
@@ -1902,6 +1935,20 @@ void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level) | |||
1902 | rate_mask[2], rate_mask[3], | 1935 | rate_mask[2], rate_mask[3], |
1903 | rate_mask[4])); | 1936 | rate_mask[4])); |
1904 | rtl92c_fill_h2c_cmd(hw, H2C_RA_MASK, 5, rate_mask); | 1937 | rtl92c_fill_h2c_cmd(hw, H2C_RA_MASK, 5, rate_mask); |
1938 | |||
1939 | if (macid != 0) | ||
1940 | sta_entry->ratr_index = ratr_index; | ||
1941 | } | ||
1942 | |||
1943 | void rtl92ce_update_hal_rate_tbl(struct ieee80211_hw *hw, | ||
1944 | struct ieee80211_sta *sta, u8 rssi_level) | ||
1945 | { | ||
1946 | struct rtl_priv *rtlpriv = rtl_priv(hw); | ||
1947 | |||
1948 | if (rtlpriv->dm.useramask) | ||
1949 | rtl92ce_update_hal_rate_mask(hw, sta, rssi_level); | ||
1950 | else | ||
1951 | rtl92ce_update_hal_rate_table(hw, sta); | ||
1905 | } | 1952 | } |
1906 | 1953 | ||
1907 | void rtl92ce_update_channel_access_setting(struct ieee80211_hw *hw) | 1954 | void rtl92ce_update_channel_access_setting(struct ieee80211_hw *hw) |
@@ -1919,7 +1966,7 @@ void rtl92ce_update_channel_access_setting(struct ieee80211_hw *hw) | |||
1919 | rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SIFS, (u8 *)&sifs_timer); | 1966 | rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SIFS, (u8 *)&sifs_timer); |
1920 | } | 1967 | } |
1921 | 1968 | ||
1922 | bool rtl92ce_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 * valid) | 1969 | bool rtl92ce_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 *valid) |
1923 | { | 1970 | { |
1924 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 1971 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
1925 | struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); | 1972 | struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); |
@@ -1929,7 +1976,7 @@ bool rtl92ce_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 * valid) | |||
1929 | bool actuallyset = false; | 1976 | bool actuallyset = false; |
1930 | unsigned long flag; | 1977 | unsigned long flag; |
1931 | 1978 | ||
1932 | if ((rtlpci->up_first_time == 1) || (rtlpci->being_init_adapter)) | 1979 | if (rtlpci->being_init_adapter) |
1933 | return false; | 1980 | return false; |
1934 | 1981 | ||
1935 | if (ppsc->swrf_processing) | 1982 | if (ppsc->swrf_processing) |
@@ -1946,12 +1993,6 @@ bool rtl92ce_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 * valid) | |||
1946 | 1993 | ||
1947 | cur_rfstate = ppsc->rfpwr_state; | 1994 | cur_rfstate = ppsc->rfpwr_state; |
1948 | 1995 | ||
1949 | if ((ppsc->reg_rfps_level & RT_RF_OFF_LEVL_ASPM) && | ||
1950 | RT_IN_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM)) { | ||
1951 | rtlpriv->intf_ops->disable_aspm(hw); | ||
1952 | RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM); | ||
1953 | } | ||
1954 | |||
1955 | rtl_write_byte(rtlpriv, REG_MAC_PINMUX_CFG, rtl_read_byte(rtlpriv, | 1996 | rtl_write_byte(rtlpriv, REG_MAC_PINMUX_CFG, rtl_read_byte(rtlpriv, |
1956 | REG_MAC_PINMUX_CFG)&~(BIT(3))); | 1997 | REG_MAC_PINMUX_CFG)&~(BIT(3))); |
1957 | 1998 | ||
@@ -1976,38 +2017,13 @@ bool rtl92ce_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 * valid) | |||
1976 | } | 2017 | } |
1977 | 2018 | ||
1978 | if (actuallyset) { | 2019 | if (actuallyset) { |
1979 | if (e_rfpowerstate_toset == ERFON) { | ||
1980 | if ((ppsc->reg_rfps_level & RT_RF_OFF_LEVL_ASPM) && | ||
1981 | RT_IN_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM)) { | ||
1982 | rtlpriv->intf_ops->disable_aspm(hw); | ||
1983 | RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM); | ||
1984 | } | ||
1985 | } | ||
1986 | |||
1987 | spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag); | 2020 | spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag); |
1988 | ppsc->rfchange_inprogress = false; | 2021 | ppsc->rfchange_inprogress = false; |
1989 | spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); | 2022 | spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); |
1990 | 2023 | } else { | |
1991 | if (e_rfpowerstate_toset == ERFOFF) { | ||
1992 | if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_ASPM) { | ||
1993 | rtlpriv->intf_ops->enable_aspm(hw); | ||
1994 | RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM); | ||
1995 | } | ||
1996 | } | ||
1997 | |||
1998 | } else if (e_rfpowerstate_toset == ERFOFF || cur_rfstate == ERFOFF) { | ||
1999 | if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_HALT_NIC) | 2024 | if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_HALT_NIC) |
2000 | RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC); | 2025 | RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC); |
2001 | 2026 | ||
2002 | if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_ASPM) { | ||
2003 | rtlpriv->intf_ops->enable_aspm(hw); | ||
2004 | RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_ASPM); | ||
2005 | } | ||
2006 | |||
2007 | spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag); | ||
2008 | ppsc->rfchange_inprogress = false; | ||
2009 | spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); | ||
2010 | } else { | ||
2011 | spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag); | 2027 | spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flag); |
2012 | ppsc->rfchange_inprogress = false; | 2028 | ppsc->rfchange_inprogress = false; |
2013 | spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); | 2029 | spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flag); |
@@ -2086,15 +2102,31 @@ void rtl92ce_set_key(struct ieee80211_hw *hw, u32 key_index, | |||
2086 | macaddr = cam_const_broad; | 2102 | macaddr = cam_const_broad; |
2087 | entry_id = key_index; | 2103 | entry_id = key_index; |
2088 | } else { | 2104 | } else { |
2105 | if (mac->opmode == NL80211_IFTYPE_AP) { | ||
2106 | entry_id = rtl_cam_get_free_entry(hw, | ||
2107 | p_macaddr); | ||
2108 | if (entry_id >= TOTAL_CAM_ENTRY) { | ||
2109 | RT_TRACE(rtlpriv, COMP_SEC, | ||
2110 | DBG_EMERG, | ||
2111 | ("Can not find free hw" | ||
2112 | " security cam entry\n")); | ||
2113 | return; | ||
2114 | } | ||
2115 | } else { | ||
2116 | entry_id = CAM_PAIRWISE_KEY_POSITION; | ||
2117 | } | ||
2118 | |||
2089 | key_index = PAIRWISE_KEYIDX; | 2119 | key_index = PAIRWISE_KEYIDX; |
2090 | entry_id = CAM_PAIRWISE_KEY_POSITION; | ||
2091 | is_pairwise = true; | 2120 | is_pairwise = true; |
2092 | } | 2121 | } |
2093 | } | 2122 | } |
2094 | 2123 | ||
2095 | if (rtlpriv->sec.key_len[key_index] == 0) { | 2124 | if (rtlpriv->sec.key_len[key_index] == 0) { |
2096 | RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, | 2125 | RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, |
2097 | ("delete one entry\n")); | 2126 | ("delete one entry, entry_id is %d\n", |
2127 | entry_id)); | ||
2128 | if (mac->opmode == NL80211_IFTYPE_AP) | ||
2129 | rtl_cam_del_entry(hw, p_macaddr); | ||
2098 | rtl_cam_delete_one_entry(hw, p_macaddr, entry_id); | 2130 | rtl_cam_delete_one_entry(hw, p_macaddr, entry_id); |
2099 | } else { | 2131 | } else { |
2100 | RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD, | 2132 | RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD, |
@@ -2146,3 +2178,132 @@ void rtl92ce_set_key(struct ieee80211_hw *hw, u32 key_index, | |||
2146 | } | 2178 | } |
2147 | } | 2179 | } |
2148 | } | 2180 | } |
2181 | |||
2182 | void rtl8192ce_bt_var_init(struct ieee80211_hw *hw) | ||
2183 | { | ||
2184 | struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); | ||
2185 | |||
2186 | rtlpcipriv->bt_coexist.bt_coexistence = | ||
2187 | rtlpcipriv->bt_coexist.eeprom_bt_coexist; | ||
2188 | rtlpcipriv->bt_coexist.bt_ant_num = | ||
2189 | rtlpcipriv->bt_coexist.eeprom_bt_ant_num; | ||
2190 | rtlpcipriv->bt_coexist.bt_coexist_type = | ||
2191 | rtlpcipriv->bt_coexist.eeprom_bt_type; | ||
2192 | |||
2193 | if (rtlpcipriv->bt_coexist.reg_bt_iso == 2) | ||
2194 | rtlpcipriv->bt_coexist.bt_ant_isolation = | ||
2195 | rtlpcipriv->bt_coexist.eeprom_bt_ant_isolation; | ||
2196 | else | ||
2197 | rtlpcipriv->bt_coexist.bt_ant_isolation = | ||
2198 | rtlpcipriv->bt_coexist.reg_bt_iso; | ||
2199 | |||
2200 | rtlpcipriv->bt_coexist.bt_radio_shared_type = | ||
2201 | rtlpcipriv->bt_coexist.eeprom_bt_radio_shared; | ||
2202 | |||
2203 | if (rtlpcipriv->bt_coexist.bt_coexistence) { | ||
2204 | |||
2205 | if (rtlpcipriv->bt_coexist.reg_bt_sco == 1) | ||
2206 | rtlpcipriv->bt_coexist.bt_service = BT_OTHER_ACTION; | ||
2207 | else if (rtlpcipriv->bt_coexist.reg_bt_sco == 2) | ||
2208 | rtlpcipriv->bt_coexist.bt_service = BT_SCO; | ||
2209 | else if (rtlpcipriv->bt_coexist.reg_bt_sco == 4) | ||
2210 | rtlpcipriv->bt_coexist.bt_service = BT_BUSY; | ||
2211 | else if (rtlpcipriv->bt_coexist.reg_bt_sco == 5) | ||
2212 | rtlpcipriv->bt_coexist.bt_service = BT_OTHERBUSY; | ||
2213 | else | ||
2214 | rtlpcipriv->bt_coexist.bt_service = BT_IDLE; | ||
2215 | |||
2216 | rtlpcipriv->bt_coexist.bt_edca_ul = 0; | ||
2217 | rtlpcipriv->bt_coexist.bt_edca_dl = 0; | ||
2218 | rtlpcipriv->bt_coexist.bt_rssi_state = 0xff; | ||
2219 | } | ||
2220 | } | ||
2221 | |||
2222 | void rtl8192ce_read_bt_coexist_info_from_hwpg(struct ieee80211_hw *hw, | ||
2223 | bool auto_load_fail, u8 *hwinfo) | ||
2224 | { | ||
2225 | struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); | ||
2226 | u8 value; | ||
2227 | |||
2228 | if (!auto_load_fail) { | ||
2229 | rtlpcipriv->bt_coexist.eeprom_bt_coexist = | ||
2230 | ((hwinfo[RF_OPTION1] & 0xe0) >> 5); | ||
2231 | value = hwinfo[RF_OPTION4]; | ||
2232 | rtlpcipriv->bt_coexist.eeprom_bt_type = ((value & 0xe) >> 1); | ||
2233 | rtlpcipriv->bt_coexist.eeprom_bt_ant_num = (value & 0x1); | ||
2234 | rtlpcipriv->bt_coexist.eeprom_bt_ant_isolation = | ||
2235 | ((value & 0x10) >> 4); | ||
2236 | rtlpcipriv->bt_coexist.eeprom_bt_radio_shared = | ||
2237 | ((value & 0x20) >> 5); | ||
2238 | } else { | ||
2239 | rtlpcipriv->bt_coexist.eeprom_bt_coexist = 0; | ||
2240 | rtlpcipriv->bt_coexist.eeprom_bt_type = BT_2WIRE; | ||
2241 | rtlpcipriv->bt_coexist.eeprom_bt_ant_num = ANT_X2; | ||
2242 | rtlpcipriv->bt_coexist.eeprom_bt_ant_isolation = 0; | ||
2243 | rtlpcipriv->bt_coexist.eeprom_bt_radio_shared = BT_RADIO_SHARED; | ||
2244 | } | ||
2245 | |||
2246 | rtl8192ce_bt_var_init(hw); | ||
2247 | } | ||
2248 | |||
2249 | void rtl8192ce_bt_reg_init(struct ieee80211_hw *hw) | ||
2250 | { | ||
2251 | struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); | ||
2252 | |||
2253 | /* 0:Low, 1:High, 2:From Efuse. */ | ||
2254 | rtlpcipriv->bt_coexist.reg_bt_iso = 2; | ||
2255 | /* 0:Idle, 1:None-SCO, 2:SCO, 3:From Counter. */ | ||
2256 | rtlpcipriv->bt_coexist.reg_bt_sco = 3; | ||
2257 | /* 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU. */ | ||
2258 | rtlpcipriv->bt_coexist.reg_bt_sco = 0; | ||
2259 | } | ||
2260 | |||
2261 | |||
2262 | void rtl8192ce_bt_hw_init(struct ieee80211_hw *hw) | ||
2263 | { | ||
2264 | struct rtl_priv *rtlpriv = rtl_priv(hw); | ||
2265 | struct rtl_phy *rtlphy = &(rtlpriv->phy); | ||
2266 | struct rtl_pci_priv *rtlpcipriv = rtl_pcipriv(hw); | ||
2267 | |||
2268 | u8 u1_tmp; | ||
2269 | |||
2270 | if (rtlpcipriv->bt_coexist.bt_coexistence && | ||
2271 | ((rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC4) || | ||
2272 | rtlpcipriv->bt_coexist.bt_coexist_type == BT_CSR_BC8)) { | ||
2273 | |||
2274 | if (rtlpcipriv->bt_coexist.bt_ant_isolation) | ||
2275 | rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0xa0); | ||
2276 | |||
2277 | u1_tmp = rtl_read_byte(rtlpriv, 0x4fd) & | ||
2278 | BIT_OFFSET_LEN_MASK_32(0, 1); | ||
2279 | u1_tmp = u1_tmp | | ||
2280 | ((rtlpcipriv->bt_coexist.bt_ant_isolation == 1) ? | ||
2281 | 0 : BIT_OFFSET_LEN_MASK_32(1, 1)) | | ||
2282 | ((rtlpcipriv->bt_coexist.bt_service == BT_SCO) ? | ||
2283 | 0 : BIT_OFFSET_LEN_MASK_32(2, 1)); | ||
2284 | rtl_write_byte(rtlpriv, 0x4fd, u1_tmp); | ||
2285 | |||
2286 | rtl_write_dword(rtlpriv, REG_BT_COEX_TABLE+4, 0xaaaa9aaa); | ||
2287 | rtl_write_dword(rtlpriv, REG_BT_COEX_TABLE+8, 0xffbd0040); | ||
2288 | rtl_write_dword(rtlpriv, REG_BT_COEX_TABLE+0xc, 0x40000010); | ||
2289 | |||
2290 | /* Config to 1T1R. */ | ||
2291 | if (rtlphy->rf_type == RF_1T1R) { | ||
2292 | u1_tmp = rtl_read_byte(rtlpriv, ROFDM0_TRXPATHENABLE); | ||
2293 | u1_tmp &= ~(BIT_OFFSET_LEN_MASK_32(1, 1)); | ||
2294 | rtl_write_byte(rtlpriv, ROFDM0_TRXPATHENABLE, u1_tmp); | ||
2295 | |||
2296 | u1_tmp = rtl_read_byte(rtlpriv, ROFDM1_TRXPATHENABLE); | ||
2297 | u1_tmp &= ~(BIT_OFFSET_LEN_MASK_32(1, 1)); | ||
2298 | rtl_write_byte(rtlpriv, ROFDM1_TRXPATHENABLE, u1_tmp); | ||
2299 | } | ||
2300 | } | ||
2301 | } | ||
2302 | |||
2303 | void rtl92ce_suspend(struct ieee80211_hw *hw) | ||
2304 | { | ||
2305 | } | ||
2306 | |||
2307 | void rtl92ce_resume(struct ieee80211_hw *hw) | ||
2308 | { | ||
2309 | } | ||
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/hw.h b/drivers/net/wireless/rtlwifi/rtl8192ce/hw.h index a3dfdb635168..07dbe3e340a5 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192ce/hw.h +++ b/drivers/net/wireless/rtlwifi/rtl8192ce/hw.h | |||
@@ -30,7 +30,18 @@ | |||
30 | #ifndef __RTL92CE_HW_H__ | 30 | #ifndef __RTL92CE_HW_H__ |
31 | #define __RTL92CE_HW_H__ | 31 | #define __RTL92CE_HW_H__ |
32 | 32 | ||
33 | #define H2C_RA_MASK 6 | 33 | static inline u8 _rtl92c_get_chnl_group(u8 chnl) |
34 | { | ||
35 | u8 group; | ||
36 | |||
37 | if (chnl < 3) | ||
38 | group = 0; | ||
39 | else if (chnl < 9) | ||
40 | group = 1; | ||
41 | else | ||
42 | group = 2; | ||
43 | return group; | ||
44 | } | ||
34 | 45 | ||
35 | void rtl92ce_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val); | 46 | void rtl92ce_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val); |
36 | void rtl92ce_read_eeprom_info(struct ieee80211_hw *hw); | 47 | void rtl92ce_read_eeprom_info(struct ieee80211_hw *hw); |
@@ -41,28 +52,27 @@ void rtl92ce_card_disable(struct ieee80211_hw *hw); | |||
41 | void rtl92ce_enable_interrupt(struct ieee80211_hw *hw); | 52 | void rtl92ce_enable_interrupt(struct ieee80211_hw *hw); |
42 | void rtl92ce_disable_interrupt(struct ieee80211_hw *hw); | 53 | void rtl92ce_disable_interrupt(struct ieee80211_hw *hw); |
43 | int rtl92ce_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type); | 54 | int rtl92ce_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type); |
55 | void rtl92ce_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid); | ||
44 | void rtl92ce_set_qos(struct ieee80211_hw *hw, int aci); | 56 | void rtl92ce_set_qos(struct ieee80211_hw *hw, int aci); |
45 | void rtl92ce_set_beacon_related_registers(struct ieee80211_hw *hw); | 57 | void rtl92ce_set_beacon_related_registers(struct ieee80211_hw *hw); |
46 | void rtl92ce_set_beacon_interval(struct ieee80211_hw *hw); | 58 | void rtl92ce_set_beacon_interval(struct ieee80211_hw *hw); |
47 | void rtl92ce_update_interrupt_mask(struct ieee80211_hw *hw, | 59 | void rtl92ce_update_interrupt_mask(struct ieee80211_hw *hw, |
48 | u32 add_msr, u32 rm_msr); | 60 | u32 add_msr, u32 rm_msr); |
49 | void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val); | 61 | void rtl92ce_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val); |
50 | void rtl92ce_update_hal_rate_table(struct ieee80211_hw *hw); | 62 | void rtl92ce_update_hal_rate_tbl(struct ieee80211_hw *hw, |
51 | void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level); | 63 | struct ieee80211_sta *sta, u8 rssi_level); |
52 | void rtl92ce_update_channel_access_setting(struct ieee80211_hw *hw); | 64 | void rtl92ce_update_channel_access_setting(struct ieee80211_hw *hw); |
53 | bool rtl92ce_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 *valid); | 65 | bool rtl92ce_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 *valid); |
54 | void rtl92ce_enable_hw_security_config(struct ieee80211_hw *hw); | 66 | void rtl92ce_enable_hw_security_config(struct ieee80211_hw *hw); |
55 | void rtl92ce_set_key(struct ieee80211_hw *hw, u32 key_index, | 67 | void rtl92ce_set_key(struct ieee80211_hw *hw, u32 key_index, |
56 | u8 *p_macaddr, bool is_group, u8 enc_algo, | 68 | u8 *p_macaddr, bool is_group, u8 enc_algo, |
57 | bool is_wepkey, bool clear_all); | 69 | bool is_wepkey, bool clear_all); |
58 | bool _rtl92ce_phy_config_mac_with_headerfile(struct ieee80211_hw *hw); | 70 | |
59 | void rtl92c_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished); | 71 | void rtl8192ce_read_bt_coexist_info_from_hwpg(struct ieee80211_hw *hw, |
60 | void rtl92c_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode); | 72 | bool autoload_fail, u8 *hwinfo); |
61 | void rtl92c_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus); | 73 | void rtl8192ce_bt_reg_init(struct ieee80211_hw *hw); |
62 | int rtl92c_download_fw(struct ieee80211_hw *hw); | 74 | void rtl8192ce_bt_hw_init(struct ieee80211_hw *hw); |
63 | void rtl92c_firmware_selfreset(struct ieee80211_hw *hw); | 75 | void rtl92ce_suspend(struct ieee80211_hw *hw); |
64 | void rtl92c_fill_h2c_cmd(struct ieee80211_hw *hw, | 76 | void rtl92ce_resume(struct ieee80211_hw *hw); |
65 | u8 element_id, u32 cmd_len, u8 *p_cmdbuffer); | ||
66 | bool rtl92ce_phy_mac_config(struct ieee80211_hw *hw); | ||
67 | 77 | ||
68 | #endif | 78 | #endif |
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c b/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c index f4e2f3dcccae..0042e0ee89a8 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c +++ b/drivers/net/wireless/rtlwifi/rtl8192ce/sw.c | |||
@@ -112,10 +112,12 @@ static struct rtl_hal_ops rtl8192ce_hal_ops = { | |||
112 | .update_interrupt_mask = rtl92ce_update_interrupt_mask, | 112 | .update_interrupt_mask = rtl92ce_update_interrupt_mask, |
113 | .get_hw_reg = rtl92ce_get_hw_reg, | 113 | .get_hw_reg = rtl92ce_get_hw_reg, |
114 | .set_hw_reg = rtl92ce_set_hw_reg, | 114 | .set_hw_reg = rtl92ce_set_hw_reg, |
115 | #if 0 /* temporary */ | ||
115 | .update_rate_table = rtl92ce_update_hal_rate_table, | 116 | .update_rate_table = rtl92ce_update_hal_rate_table, |
116 | .update_rate_mask = rtl92ce_update_hal_rate_mask, | 117 | .update_rate_mask = rtl92ce_update_hal_rate_mask, |
117 | .fill_tx_desc = rtl92ce_tx_fill_desc, | 118 | .fill_tx_desc = rtl92ce_tx_fill_desc, |
118 | .fill_tx_cmddesc = rtl92ce_tx_fill_cmddesc, | 119 | .fill_tx_cmddesc = rtl92ce_tx_fill_cmddesc, |
120 | #endif | ||
119 | .query_rx_desc = rtl92ce_rx_query_desc, | 121 | .query_rx_desc = rtl92ce_rx_query_desc, |
120 | .set_channel_access = rtl92ce_update_channel_access_setting, | 122 | .set_channel_access = rtl92ce_update_channel_access_setting, |
121 | .radio_onoff_checking = rtl92ce_gpio_radio_on_off_checking, | 123 | .radio_onoff_checking = rtl92ce_gpio_radio_on_off_checking, |
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c b/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c index e43be2547827..be2d60fb9248 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c +++ b/drivers/net/wireless/rtlwifi/rtl8192cu/hw.c | |||
@@ -42,6 +42,7 @@ | |||
42 | #include "trx.h" | 42 | #include "trx.h" |
43 | #include "led.h" | 43 | #include "led.h" |
44 | #include "table.h" | 44 | #include "table.h" |
45 | #include "../rtl8192ce/hw.h" | ||
45 | 46 | ||
46 | static void _rtl92cu_phy_param_tab_init(struct ieee80211_hw *hw) | 47 | static void _rtl92cu_phy_param_tab_init(struct ieee80211_hw *hw) |
47 | { | 48 | { |
diff --git a/drivers/net/wireless/rtlwifi/rtl8192cu/hw.h b/drivers/net/wireless/rtlwifi/rtl8192cu/hw.h index 62af555bb61c..17dc5a3151cf 100644 --- a/drivers/net/wireless/rtlwifi/rtl8192cu/hw.h +++ b/drivers/net/wireless/rtlwifi/rtl8192cu/hw.h | |||
@@ -104,7 +104,7 @@ void rtl92cu_update_hal_rate_mask(struct ieee80211_hw *hw, u8 rssi_level); | |||
104 | void rtl92cu_update_channel_access_setting(struct ieee80211_hw *hw); | 104 | void rtl92cu_update_channel_access_setting(struct ieee80211_hw *hw); |
105 | bool rtl92cu_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 * valid); | 105 | bool rtl92cu_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 * valid); |
106 | void rtl92cu_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid); | 106 | void rtl92cu_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid); |
107 | u8 _rtl92c_get_chnl_group(u8 chnl); | 107 | static u8 _rtl92c_get_chnl_group(u8 chnl); |
108 | int rtl92c_download_fw(struct ieee80211_hw *hw); | 108 | int rtl92c_download_fw(struct ieee80211_hw *hw); |
109 | void rtl92c_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode); | 109 | void rtl92c_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode); |
110 | void rtl92c_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool dl_finished); | 110 | void rtl92c_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool dl_finished); |