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authorBjorn Andersson <bjorn.andersson@sonymobile.com>2014-05-27 16:47:55 -0400
committerLinus Walleij <linus.walleij@linaro.org>2014-05-28 05:02:23 -0400
commitf6d8812879a0c9d87e349945742e0b9614bfbe9a (patch)
tree3e4e4a22df6aaaa6e98b0b61d147e9032fad915e
parent294d1351ff47726f0f110b88e816cbafe89512fb (diff)
pinctrl: msm: Add missing sdc1 and sdc3 groups
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--drivers/pinctrl/pinctrl-apq8064.c47
1 files changed, 47 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-apq8064.c b/drivers/pinctrl/pinctrl-apq8064.c
index 7c2a8baaea80..519f7886b0f1 100644
--- a/drivers/pinctrl/pinctrl-apq8064.c
+++ b/drivers/pinctrl/pinctrl-apq8064.c
@@ -109,6 +109,13 @@ static const struct pinctrl_pin_desc apq8064_pins[] = {
109 PINCTRL_PIN(87, "GPIO_87"), 109 PINCTRL_PIN(87, "GPIO_87"),
110 PINCTRL_PIN(88, "GPIO_88"), 110 PINCTRL_PIN(88, "GPIO_88"),
111 PINCTRL_PIN(89, "GPIO_89"), 111 PINCTRL_PIN(89, "GPIO_89"),
112
113 PINCTRL_PIN(90, "SDC1_CLK"),
114 PINCTRL_PIN(91, "SDC1_CMD"),
115 PINCTRL_PIN(92, "SDC1_DATA"),
116 PINCTRL_PIN(93, "SDC3_CLK"),
117 PINCTRL_PIN(94, "SDC3_CMD"),
118 PINCTRL_PIN(95, "SDC3_DATA"),
112}; 119};
113 120
114#define DECLARE_APQ_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin } 121#define DECLARE_APQ_GPIO_PINS(pin) static const unsigned int gpio##pin##_pins[] = { pin }
@@ -203,6 +210,13 @@ DECLARE_APQ_GPIO_PINS(87);
203DECLARE_APQ_GPIO_PINS(88); 210DECLARE_APQ_GPIO_PINS(88);
204DECLARE_APQ_GPIO_PINS(89); 211DECLARE_APQ_GPIO_PINS(89);
205 212
213static const unsigned int sdc1_clk_pins[] = { 90 };
214static const unsigned int sdc1_cmd_pins[] = { 91 };
215static const unsigned int sdc1_data_pins[] = { 92 };
216static const unsigned int sdc3_clk_pins[] = { 93 };
217static const unsigned int sdc3_cmd_pins[] = { 94 };
218static const unsigned int sdc3_data_pins[] = { 95 };
219
206#define FUNCTION(fname) \ 220#define FUNCTION(fname) \
207 [APQ_MUX_##fname] = { \ 221 [APQ_MUX_##fname] = { \
208 .name = #fname, \ 222 .name = #fname, \
@@ -250,6 +264,31 @@ DECLARE_APQ_GPIO_PINS(89);
250 .intr_detection_width = 1, \ 264 .intr_detection_width = 1, \
251 } 265 }
252 266
267#define SDC_PINGROUP(pg_name, ctl, pull, drv) \
268 { \
269 .name = #pg_name, \
270 .pins = pg_name##_pins, \
271 .npins = ARRAY_SIZE(pg_name##_pins), \
272 .ctl_reg = ctl, \
273 .io_reg = 0, \
274 .intr_cfg_reg = 0, \
275 .intr_status_reg = 0, \
276 .intr_target_reg = 0, \
277 .mux_bit = -1, \
278 .pull_bit = pull, \
279 .drv_bit = drv, \
280 .oe_bit = -1, \
281 .in_bit = -1, \
282 .out_bit = -1, \
283 .intr_enable_bit = -1, \
284 .intr_status_bit = -1, \
285 .intr_target_bit = -1, \
286 .intr_raw_status_bit = -1, \
287 .intr_polarity_bit = -1, \
288 .intr_detection_bit = -1, \
289 .intr_detection_width = -1, \
290 }
291
253enum apq8064_functions { 292enum apq8064_functions {
254 APQ_MUX_cam_mclk, 293 APQ_MUX_cam_mclk,
255 APQ_MUX_codec_mic_i2s, 294 APQ_MUX_codec_mic_i2s,
@@ -514,6 +553,14 @@ static const struct msm_pingroup apq8064_groups[] = {
514 PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), 553 PINGROUP(87, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
515 PINGROUP(88, usb2_hsic, NA, NA, NA, NA, NA, NA, NA, NA, NA), 554 PINGROUP(88, usb2_hsic, NA, NA, NA, NA, NA, NA, NA, NA, NA),
516 PINGROUP(89, usb2_hsic, NA, NA, NA, NA, NA, NA, NA, NA, NA), 555 PINGROUP(89, usb2_hsic, NA, NA, NA, NA, NA, NA, NA, NA, NA),
556
557 SDC_PINGROUP(sdc1_clk, 0x20a0, 13, 6),
558 SDC_PINGROUP(sdc1_cmd, 0x20a0, 11, 3),
559 SDC_PINGROUP(sdc1_data, 0x20a0, 9, 0),
560
561 SDC_PINGROUP(sdc3_clk, 0x20a4, 14, 6),
562 SDC_PINGROUP(sdc3_cmd, 0x20a4, 11, 3),
563 SDC_PINGROUP(sdc3_data, 0x20a4, 9, 0),
517}; 564};
518 565
519#define NUM_GPIO_PINGROUPS 90 566#define NUM_GPIO_PINGROUPS 90