aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2014-09-05 10:28:56 -0400
committerArnd Bergmann <arnd@arndb.de>2014-09-05 10:28:56 -0400
commitf60e660c5adf9af09d2143d6fe1f0f184fb3733d (patch)
treee6d8c7a5de95d31cc2ac0bedbd82bf3e130cb03f
parent085b5d6faac39e2d04bcb67d728aa29d03d1a5f8 (diff)
parentf170b97c9ad0b8ba3e99f02cbadc7676383fee09 (diff)
Merge tag 'renesas-dt2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Merge "Second Round Of Renesas ARM Based SoC DT Updates For v3.18" from Simon Horman: * Tidy up interrupt-parents * Add clocks register defines for r8a7740 SoC * Add JPU clock to r8a7791 and r8a7790 SoCs Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'renesas-dt2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: sh73a0 dtsi: Move interrupt-parent to the top ARM: shmobile: r8a7791 dtsi: Remove superfluous interrupt-parent ARM: shmobile: r8a7790 dtsi: Remove superfluous interrupt-parent ARM: shmobile: r8a7779 dtsi: Remove superfluous interrupt-parent ARM: shmobile: r8a7740: clock register bits ARM: shmobile: r8a7791: Add JPU clock dt and CPG define. ARM: shmobile: r8a7790: Add JPU clock dt and CPG define.
-rw-r--r--arch/arm/boot/dts/r8a7779.dtsi6
-rw-r--r--arch/arm/boot/dts/r8a7790.dtsi7
-rw-r--r--arch/arm/boot/dts/r8a7791.dtsi7
-rw-r--r--arch/arm/boot/dts/sh73a0.dtsi24
-rw-r--r--include/dt-bindings/clock/r8a7740-clock.h77
-rw-r--r--include/dt-bindings/clock/r8a7790-clock.h1
-rw-r--r--include/dt-bindings/clock/r8a7791-clock.h1
7 files changed, 86 insertions, 37 deletions
diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 58d0d952d60e..0e64c7635127 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -199,7 +199,6 @@
199 scif0: serial@ffe40000 { 199 scif0: serial@ffe40000 {
200 compatible = "renesas,scif-r8a7779", "renesas,scif"; 200 compatible = "renesas,scif-r8a7779", "renesas,scif";
201 reg = <0xffe40000 0x100>; 201 reg = <0xffe40000 0x100>;
202 interrupt-parent = <&gic>;
203 interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; 202 interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;
204 clocks = <&cpg_clocks R8A7779_CLK_P>; 203 clocks = <&cpg_clocks R8A7779_CLK_P>;
205 clock-names = "sci_ick"; 204 clock-names = "sci_ick";
@@ -209,7 +208,6 @@
209 scif1: serial@ffe41000 { 208 scif1: serial@ffe41000 {
210 compatible = "renesas,scif-r8a7779", "renesas,scif"; 209 compatible = "renesas,scif-r8a7779", "renesas,scif";
211 reg = <0xffe41000 0x100>; 210 reg = <0xffe41000 0x100>;
212 interrupt-parent = <&gic>;
213 interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>; 211 interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
214 clocks = <&cpg_clocks R8A7779_CLK_P>; 212 clocks = <&cpg_clocks R8A7779_CLK_P>;
215 clock-names = "sci_ick"; 213 clock-names = "sci_ick";
@@ -219,7 +217,6 @@
219 scif2: serial@ffe42000 { 217 scif2: serial@ffe42000 {
220 compatible = "renesas,scif-r8a7779", "renesas,scif"; 218 compatible = "renesas,scif-r8a7779", "renesas,scif";
221 reg = <0xffe42000 0x100>; 219 reg = <0xffe42000 0x100>;
222 interrupt-parent = <&gic>;
223 interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>; 220 interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>;
224 clocks = <&cpg_clocks R8A7779_CLK_P>; 221 clocks = <&cpg_clocks R8A7779_CLK_P>;
225 clock-names = "sci_ick"; 222 clock-names = "sci_ick";
@@ -229,7 +226,6 @@
229 scif3: serial@ffe43000 { 226 scif3: serial@ffe43000 {
230 compatible = "renesas,scif-r8a7779", "renesas,scif"; 227 compatible = "renesas,scif-r8a7779", "renesas,scif";
231 reg = <0xffe43000 0x100>; 228 reg = <0xffe43000 0x100>;
232 interrupt-parent = <&gic>;
233 interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>; 229 interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>;
234 clocks = <&cpg_clocks R8A7779_CLK_P>; 230 clocks = <&cpg_clocks R8A7779_CLK_P>;
235 clock-names = "sci_ick"; 231 clock-names = "sci_ick";
@@ -239,7 +235,6 @@
239 scif4: serial@ffe44000 { 235 scif4: serial@ffe44000 {
240 compatible = "renesas,scif-r8a7779", "renesas,scif"; 236 compatible = "renesas,scif-r8a7779", "renesas,scif";
241 reg = <0xffe44000 0x100>; 237 reg = <0xffe44000 0x100>;
242 interrupt-parent = <&gic>;
243 interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>; 238 interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
244 clocks = <&cpg_clocks R8A7779_CLK_P>; 239 clocks = <&cpg_clocks R8A7779_CLK_P>;
245 clock-names = "sci_ick"; 240 clock-names = "sci_ick";
@@ -249,7 +244,6 @@
249 scif5: serial@ffe45000 { 244 scif5: serial@ffe45000 {
250 compatible = "renesas,scif-r8a7779", "renesas,scif"; 245 compatible = "renesas,scif-r8a7779", "renesas,scif";
251 reg = <0xffe45000 0x100>; 246 reg = <0xffe45000 0x100>;
252 interrupt-parent = <&gic>;
253 interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>; 247 interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>;
254 clocks = <&cpg_clocks R8A7779_CLK_P>; 248 clocks = <&cpg_clocks R8A7779_CLK_P>;
255 clock-names = "sci_ick"; 249 clock-names = "sci_ick";
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 2278bd0968d1..4b6915ac7675 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -836,17 +836,17 @@
836 mstp1_clks: mstp1_clks@e6150134 { 836 mstp1_clks: mstp1_clks@e6150134 {
837 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; 837 compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
838 reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; 838 reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
839 clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, 839 clocks = <&m2_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
840 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, 840 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>,
841 <&zs_clk>; 841 <&zs_clk>;
842 #clock-cells = <1>; 842 #clock-cells = <1>;
843 renesas,clock-indices = < 843 renesas,clock-indices = <
844 R8A7790_CLK_TMU1 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2 844 R8A7790_CLK_JPU R8A7790_CLK_TMU1 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2
845 R8A7790_CLK_CMT0 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1 845 R8A7790_CLK_CMT0 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1
846 R8A7790_CLK_VSP1_DU0 R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S 846 R8A7790_CLK_VSP1_DU0 R8A7790_CLK_VSP1_R R8A7790_CLK_VSP1_S
847 >; 847 >;
848 clock-output-names = 848 clock-output-names =
849 "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1", 849 "jpu", "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
850 "vsp1-du0", "vsp1-rt", "vsp1-sy"; 850 "vsp1-du0", "vsp1-rt", "vsp1-sy";
851 }; 851 };
852 mstp2_clks: mstp2_clks@e6150138 { 852 mstp2_clks: mstp2_clks@e6150138 {
@@ -1126,7 +1126,6 @@
1126 rcar_sound: rcar_sound@0xec500000 { 1126 rcar_sound: rcar_sound@0xec500000 {
1127 #sound-dai-cells = <1>; 1127 #sound-dai-cells = <1>;
1128 compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2", "renesas,rcar_sound"; 1128 compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2", "renesas,rcar_sound";
1129 interrupt-parent = <&gic>;
1130 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1129 reg = <0 0xec500000 0 0x1000>, /* SCU */
1131 <0 0xec5a0000 0 0x100>, /* ADG */ 1130 <0 0xec5a0000 0 0x100>, /* ADG */
1132 <0 0xec540000 0 0x1000>, /* SSIU */ 1131 <0 0xec540000 0 0x1000>, /* SSIU */
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index f26226e054b3..9ee1d4133f07 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -857,16 +857,16 @@
857 mstp1_clks: mstp1_clks@e6150134 { 857 mstp1_clks: mstp1_clks@e6150134 {
858 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; 858 compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
859 reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>; 859 reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
860 clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, 860 clocks = <&m2_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
861 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>; 861 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>;
862 #clock-cells = <1>; 862 #clock-cells = <1>;
863 renesas,clock-indices = < 863 renesas,clock-indices = <
864 R8A7791_CLK_TMU1 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2 864 R8A7791_CLK_JPU R8A7791_CLK_TMU1 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2
865 R8A7791_CLK_CMT0 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1 865 R8A7791_CLK_CMT0 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1
866 R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_S 866 R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_S
867 >; 867 >;
868 clock-output-names = 868 clock-output-names =
869 "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1", 869 "jpu", "tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
870 "vsp1-du0", "vsp1-sy"; 870 "vsp1-du0", "vsp1-sy";
871 }; 871 };
872 mstp2_clks: mstp2_clks@e6150138 { 872 mstp2_clks: mstp2_clks@e6150138 {
@@ -1124,7 +1124,6 @@
1124 rcar_sound: rcar_sound@0xec500000 { 1124 rcar_sound: rcar_sound@0xec500000 {
1125 #sound-dai-cells = <1>; 1125 #sound-dai-cells = <1>;
1126 compatible = "renesas,rcar_sound-r8a7791", "renesas,rcar_sound-gen2", "renesas,rcar_sound"; 1126 compatible = "renesas,rcar_sound-r8a7791", "renesas,rcar_sound-gen2", "renesas,rcar_sound";
1127 interrupt-parent = <&gic>;
1128 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1127 reg = <0 0xec500000 0 0x1000>, /* SCU */
1129 <0 0xec5a0000 0 0x100>, /* ADG */ 1128 <0 0xec5a0000 0 0x100>, /* ADG */
1130 <0 0xec540000 0 0x1000>, /* SSIU */ 1129 <0 0xec540000 0 0x1000>, /* SSIU */
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index 910b79079d5a..c95935563e44 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -14,6 +14,7 @@
14 14
15/ { 15/ {
16 compatible = "renesas,sh73a0"; 16 compatible = "renesas,sh73a0";
17 interrupt-parent = <&gic>;
17 18
18 cpus { 19 cpus {
19 #address-cells = <1>; 20 #address-cells = <1>;
@@ -54,7 +55,6 @@
54 <0xe6900020 1>, 55 <0xe6900020 1>,
55 <0xe6900040 1>, 56 <0xe6900040 1>,
56 <0xe6900060 1>; 57 <0xe6900060 1>;
57 interrupt-parent = <&gic>;
58 interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH 58 interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH
59 0 2 IRQ_TYPE_LEVEL_HIGH 59 0 2 IRQ_TYPE_LEVEL_HIGH
60 0 3 IRQ_TYPE_LEVEL_HIGH 60 0 3 IRQ_TYPE_LEVEL_HIGH
@@ -74,7 +74,6 @@
74 <0xe6900024 1>, 74 <0xe6900024 1>,
75 <0xe6900044 1>, 75 <0xe6900044 1>,
76 <0xe6900064 1>; 76 <0xe6900064 1>;
77 interrupt-parent = <&gic>;
78 interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH 77 interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH
79 0 10 IRQ_TYPE_LEVEL_HIGH 78 0 10 IRQ_TYPE_LEVEL_HIGH
80 0 11 IRQ_TYPE_LEVEL_HIGH 79 0 11 IRQ_TYPE_LEVEL_HIGH
@@ -95,7 +94,6 @@
95 <0xe6900028 1>, 94 <0xe6900028 1>,
96 <0xe6900048 1>, 95 <0xe6900048 1>,
97 <0xe6900068 1>; 96 <0xe6900068 1>;
98 interrupt-parent = <&gic>;
99 interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH 97 interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH
100 0 18 IRQ_TYPE_LEVEL_HIGH 98 0 18 IRQ_TYPE_LEVEL_HIGH
101 0 19 IRQ_TYPE_LEVEL_HIGH 99 0 19 IRQ_TYPE_LEVEL_HIGH
@@ -115,7 +113,6 @@
115 <0xe690002c 1>, 113 <0xe690002c 1>,
116 <0xe690004c 1>, 114 <0xe690004c 1>,
117 <0xe690006c 1>; 115 <0xe690006c 1>;
118 interrupt-parent = <&gic>;
119 interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH 116 interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH
120 0 26 IRQ_TYPE_LEVEL_HIGH 117 0 26 IRQ_TYPE_LEVEL_HIGH
121 0 27 IRQ_TYPE_LEVEL_HIGH 118 0 27 IRQ_TYPE_LEVEL_HIGH
@@ -131,7 +128,6 @@
131 #size-cells = <0>; 128 #size-cells = <0>;
132 compatible = "renesas,rmobile-iic"; 129 compatible = "renesas,rmobile-iic";
133 reg = <0xe6820000 0x425>; 130 reg = <0xe6820000 0x425>;
134 interrupt-parent = <&gic>;
135 interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH 131 interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH
136 0 168 IRQ_TYPE_LEVEL_HIGH 132 0 168 IRQ_TYPE_LEVEL_HIGH
137 0 169 IRQ_TYPE_LEVEL_HIGH 133 0 169 IRQ_TYPE_LEVEL_HIGH
@@ -144,7 +140,6 @@
144 #size-cells = <0>; 140 #size-cells = <0>;
145 compatible = "renesas,rmobile-iic"; 141 compatible = "renesas,rmobile-iic";
146 reg = <0xe6822000 0x425>; 142 reg = <0xe6822000 0x425>;
147 interrupt-parent = <&gic>;
148 interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH 143 interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH
149 0 52 IRQ_TYPE_LEVEL_HIGH 144 0 52 IRQ_TYPE_LEVEL_HIGH
150 0 53 IRQ_TYPE_LEVEL_HIGH 145 0 53 IRQ_TYPE_LEVEL_HIGH
@@ -157,7 +152,6 @@
157 #size-cells = <0>; 152 #size-cells = <0>;
158 compatible = "renesas,rmobile-iic"; 153 compatible = "renesas,rmobile-iic";
159 reg = <0xe6824000 0x425>; 154 reg = <0xe6824000 0x425>;
160 interrupt-parent = <&gic>;
161 interrupts = <0 171 IRQ_TYPE_LEVEL_HIGH 155 interrupts = <0 171 IRQ_TYPE_LEVEL_HIGH
162 0 172 IRQ_TYPE_LEVEL_HIGH 156 0 172 IRQ_TYPE_LEVEL_HIGH
163 0 173 IRQ_TYPE_LEVEL_HIGH 157 0 173 IRQ_TYPE_LEVEL_HIGH
@@ -170,7 +164,6 @@
170 #size-cells = <0>; 164 #size-cells = <0>;
171 compatible = "renesas,rmobile-iic"; 165 compatible = "renesas,rmobile-iic";
172 reg = <0xe6826000 0x425>; 166 reg = <0xe6826000 0x425>;
173 interrupt-parent = <&gic>;
174 interrupts = <0 183 IRQ_TYPE_LEVEL_HIGH 167 interrupts = <0 183 IRQ_TYPE_LEVEL_HIGH
175 0 184 IRQ_TYPE_LEVEL_HIGH 168 0 184 IRQ_TYPE_LEVEL_HIGH
176 0 185 IRQ_TYPE_LEVEL_HIGH 169 0 185 IRQ_TYPE_LEVEL_HIGH
@@ -183,7 +176,6 @@
183 #size-cells = <0>; 176 #size-cells = <0>;
184 compatible = "renesas,rmobile-iic"; 177 compatible = "renesas,rmobile-iic";
185 reg = <0xe6828000 0x425>; 178 reg = <0xe6828000 0x425>;
186 interrupt-parent = <&gic>;
187 interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH 179 interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH
188 0 188 IRQ_TYPE_LEVEL_HIGH 180 0 188 IRQ_TYPE_LEVEL_HIGH
189 0 189 IRQ_TYPE_LEVEL_HIGH 181 0 189 IRQ_TYPE_LEVEL_HIGH
@@ -194,7 +186,6 @@
194 mmcif: mmc@e6bd0000 { 186 mmcif: mmc@e6bd0000 {
195 compatible = "renesas,sh-mmcif"; 187 compatible = "renesas,sh-mmcif";
196 reg = <0xe6bd0000 0x100>; 188 reg = <0xe6bd0000 0x100>;
197 interrupt-parent = <&gic>;
198 interrupts = <0 140 IRQ_TYPE_LEVEL_HIGH 189 interrupts = <0 140 IRQ_TYPE_LEVEL_HIGH
199 0 141 IRQ_TYPE_LEVEL_HIGH>; 190 0 141 IRQ_TYPE_LEVEL_HIGH>;
200 reg-io-width = <4>; 191 reg-io-width = <4>;
@@ -204,7 +195,6 @@
204 sdhi0: sd@ee100000 { 195 sdhi0: sd@ee100000 {
205 compatible = "renesas,sdhi-sh73a0"; 196 compatible = "renesas,sdhi-sh73a0";
206 reg = <0xee100000 0x100>; 197 reg = <0xee100000 0x100>;
207 interrupt-parent = <&gic>;
208 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH 198 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH
209 0 84 IRQ_TYPE_LEVEL_HIGH 199 0 84 IRQ_TYPE_LEVEL_HIGH
210 0 85 IRQ_TYPE_LEVEL_HIGH>; 200 0 85 IRQ_TYPE_LEVEL_HIGH>;
@@ -216,7 +206,6 @@
216 sdhi1: sd@ee120000 { 206 sdhi1: sd@ee120000 {
217 compatible = "renesas,sdhi-sh73a0"; 207 compatible = "renesas,sdhi-sh73a0";
218 reg = <0xee120000 0x100>; 208 reg = <0xee120000 0x100>;
219 interrupt-parent = <&gic>;
220 interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH 209 interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH
221 0 89 IRQ_TYPE_LEVEL_HIGH>; 210 0 89 IRQ_TYPE_LEVEL_HIGH>;
222 toshiba,mmc-wrprotect-disable; 211 toshiba,mmc-wrprotect-disable;
@@ -227,7 +216,6 @@
227 sdhi2: sd@ee140000 { 216 sdhi2: sd@ee140000 {
228 compatible = "renesas,sdhi-sh73a0"; 217 compatible = "renesas,sdhi-sh73a0";
229 reg = <0xee140000 0x100>; 218 reg = <0xee140000 0x100>;
230 interrupt-parent = <&gic>;
231 interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH 219 interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH
232 0 105 IRQ_TYPE_LEVEL_HIGH>; 220 0 105 IRQ_TYPE_LEVEL_HIGH>;
233 toshiba,mmc-wrprotect-disable; 221 toshiba,mmc-wrprotect-disable;
@@ -238,7 +226,6 @@
238 scifa0: serial@e6c40000 { 226 scifa0: serial@e6c40000 {
239 compatible = "renesas,scifa-sh73a0", "renesas,scifa"; 227 compatible = "renesas,scifa-sh73a0", "renesas,scifa";
240 reg = <0xe6c40000 0x100>; 228 reg = <0xe6c40000 0x100>;
241 interrupt-parent = <&gic>;
242 interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>; 229 interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
243 status = "disabled"; 230 status = "disabled";
244 }; 231 };
@@ -246,7 +233,6 @@
246 scifa1: serial@e6c50000 { 233 scifa1: serial@e6c50000 {
247 compatible = "renesas,scifa-sh73a0", "renesas,scifa"; 234 compatible = "renesas,scifa-sh73a0", "renesas,scifa";
248 reg = <0xe6c50000 0x100>; 235 reg = <0xe6c50000 0x100>;
249 interrupt-parent = <&gic>;
250 interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>; 236 interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
251 status = "disabled"; 237 status = "disabled";
252 }; 238 };
@@ -254,7 +240,6 @@
254 scifa2: serial@e6c60000 { 240 scifa2: serial@e6c60000 {
255 compatible = "renesas,scifa-sh73a0", "renesas,scifa"; 241 compatible = "renesas,scifa-sh73a0", "renesas,scifa";
256 reg = <0xe6c60000 0x100>; 242 reg = <0xe6c60000 0x100>;
257 interrupt-parent = <&gic>;
258 interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>; 243 interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
259 status = "disabled"; 244 status = "disabled";
260 }; 245 };
@@ -262,7 +247,6 @@
262 scifa3: serial@e6c70000 { 247 scifa3: serial@e6c70000 {
263 compatible = "renesas,scifa-sh73a0", "renesas,scifa"; 248 compatible = "renesas,scifa-sh73a0", "renesas,scifa";
264 reg = <0xe6c70000 0x100>; 249 reg = <0xe6c70000 0x100>;
265 interrupt-parent = <&gic>;
266 interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>; 250 interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
267 status = "disabled"; 251 status = "disabled";
268 }; 252 };
@@ -270,7 +254,6 @@
270 scifa4: serial@e6c80000 { 254 scifa4: serial@e6c80000 {
271 compatible = "renesas,scifa-sh73a0", "renesas,scifa"; 255 compatible = "renesas,scifa-sh73a0", "renesas,scifa";
272 reg = <0xe6c80000 0x100>; 256 reg = <0xe6c80000 0x100>;
273 interrupt-parent = <&gic>;
274 interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>; 257 interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
275 status = "disabled"; 258 status = "disabled";
276 }; 259 };
@@ -278,7 +261,6 @@
278 scifa5: serial@e6cb0000 { 261 scifa5: serial@e6cb0000 {
279 compatible = "renesas,scifa-sh73a0", "renesas,scifa"; 262 compatible = "renesas,scifa-sh73a0", "renesas,scifa";
280 reg = <0xe6cb0000 0x100>; 263 reg = <0xe6cb0000 0x100>;
281 interrupt-parent = <&gic>;
282 interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>; 264 interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
283 status = "disabled"; 265 status = "disabled";
284 }; 266 };
@@ -286,7 +268,6 @@
286 scifa6: serial@e6cc0000 { 268 scifa6: serial@e6cc0000 {
287 compatible = "renesas,scifa-sh73a0", "renesas,scifa"; 269 compatible = "renesas,scifa-sh73a0", "renesas,scifa";
288 reg = <0xe6cc0000 0x100>; 270 reg = <0xe6cc0000 0x100>;
289 interrupt-parent = <&gic>;
290 interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>; 271 interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
291 status = "disabled"; 272 status = "disabled";
292 }; 273 };
@@ -294,7 +275,6 @@
294 scifa7: serial@e6cd0000 { 275 scifa7: serial@e6cd0000 {
295 compatible = "renesas,scifa-sh73a0", "renesas,scifa"; 276 compatible = "renesas,scifa-sh73a0", "renesas,scifa";
296 reg = <0xe6cd0000 0x100>; 277 reg = <0xe6cd0000 0x100>;
297 interrupt-parent = <&gic>;
298 interrupts = <0 143 IRQ_TYPE_LEVEL_HIGH>; 278 interrupts = <0 143 IRQ_TYPE_LEVEL_HIGH>;
299 status = "disabled"; 279 status = "disabled";
300 }; 280 };
@@ -302,7 +282,6 @@
302 scifb8: serial@e6c30000 { 282 scifb8: serial@e6c30000 {
303 compatible = "renesas,scifb-sh73a0", "renesas,scifb"; 283 compatible = "renesas,scifb-sh73a0", "renesas,scifb";
304 reg = <0xe6c30000 0x100>; 284 reg = <0xe6c30000 0x100>;
305 interrupt-parent = <&gic>;
306 interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>; 285 interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
307 status = "disabled"; 286 status = "disabled";
308 }; 287 };
@@ -328,7 +307,6 @@
328 #sound-dai-cells = <1>; 307 #sound-dai-cells = <1>;
329 compatible = "renesas,sh_fsi2"; 308 compatible = "renesas,sh_fsi2";
330 reg = <0xec230000 0x400>; 309 reg = <0xec230000 0x400>;
331 interrupt-parent = <&gic>;
332 interrupts = <0 146 0x4>; 310 interrupts = <0 146 0x4>;
333 status = "disabled"; 311 status = "disabled";
334 }; 312 };
diff --git a/include/dt-bindings/clock/r8a7740-clock.h b/include/dt-bindings/clock/r8a7740-clock.h
new file mode 100644
index 000000000000..f6b4b0fe7a43
--- /dev/null
+++ b/include/dt-bindings/clock/r8a7740-clock.h
@@ -0,0 +1,77 @@
1/*
2 * Copyright 2014 Ulrich Hecht
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#ifndef __DT_BINDINGS_CLOCK_R8A7740_H__
11#define __DT_BINDINGS_CLOCK_R8A7740_H__
12
13/* CPG */
14#define R8A7740_CLK_SYSTEM 0
15#define R8A7740_CLK_PLLC0 1
16#define R8A7740_CLK_PLLC1 2
17#define R8A7740_CLK_PLLC2 3
18#define R8A7740_CLK_R 4
19#define R8A7740_CLK_USB24S 5
20#define R8A7740_CLK_I 6
21#define R8A7740_CLK_ZG 7
22#define R8A7740_CLK_B 8
23#define R8A7740_CLK_M1 9
24#define R8A7740_CLK_HP 10
25#define R8A7740_CLK_HPP 11
26#define R8A7740_CLK_USBP 12
27#define R8A7740_CLK_S 13
28#define R8A7740_CLK_ZB 14
29#define R8A7740_CLK_M3 15
30#define R8A7740_CLK_CP 16
31
32/* MSTP1 */
33#define R8A7740_CLK_CEU21 28
34#define R8A7740_CLK_CEU20 27
35#define R8A7740_CLK_TMU0 25
36#define R8A7740_CLK_LCDC1 17
37#define R8A7740_CLK_IIC0 16
38#define R8A7740_CLK_TMU1 11
39#define R8A7740_CLK_LCDC0 0
40
41/* MSTP2 */
42#define R8A7740_CLK_SCIFA6 30
43#define R8A7740_CLK_SCIFA7 22
44#define R8A7740_CLK_DMAC1 18
45#define R8A7740_CLK_DMAC2 17
46#define R8A7740_CLK_DMAC3 16
47#define R8A7740_CLK_USBDMAC 14
48#define R8A7740_CLK_SCIFA5 7
49#define R8A7740_CLK_SCIFB 6
50#define R8A7740_CLK_SCIFA0 4
51#define R8A7740_CLK_SCIFA1 3
52#define R8A7740_CLK_SCIFA2 2
53#define R8A7740_CLK_SCIFA3 1
54#define R8A7740_CLK_SCIFA4 0
55
56/* MSTP3 */
57#define R8A7740_CLK_CMT1 29
58#define R8A7740_CLK_FSI 28
59#define R8A7740_CLK_IIC1 23
60#define R8A7740_CLK_USBF 20
61#define R8A7740_CLK_SDHI0 14
62#define R8A7740_CLK_SDHI1 13
63#define R8A7740_CLK_MMC 12
64#define R8A7740_CLK_GETHER 9
65#define R8A7740_CLK_TPU0 4
66
67/* MSTP4 */
68#define R8A7740_CLK_USBH 16
69#define R8A7740_CLK_SDHI2 15
70#define R8A7740_CLK_USBFUNC 7
71#define R8A7740_CLK_USBPHY 6
72
73/* SUBCK* */
74#define R8A7740_CLK_SUBCK 9
75#define R8A7740_CLK_SUBCK2 10
76
77#endif /* __DT_BINDINGS_CLOCK_R8A7740_H__ */
diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
index f929a79e6998..8ea7ab0346ad 100644
--- a/include/dt-bindings/clock/r8a7790-clock.h
+++ b/include/dt-bindings/clock/r8a7790-clock.h
@@ -26,6 +26,7 @@
26#define R8A7790_CLK_MSIOF0 0 26#define R8A7790_CLK_MSIOF0 0
27 27
28/* MSTP1 */ 28/* MSTP1 */
29#define R8A7790_CLK_JPU 6
29#define R8A7790_CLK_TMU1 11 30#define R8A7790_CLK_TMU1 11
30#define R8A7790_CLK_TMU3 21 31#define R8A7790_CLK_TMU3 21
31#define R8A7790_CLK_TMU2 22 32#define R8A7790_CLK_TMU2 22
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
index f0d4d1049162..58c3f49d068c 100644
--- a/include/dt-bindings/clock/r8a7791-clock.h
+++ b/include/dt-bindings/clock/r8a7791-clock.h
@@ -25,6 +25,7 @@
25#define R8A7791_CLK_MSIOF0 0 25#define R8A7791_CLK_MSIOF0 0
26 26
27/* MSTP1 */ 27/* MSTP1 */
28#define R8A7791_CLK_JPU 6
28#define R8A7791_CLK_TMU1 11 29#define R8A7791_CLK_TMU1 11
29#define R8A7791_CLK_TMU3 21 30#define R8A7791_CLK_TMU3 21
30#define R8A7791_CLK_TMU2 22 31#define R8A7791_CLK_TMU2 22