diff options
| author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2013-04-17 19:18:41 -0400 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2013-06-04 08:04:30 -0400 |
| commit | f569b10f66f1038550b960848c187584a11c9e3a (patch) | |
| tree | d9b135a584952c8f97e70ff82c970a57aa335bc7 | |
| parent | 7cded0c90badbf396345e46459a6cbca14fc7ae3 (diff) | |
ARM: shmobile: bonito: Register pinctrl mapping for INTC
Replace the GPIO-based INTC pinmux configuration by a pinctrl mapping.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| -rw-r--r-- | arch/arm/mach-shmobile/board-bonito.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c index b66206626f52..5076f4d5067b 100644 --- a/arch/arm/mach-shmobile/board-bonito.c +++ b/arch/arm/mach-shmobile/board-bonito.c | |||
| @@ -369,6 +369,17 @@ static void __init bonito_map_io(void) | |||
| 369 | #define VCCQ1CR IOMEM(0xE6058140) | 369 | #define VCCQ1CR IOMEM(0xE6058140) |
| 370 | #define VCCQ1LCDCR IOMEM(0xE6058186) | 370 | #define VCCQ1LCDCR IOMEM(0xE6058186) |
| 371 | 371 | ||
| 372 | /* | ||
| 373 | * HACK: The FPGA mappings should be associated with the FPGA device, but we | ||
| 374 | * don't have one at the moment. Associate them with the PFC device to make | ||
| 375 | * sure they will be applied. | ||
| 376 | */ | ||
| 377 | static const struct pinctrl_map fpga_pinctrl_map[] = { | ||
| 378 | /* FPGA */ | ||
| 379 | PIN_MAP_MUX_GROUP_DEFAULT("pfc-r8a7740", "pfc-r8a7740", | ||
| 380 | "intc_irq10", "intc"), | ||
| 381 | }; | ||
| 382 | |||
| 372 | static const struct pinctrl_map scifa5_pinctrl_map[] = { | 383 | static const struct pinctrl_map scifa5_pinctrl_map[] = { |
| 373 | /* SCIFA5 */ | 384 | /* SCIFA5 */ |
| 374 | PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.5", "pfc-r8a7740", | 385 | PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.5", "pfc-r8a7740", |
| @@ -381,6 +392,8 @@ static void __init bonito_init(void) | |||
| 381 | 392 | ||
| 382 | regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); | 393 | regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); |
| 383 | 394 | ||
| 395 | pinctrl_register_mappings(fpga_pinctrl_map, | ||
| 396 | ARRAY_SIZE(fpga_pinctrl_map)); | ||
| 384 | r8a7740_pinmux_init(); | 397 | r8a7740_pinmux_init(); |
| 385 | bonito_fpga_init(); | 398 | bonito_fpga_init(); |
| 386 | 399 | ||
| @@ -412,7 +425,6 @@ static void __init bonito_init(void) | |||
| 412 | gpio_request(GPIO_FN_CS5B, NULL); | 425 | gpio_request(GPIO_FN_CS5B, NULL); |
| 413 | gpio_request(GPIO_FN_CS6A, NULL); | 426 | gpio_request(GPIO_FN_CS6A, NULL); |
| 414 | gpio_request(GPIO_FN_CS5A_PORT105, NULL); | 427 | gpio_request(GPIO_FN_CS5A_PORT105, NULL); |
| 415 | gpio_request(GPIO_FN_IRQ10, NULL); | ||
| 416 | 428 | ||
| 417 | val = bonito_fpga_read(BVERR); | 429 | val = bonito_fpga_read(BVERR); |
| 418 | pr_info("bonito version: cpu %02x, base %02x\n", | 430 | pr_info("bonito version: cpu %02x, base %02x\n", |
