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authorHaojian Zhuang <haojian.zhuang@marvell.com>2012-01-03 21:26:33 -0500
committerLinus Walleij <linus.walleij@linaro.org>2012-02-01 13:42:35 -0500
commitf4e66983293f78e177bb210d19a46f083f5e8197 (patch)
tree14b3e796bcf5f6546bf0f78b7dc4dae605bee66d
parent9dfac4fd7f8cdcdf734dff2ccc7ca467f53f1cfd (diff)
pinctrl: enable pinmux for mmp series
Support PXA168/PXA910/MMP2 pinmux. Now only support function switch. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> [Rebase and fix some whitespace issues] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat
-rw-r--r--drivers/pinctrl/Kconfig22
-rw-r--r--drivers/pinctrl/Makefile4
-rw-r--r--drivers/pinctrl/pinctrl-mmp2.c722
-rw-r--r--drivers/pinctrl/pinctrl-pxa168.c651
-rw-r--r--drivers/pinctrl/pinctrl-pxa3xx.c244
-rw-r--r--drivers/pinctrl/pinctrl-pxa3xx.h264
-rw-r--r--drivers/pinctrl/pinctrl-pxa910.c1007
7 files changed, 2914 insertions, 0 deletions
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index afaf88558125..3bea79fc35d5 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -23,6 +23,28 @@ config DEBUG_PINCTRL
23 help 23 help
24 Say Y here to add some extra checks and diagnostics to PINCTRL calls. 24 Say Y here to add some extra checks and diagnostics to PINCTRL calls.
25 25
26config PINCTRL_PXA3xx
27 bool
28 select PINMUX
29
30config PINCTRL_MMP2
31 bool "MMP2 pin controller driver"
32 depends on ARCH_MMP
33 select PINCTRL_PXA3xx
34 select PINCONF
35
36config PINCTRL_PXA168
37 bool "PXA168 pin controller driver"
38 depends on ARCH_MMP
39 select PINCTRL_PXA3xx
40 select PINCONF
41
42config PINCTRL_PXA910
43 bool "PXA910 pin controller driver"
44 depends on ARCH_MMP
45 select PINCTRL_PXA3xx
46 select PINCONF
47
26config PINCTRL_SIRF 48config PINCTRL_SIRF
27 bool "CSR SiRFprimaII pin controller driver" 49 bool "CSR SiRFprimaII pin controller driver"
28 depends on ARCH_PRIMA2 50 depends on ARCH_PRIMA2
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 827601cc68f6..c95d91e87b55 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -5,6 +5,10 @@ ccflags-$(CONFIG_DEBUG_PINCTRL) += -DDEBUG
5obj-$(CONFIG_PINCTRL) += core.o 5obj-$(CONFIG_PINCTRL) += core.o
6obj-$(CONFIG_PINMUX) += pinmux.o 6obj-$(CONFIG_PINMUX) += pinmux.o
7obj-$(CONFIG_PINCONF) += pinconf.o 7obj-$(CONFIG_PINCONF) += pinconf.o
8obj-$(CONFIG_PINCTRL_PXA3xx) += pinctrl-pxa3xx.o
9obj-$(CONFIG_PINCTRL_MMP2) += pinctrl-mmp2.o
10obj-$(CONFIG_PINCTRL_PXA168) += pinctrl-pxa168.o
11obj-$(CONFIG_PINCTRL_PXA910) += pinctrl-pxa910.o
8obj-$(CONFIG_PINCTRL_SIRF) += pinctrl-sirf.o 12obj-$(CONFIG_PINCTRL_SIRF) += pinctrl-sirf.o
9obj-$(CONFIG_PINCTRL_U300) += pinctrl-u300.o 13obj-$(CONFIG_PINCTRL_U300) += pinctrl-u300.o
10obj-$(CONFIG_PINCTRL_COH901) += pinctrl-coh901.o 14obj-$(CONFIG_PINCTRL_COH901) += pinctrl-coh901.o
diff --git a/drivers/pinctrl/pinctrl-mmp2.c b/drivers/pinctrl/pinctrl-mmp2.c
new file mode 100644
index 000000000000..2cfed552bbe4
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-mmp2.c
@@ -0,0 +1,722 @@
1/*
2 * linux/drivers/pinctrl/pinmux-mmp2.c
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * publishhed by the Free Software Foundation.
7 *
8 * Copyright (C) 2011, Marvell Technology Group Ltd.
9 *
10 * Author: Haojian Zhuang <haojian.zhuang@marvell.com>
11 *
12 */
13
14#include <linux/device.h>
15#include <linux/module.h>
16#include <linux/io.h>
17#include <linux/platform_device.h>
18#include "pinctrl-pxa3xx.h"
19
20#define MMP2_DS_MASK 0x1800
21#define MMP2_DS_SHIFT 11
22#define MMP2_SLEEP_MASK 0x38
23#define MMP2_SLEEP_SELECT (1 << 9)
24#define MMP2_SLEEP_DATA (1 << 8)
25#define MMP2_SLEEP_DIR (1 << 7)
26
27#define MFPR_MMP2(a, r, f0, f1, f2, f3, f4, f5, f6, f7) \
28 { \
29 .name = #a, \
30 .pin = a, \
31 .mfpr = r, \
32 .func = { \
33 MMP2_MUX_##f0, \
34 MMP2_MUX_##f1, \
35 MMP2_MUX_##f2, \
36 MMP2_MUX_##f3, \
37 MMP2_MUX_##f4, \
38 MMP2_MUX_##f5, \
39 MMP2_MUX_##f6, \
40 MMP2_MUX_##f7, \
41 }, \
42 }
43
44#define GRP_MMP2(a, m, p) \
45 { .name = a, .mux = MMP2_MUX_##m, .pins = p, .npins = ARRAY_SIZE(p), }
46
47/* 174 pins */
48enum mmp2_pin_list {
49 /* 0~168: GPIO0~GPIO168 */
50 TWSI4_SCL = 169,
51 TWSI4_SDA, /* 170 */
52 G_CLKREQ,
53 VCXO_REQ,
54 VCXO_OUT,
55};
56
57enum mmp2_mux {
58 /* PXA3xx_MUX_GPIO = 0 (predefined in pinctrl-pxa3xx.h) */
59 MMP2_MUX_GPIO = 0,
60 MMP2_MUX_G_CLKREQ,
61 MMP2_MUX_VCXO_REQ,
62 MMP2_MUX_VCXO_OUT,
63 MMP2_MUX_KP_MK,
64 MMP2_MUX_KP_DK,
65 MMP2_MUX_CCIC1,
66 MMP2_MUX_CCIC2,
67 MMP2_MUX_SPI,
68 MMP2_MUX_SSPA2,
69 MMP2_MUX_ROT,
70 MMP2_MUX_I2S,
71 MMP2_MUX_TB,
72 MMP2_MUX_CAM2,
73 MMP2_MUX_HDMI,
74 MMP2_MUX_TWSI2,
75 MMP2_MUX_TWSI3,
76 MMP2_MUX_TWSI4,
77 MMP2_MUX_TWSI5,
78 MMP2_MUX_TWSI6,
79 MMP2_MUX_UART1,
80 MMP2_MUX_UART2,
81 MMP2_MUX_UART3,
82 MMP2_MUX_UART4,
83 MMP2_MUX_SSP1_RX,
84 MMP2_MUX_SSP1_FRM,
85 MMP2_MUX_SSP1_TXRX,
86 MMP2_MUX_SSP2_RX,
87 MMP2_MUX_SSP2_FRM,
88 MMP2_MUX_SSP1,
89 MMP2_MUX_SSP2,
90 MMP2_MUX_SSP3,
91 MMP2_MUX_SSP4,
92 MMP2_MUX_MMC1,
93 MMP2_MUX_MMC2,
94 MMP2_MUX_MMC3,
95 MMP2_MUX_MMC4,
96 MMP2_MUX_ULPI,
97 MMP2_MUX_AC,
98 MMP2_MUX_CA,
99 MMP2_MUX_PWM,
100 MMP2_MUX_USIM,
101 MMP2_MUX_TIPU,
102 MMP2_MUX_PLL,
103 MMP2_MUX_NAND,
104 MMP2_MUX_FSIC,
105 MMP2_MUX_SLEEP_IND,
106 MMP2_MUX_EXT_DMA,
107 MMP2_MUX_ONE_WIRE,
108 MMP2_MUX_LCD,
109 MMP2_MUX_SMC,
110 MMP2_MUX_SMC_INT,
111 MMP2_MUX_MSP,
112 MMP2_MUX_G_CLKOUT,
113 MMP2_MUX_32K_CLKOUT,
114 MMP2_MUX_PRI_JTAG,
115 MMP2_MUX_AAS_JTAG,
116 MMP2_MUX_AAS_GPIO,
117 MMP2_MUX_AAS_SPI,
118 MMP2_MUX_AAS_TWSI,
119 MMP2_MUX_AAS_DEU_EX,
120 MMP2_MUX_NONE = 0xffff,
121};
122
123static struct pinctrl_pin_desc mmp2_pads[] = {
124 /*
125 * The name indicates function 0 of this pin.
126 * After reset, function 0 is the default function of pin.
127 */
128 PINCTRL_PIN(GPIO0, "GPIO0"),
129 PINCTRL_PIN(GPIO1, "GPIO1"),
130 PINCTRL_PIN(GPIO2, "GPIO2"),
131 PINCTRL_PIN(GPIO3, "GPIO3"),
132 PINCTRL_PIN(GPIO4, "GPIO4"),
133 PINCTRL_PIN(GPIO5, "GPIO5"),
134 PINCTRL_PIN(GPIO6, "GPIO6"),
135 PINCTRL_PIN(GPIO7, "GPIO7"),
136 PINCTRL_PIN(GPIO8, "GPIO8"),
137 PINCTRL_PIN(GPIO9, "GPIO9"),
138 PINCTRL_PIN(GPIO10, "GPIO10"),
139 PINCTRL_PIN(GPIO11, "GPIO11"),
140 PINCTRL_PIN(GPIO12, "GPIO12"),
141 PINCTRL_PIN(GPIO13, "GPIO13"),
142 PINCTRL_PIN(GPIO14, "GPIO14"),
143 PINCTRL_PIN(GPIO15, "GPIO15"),
144 PINCTRL_PIN(GPIO16, "GPIO16"),
145 PINCTRL_PIN(GPIO17, "GPIO17"),
146 PINCTRL_PIN(GPIO18, "GPIO18"),
147 PINCTRL_PIN(GPIO19, "GPIO19"),
148 PINCTRL_PIN(GPIO20, "GPIO20"),
149 PINCTRL_PIN(GPIO21, "GPIO21"),
150 PINCTRL_PIN(GPIO22, "GPIO22"),
151 PINCTRL_PIN(GPIO23, "GPIO23"),
152 PINCTRL_PIN(GPIO24, "GPIO24"),
153 PINCTRL_PIN(GPIO25, "GPIO25"),
154 PINCTRL_PIN(GPIO26, "GPIO26"),
155 PINCTRL_PIN(GPIO27, "GPIO27"),
156 PINCTRL_PIN(GPIO28, "GPIO28"),
157 PINCTRL_PIN(GPIO29, "GPIO29"),
158 PINCTRL_PIN(GPIO30, "GPIO30"),
159 PINCTRL_PIN(GPIO31, "GPIO31"),
160 PINCTRL_PIN(GPIO32, "GPIO32"),
161 PINCTRL_PIN(GPIO33, "GPIO33"),
162 PINCTRL_PIN(GPIO34, "GPIO34"),
163 PINCTRL_PIN(GPIO35, "GPIO35"),
164 PINCTRL_PIN(GPIO36, "GPIO36"),
165 PINCTRL_PIN(GPIO37, "GPIO37"),
166 PINCTRL_PIN(GPIO38, "GPIO38"),
167 PINCTRL_PIN(GPIO39, "GPIO39"),
168 PINCTRL_PIN(GPIO40, "GPIO40"),
169 PINCTRL_PIN(GPIO41, "GPIO41"),
170 PINCTRL_PIN(GPIO42, "GPIO42"),
171 PINCTRL_PIN(GPIO43, "GPIO43"),
172 PINCTRL_PIN(GPIO44, "GPIO44"),
173 PINCTRL_PIN(GPIO45, "GPIO45"),
174 PINCTRL_PIN(GPIO46, "GPIO46"),
175 PINCTRL_PIN(GPIO47, "GPIO47"),
176 PINCTRL_PIN(GPIO48, "GPIO48"),
177 PINCTRL_PIN(GPIO49, "GPIO49"),
178 PINCTRL_PIN(GPIO50, "GPIO50"),
179 PINCTRL_PIN(GPIO51, "GPIO51"),
180 PINCTRL_PIN(GPIO52, "GPIO52"),
181 PINCTRL_PIN(GPIO53, "GPIO53"),
182 PINCTRL_PIN(GPIO54, "GPIO54"),
183 PINCTRL_PIN(GPIO55, "GPIO55"),
184 PINCTRL_PIN(GPIO56, "GPIO56"),
185 PINCTRL_PIN(GPIO57, "GPIO57"),
186 PINCTRL_PIN(GPIO58, "GPIO58"),
187 PINCTRL_PIN(GPIO59, "GPIO59"),
188 PINCTRL_PIN(GPIO60, "GPIO60"),
189 PINCTRL_PIN(GPIO61, "GPIO61"),
190 PINCTRL_PIN(GPIO62, "GPIO62"),
191 PINCTRL_PIN(GPIO63, "GPIO63"),
192 PINCTRL_PIN(GPIO64, "GPIO64"),
193 PINCTRL_PIN(GPIO65, "GPIO65"),
194 PINCTRL_PIN(GPIO66, "GPIO66"),
195 PINCTRL_PIN(GPIO67, "GPIO67"),
196 PINCTRL_PIN(GPIO68, "GPIO68"),
197 PINCTRL_PIN(GPIO69, "GPIO69"),
198 PINCTRL_PIN(GPIO70, "GPIO70"),
199 PINCTRL_PIN(GPIO71, "GPIO71"),
200 PINCTRL_PIN(GPIO72, "GPIO72"),
201 PINCTRL_PIN(GPIO73, "GPIO73"),
202 PINCTRL_PIN(GPIO74, "GPIO74"),
203 PINCTRL_PIN(GPIO75, "GPIO75"),
204 PINCTRL_PIN(GPIO76, "GPIO76"),
205 PINCTRL_PIN(GPIO77, "GPIO77"),
206 PINCTRL_PIN(GPIO78, "GPIO78"),
207 PINCTRL_PIN(GPIO79, "GPIO79"),
208 PINCTRL_PIN(GPIO80, "GPIO80"),
209 PINCTRL_PIN(GPIO81, "GPIO81"),
210 PINCTRL_PIN(GPIO82, "GPIO82"),
211 PINCTRL_PIN(GPIO83, "GPIO83"),
212 PINCTRL_PIN(GPIO84, "GPIO84"),
213 PINCTRL_PIN(GPIO85, "GPIO85"),
214 PINCTRL_PIN(GPIO86, "GPIO86"),
215 PINCTRL_PIN(GPIO87, "GPIO87"),
216 PINCTRL_PIN(GPIO88, "GPIO88"),
217 PINCTRL_PIN(GPIO89, "GPIO89"),
218 PINCTRL_PIN(GPIO90, "GPIO90"),
219 PINCTRL_PIN(GPIO91, "GPIO91"),
220 PINCTRL_PIN(GPIO92, "GPIO92"),
221 PINCTRL_PIN(GPIO93, "GPIO93"),
222 PINCTRL_PIN(GPIO94, "GPIO94"),
223 PINCTRL_PIN(GPIO95, "GPIO95"),
224 PINCTRL_PIN(GPIO96, "GPIO96"),
225 PINCTRL_PIN(GPIO97, "GPIO97"),
226 PINCTRL_PIN(GPIO98, "GPIO98"),
227 PINCTRL_PIN(GPIO99, "GPIO99"),
228 PINCTRL_PIN(GPIO100, "GPIO100"),
229 PINCTRL_PIN(GPIO101, "GPIO101"),
230 PINCTRL_PIN(GPIO102, "GPIO102"),
231 PINCTRL_PIN(GPIO103, "GPIO103"),
232 PINCTRL_PIN(GPIO104, "GPIO104"),
233 PINCTRL_PIN(GPIO105, "GPIO105"),
234 PINCTRL_PIN(GPIO106, "GPIO106"),
235 PINCTRL_PIN(GPIO107, "GPIO107"),
236 PINCTRL_PIN(GPIO108, "GPIO108"),
237 PINCTRL_PIN(GPIO109, "GPIO109"),
238 PINCTRL_PIN(GPIO110, "GPIO110"),
239 PINCTRL_PIN(GPIO111, "GPIO111"),
240 PINCTRL_PIN(GPIO112, "GPIO112"),
241 PINCTRL_PIN(GPIO113, "GPIO113"),
242 PINCTRL_PIN(GPIO114, "GPIO114"),
243 PINCTRL_PIN(GPIO115, "GPIO115"),
244 PINCTRL_PIN(GPIO116, "GPIO116"),
245 PINCTRL_PIN(GPIO117, "GPIO117"),
246 PINCTRL_PIN(GPIO118, "GPIO118"),
247 PINCTRL_PIN(GPIO119, "GPIO119"),
248 PINCTRL_PIN(GPIO120, "GPIO120"),
249 PINCTRL_PIN(GPIO121, "GPIO121"),
250 PINCTRL_PIN(GPIO122, "GPIO122"),
251 PINCTRL_PIN(GPIO123, "GPIO123"),
252 PINCTRL_PIN(GPIO124, "GPIO124"),
253 PINCTRL_PIN(GPIO125, "GPIO125"),
254 PINCTRL_PIN(GPIO126, "GPIO126"),
255 PINCTRL_PIN(GPIO127, "GPIO127"),
256 PINCTRL_PIN(GPIO128, "GPIO128"),
257 PINCTRL_PIN(GPIO129, "GPIO129"),
258 PINCTRL_PIN(GPIO130, "GPIO130"),
259 PINCTRL_PIN(GPIO131, "GPIO131"),
260 PINCTRL_PIN(GPIO132, "GPIO132"),
261 PINCTRL_PIN(GPIO133, "GPIO133"),
262 PINCTRL_PIN(GPIO134, "GPIO134"),
263 PINCTRL_PIN(GPIO135, "GPIO135"),
264 PINCTRL_PIN(GPIO136, "GPIO136"),
265 PINCTRL_PIN(GPIO137, "GPIO137"),
266 PINCTRL_PIN(GPIO138, "GPIO138"),
267 PINCTRL_PIN(GPIO139, "GPIO139"),
268 PINCTRL_PIN(GPIO140, "GPIO140"),
269 PINCTRL_PIN(GPIO141, "GPIO141"),
270 PINCTRL_PIN(GPIO142, "GPIO142"),
271 PINCTRL_PIN(GPIO143, "GPIO143"),
272 PINCTRL_PIN(GPIO144, "GPIO144"),
273 PINCTRL_PIN(GPIO145, "GPIO145"),
274 PINCTRL_PIN(GPIO146, "GPIO146"),
275 PINCTRL_PIN(GPIO147, "GPIO147"),
276 PINCTRL_PIN(GPIO148, "GPIO148"),
277 PINCTRL_PIN(GPIO149, "GPIO149"),
278 PINCTRL_PIN(GPIO150, "GPIO150"),
279 PINCTRL_PIN(GPIO151, "GPIO151"),
280 PINCTRL_PIN(GPIO152, "GPIO152"),
281 PINCTRL_PIN(GPIO153, "GPIO153"),
282 PINCTRL_PIN(GPIO154, "GPIO154"),
283 PINCTRL_PIN(GPIO155, "GPIO155"),
284 PINCTRL_PIN(GPIO156, "GPIO156"),
285 PINCTRL_PIN(GPIO157, "GPIO157"),
286 PINCTRL_PIN(GPIO158, "GPIO158"),
287 PINCTRL_PIN(GPIO159, "GPIO159"),
288 PINCTRL_PIN(GPIO160, "GPIO160"),
289 PINCTRL_PIN(GPIO161, "GPIO161"),
290 PINCTRL_PIN(GPIO162, "GPIO162"),
291 PINCTRL_PIN(GPIO163, "GPIO163"),
292 PINCTRL_PIN(GPIO164, "GPIO164"),
293 PINCTRL_PIN(GPIO165, "GPIO165"),
294 PINCTRL_PIN(GPIO166, "GPIO166"),
295 PINCTRL_PIN(GPIO167, "GPIO167"),
296 PINCTRL_PIN(GPIO168, "GPIO168"),
297 PINCTRL_PIN(TWSI4_SCL, "TWSI4_SCL"),
298 PINCTRL_PIN(TWSI4_SDA, "TWSI4_SDA"),
299 PINCTRL_PIN(G_CLKREQ, "G_CLKREQ"),
300 PINCTRL_PIN(VCXO_REQ, "VCXO_REQ"),
301 PINCTRL_PIN(VCXO_OUT, "VCXO_OUT"),
302};
303
304struct pxa3xx_mfp_pin mmp2_mfp[] = {
305 /* pin offs f0 f1 f2 f3 f4 f5 f6 f7 */
306 MFPR_MMP2(GPIO0, 0x054, GPIO, KP_MK, NONE, SPI, NONE, NONE, NONE, NONE),
307 MFPR_MMP2(GPIO1, 0x058, GPIO, KP_MK, NONE, SPI, NONE, NONE, NONE, NONE),
308 MFPR_MMP2(GPIO2, 0x05C, GPIO, KP_MK, NONE, SPI, NONE, NONE, NONE, NONE),
309 MFPR_MMP2(GPIO3, 0x060, GPIO, KP_MK, NONE, SPI, NONE, NONE, NONE, NONE),
310 MFPR_MMP2(GPIO4, 0x064, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE),
311 MFPR_MMP2(GPIO5, 0x068, GPIO, KP_MK, NONE, SPI, NONE, NONE, NONE, NONE),
312 MFPR_MMP2(GPIO6, 0x06C, GPIO, KP_MK, NONE, SPI, NONE, NONE, NONE, NONE),
313 MFPR_MMP2(GPIO7, 0x070, GPIO, KP_MK, NONE, SPI, NONE, NONE, NONE, NONE),
314 MFPR_MMP2(GPIO8, 0x074, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE),
315 MFPR_MMP2(GPIO9, 0x078, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE),
316 MFPR_MMP2(GPIO10, 0x07C, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE),
317 MFPR_MMP2(GPIO11, 0x080, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE),
318 MFPR_MMP2(GPIO12, 0x084, GPIO, KP_MK, NONE, CCIC1, NONE, NONE, NONE, NONE),
319 MFPR_MMP2(GPIO13, 0x088, GPIO, KP_MK, NONE, CCIC1, NONE, NONE, NONE, NONE),
320 MFPR_MMP2(GPIO14, 0x08C, GPIO, KP_MK, NONE, CCIC1, NONE, NONE, NONE, NONE),
321 MFPR_MMP2(GPIO15, 0x090, GPIO, KP_MK, KP_DK, CCIC1, NONE, NONE, NONE, NONE),
322 MFPR_MMP2(GPIO16, 0x094, GPIO, KP_DK, ROT, CCIC1, NONE, NONE, NONE, NONE),
323 MFPR_MMP2(GPIO17, 0x098, GPIO, KP_DK, ROT, CCIC1, NONE, NONE, NONE, NONE),
324 MFPR_MMP2(GPIO18, 0x09C, GPIO, KP_DK, ROT, CCIC1, NONE, NONE, NONE, NONE),
325 MFPR_MMP2(GPIO19, 0x0A0, GPIO, KP_DK, ROT, CCIC1, NONE, NONE, NONE, NONE),
326 MFPR_MMP2(GPIO20, 0x0A4, GPIO, KP_DK, TB, CCIC1, NONE, NONE, NONE, NONE),
327 MFPR_MMP2(GPIO21, 0x0A8, GPIO, KP_DK, TB, CCIC1, NONE, NONE, NONE, NONE),
328 MFPR_MMP2(GPIO22, 0x0AC, GPIO, KP_DK, TB, CCIC1, NONE, NONE, NONE, NONE),
329 MFPR_MMP2(GPIO23, 0x0B0, GPIO, KP_DK, TB, CCIC1, NONE, NONE, NONE, NONE),
330 MFPR_MMP2(GPIO24, 0x0B4, GPIO, I2S, VCXO_OUT, NONE, NONE, NONE, NONE, NONE),
331 MFPR_MMP2(GPIO25, 0x0B8, GPIO, I2S, HDMI, SSPA2, NONE, NONE, NONE, NONE),
332 MFPR_MMP2(GPIO26, 0x0BC, GPIO, I2S, HDMI, SSPA2, NONE, NONE, NONE, NONE),
333 MFPR_MMP2(GPIO27, 0x0C0, GPIO, I2S, HDMI, SSPA2, NONE, NONE, NONE, NONE),
334 MFPR_MMP2(GPIO28, 0x0C4, GPIO, I2S, NONE, SSPA2, NONE, NONE, NONE, NONE),
335 MFPR_MMP2(GPIO29, 0x0C8, GPIO, UART1, KP_MK, NONE, NONE, NONE, AAS_SPI, NONE),
336 MFPR_MMP2(GPIO30, 0x0CC, GPIO, UART1, KP_MK, NONE, NONE, NONE, AAS_SPI, NONE),
337 MFPR_MMP2(GPIO31, 0x0D0, GPIO, UART1, KP_MK, NONE, NONE, NONE, AAS_SPI, NONE),
338 MFPR_MMP2(GPIO32, 0x0D4, GPIO, UART1, KP_MK, NONE, NONE, NONE, AAS_SPI, NONE),
339 MFPR_MMP2(GPIO33, 0x0D8, GPIO, SSPA2, I2S, NONE, NONE, NONE, NONE, NONE),
340 MFPR_MMP2(GPIO34, 0x0DC, GPIO, SSPA2, I2S, NONE, NONE, NONE, NONE, NONE),
341 MFPR_MMP2(GPIO35, 0x0E0, GPIO, SSPA2, I2S, NONE, NONE, NONE, NONE, NONE),
342 MFPR_MMP2(GPIO36, 0x0E4, GPIO, SSPA2, I2S, NONE, NONE, NONE, NONE, NONE),
343 MFPR_MMP2(GPIO37, 0x0E8, GPIO, MMC2, SSP1, TWSI2, UART2, UART3, AAS_SPI, AAS_TWSI),
344 MFPR_MMP2(GPIO38, 0x0EC, GPIO, MMC2, SSP1, TWSI2, UART2, UART3, AAS_SPI, AAS_TWSI),
345 MFPR_MMP2(GPIO39, 0x0F0, GPIO, MMC2, SSP1, TWSI2, UART2, UART3, AAS_SPI, AAS_TWSI),
346 MFPR_MMP2(GPIO40, 0x0F4, GPIO, MMC2, SSP1, TWSI2, UART2, UART3, AAS_SPI, AAS_TWSI),
347 MFPR_MMP2(GPIO41, 0x0F8, GPIO, MMC2, TWSI5, NONE, NONE, NONE, NONE, NONE),
348 MFPR_MMP2(GPIO42, 0x0FC, GPIO, MMC2, TWSI5, NONE, NONE, NONE, NONE, NONE),
349 MFPR_MMP2(GPIO43, 0x100, GPIO, TWSI2, UART4, SSP1, UART2, UART3, NONE, AAS_TWSI),
350 MFPR_MMP2(GPIO44, 0x104, GPIO, TWSI2, UART4, SSP1, UART2, UART3, NONE, AAS_TWSI),
351 MFPR_MMP2(GPIO45, 0x108, GPIO, UART1, UART4, SSP1, UART2, UART3, NONE, NONE),
352 MFPR_MMP2(GPIO46, 0x10C, GPIO, UART1, UART4, SSP1, UART2, UART3, NONE, NONE),
353 MFPR_MMP2(GPIO47, 0x110, GPIO, UART2, SSP2, TWSI6, CAM2, AAS_SPI, AAS_GPIO, NONE),
354 MFPR_MMP2(GPIO48, 0x114, GPIO, UART2, SSP2, TWSI6, CAM2, AAS_SPI, AAS_GPIO, NONE),
355 MFPR_MMP2(GPIO49, 0x118, GPIO, UART2, SSP2, PWM, CCIC2, AAS_SPI, NONE, NONE),
356 MFPR_MMP2(GPIO50, 0x11C, GPIO, UART2, SSP2, PWM, CCIC2, AAS_SPI, NONE, NONE),
357 MFPR_MMP2(GPIO51, 0x120, GPIO, UART3, ROT, AAS_GPIO, PWM, NONE, NONE, NONE),
358 MFPR_MMP2(GPIO52, 0x124, GPIO, UART3, ROT, AAS_GPIO, PWM, NONE, NONE, NONE),
359 MFPR_MMP2(GPIO53, 0x128, GPIO, UART3, TWSI2, VCXO_REQ, NONE, PWM, NONE, AAS_TWSI),
360 MFPR_MMP2(GPIO54, 0x12C, GPIO, UART3, TWSI2, VCXO_OUT, HDMI, PWM, NONE, AAS_TWSI),
361 MFPR_MMP2(GPIO55, 0x130, GPIO, SSP2, SSP1, UART2, ROT, TWSI2, SSP3, AAS_TWSI),
362 MFPR_MMP2(GPIO56, 0x134, GPIO, SSP2, SSP1, UART2, ROT, TWSI2, KP_DK, AAS_TWSI),
363 MFPR_MMP2(GPIO57, 0x138, GPIO, SSP2_RX, SSP1_TXRX, SSP2_FRM, SSP1_RX, VCXO_REQ, KP_DK, NONE),
364 MFPR_MMP2(GPIO58, 0x13C, GPIO, SSP2, SSP1_RX, SSP1_FRM, SSP1_TXRX, VCXO_REQ, KP_DK, NONE),
365 MFPR_MMP2(GPIO59, 0x280, GPIO, CCIC1, ULPI, MMC3, CCIC2, UART3, UART4, NONE),
366 MFPR_MMP2(GPIO60, 0x284, GPIO, CCIC1, ULPI, MMC3, CCIC2, UART3, UART4, NONE),
367 MFPR_MMP2(GPIO61, 0x288, GPIO, CCIC1, ULPI, MMC3, CCIC2, UART3, HDMI, NONE),
368 MFPR_MMP2(GPIO62, 0x28C, GPIO, CCIC1, ULPI, MMC3, CCIC2, UART3, NONE, NONE),
369 MFPR_MMP2(GPIO63, 0x290, GPIO, CCIC1, ULPI, MMC3, CCIC2, MSP, UART4, NONE),
370 MFPR_MMP2(GPIO64, 0x294, GPIO, CCIC1, ULPI, MMC3, CCIC2, MSP, UART4, NONE),
371 MFPR_MMP2(GPIO65, 0x298, GPIO, CCIC1, ULPI, MMC3, CCIC2, MSP, UART4, NONE),
372 MFPR_MMP2(GPIO66, 0x29C, GPIO, CCIC1, ULPI, MMC3, CCIC2, MSP, UART4, NONE),
373 MFPR_MMP2(GPIO67, 0x2A0, GPIO, CCIC1, ULPI, MMC3, CCIC2, MSP, NONE, NONE),
374 MFPR_MMP2(GPIO68, 0x2A4, GPIO, CCIC1, ULPI, MMC3, CCIC2, MSP, LCD, NONE),
375 MFPR_MMP2(GPIO69, 0x2A8, GPIO, CCIC1, ULPI, MMC3, CCIC2, NONE, LCD, NONE),
376 MFPR_MMP2(GPIO70, 0x2AC, GPIO, CCIC1, ULPI, MMC3, CCIC2, MSP, LCD, NONE),
377 MFPR_MMP2(GPIO71, 0x2B0, GPIO, TWSI3, NONE, PWM, NONE, NONE, LCD, AAS_TWSI),
378 MFPR_MMP2(GPIO72, 0x2B4, GPIO, TWSI3, HDMI, PWM, NONE, NONE, LCD, AAS_TWSI),
379 MFPR_MMP2(GPIO73, 0x2B8, GPIO, VCXO_REQ, 32K_CLKOUT, PWM, VCXO_OUT, NONE, LCD, NONE),
380 MFPR_MMP2(GPIO74, 0x170, GPIO, LCD, SMC, MMC4, SSP3, UART2, UART4, TIPU),
381 MFPR_MMP2(GPIO75, 0x174, GPIO, LCD, SMC, MMC4, SSP3, UART2, UART4, TIPU),
382 MFPR_MMP2(GPIO76, 0x178, GPIO, LCD, SMC, MMC4, SSP3, UART2, UART4, TIPU),
383 MFPR_MMP2(GPIO77, 0x17C, GPIO, LCD, SMC, MMC4, SSP3, UART2, UART4, TIPU),
384 MFPR_MMP2(GPIO78, 0x180, GPIO, LCD, HDMI, MMC4, NONE, SSP4, AAS_SPI, TIPU),
385 MFPR_MMP2(GPIO79, 0x184, GPIO, LCD, AAS_GPIO, MMC4, NONE, SSP4, AAS_SPI, TIPU),
386 MFPR_MMP2(GPIO80, 0x188, GPIO, LCD, AAS_GPIO, MMC4, NONE, SSP4, AAS_SPI, TIPU),
387 MFPR_MMP2(GPIO81, 0x18C, GPIO, LCD, AAS_GPIO, MMC4, NONE, SSP4, AAS_SPI, TIPU),
388 MFPR_MMP2(GPIO82, 0x190, GPIO, LCD, NONE, MMC4, NONE, NONE, CCIC2, TIPU),
389 MFPR_MMP2(GPIO83, 0x194, GPIO, LCD, NONE, MMC4, NONE, NONE, CCIC2, TIPU),
390 MFPR_MMP2(GPIO84, 0x198, GPIO, LCD, SMC, MMC2, NONE, TWSI5, AAS_TWSI, TIPU),
391 MFPR_MMP2(GPIO85, 0x19C, GPIO, LCD, SMC, MMC2, NONE, TWSI5, AAS_TWSI, TIPU),
392 MFPR_MMP2(GPIO86, 0x1A0, GPIO, LCD, SMC, MMC2, NONE, TWSI6, CCIC2, TIPU),
393 MFPR_MMP2(GPIO87, 0x1A4, GPIO, LCD, SMC, MMC2, NONE, TWSI6, CCIC2, TIPU),
394 MFPR_MMP2(GPIO88, 0x1A8, GPIO, LCD, AAS_GPIO, MMC2, NONE, NONE, CCIC2, TIPU),
395 MFPR_MMP2(GPIO89, 0x1AC, GPIO, LCD, AAS_GPIO, MMC2, NONE, NONE, CCIC2, TIPU),
396 MFPR_MMP2(GPIO90, 0x1B0, GPIO, LCD, AAS_GPIO, MMC2, NONE, NONE, CCIC2, TIPU),
397 MFPR_MMP2(GPIO91, 0x1B4, GPIO, LCD, AAS_GPIO, MMC2, NONE, NONE, CCIC2, TIPU),
398 MFPR_MMP2(GPIO92, 0x1B8, GPIO, LCD, AAS_GPIO, MMC2, NONE, NONE, CCIC2, TIPU),
399 MFPR_MMP2(GPIO93, 0x1BC, GPIO, LCD, AAS_GPIO, MMC2, NONE, NONE, CCIC2, TIPU),
400 MFPR_MMP2(GPIO94, 0x1C0, GPIO, LCD, AAS_GPIO, SPI, NONE, AAS_SPI, CCIC2, TIPU),
401 MFPR_MMP2(GPIO95, 0x1C4, GPIO, LCD, TWSI3, SPI, AAS_DEU_EX, AAS_SPI, CCIC2, TIPU),
402 MFPR_MMP2(GPIO96, 0x1C8, GPIO, LCD, TWSI3, SPI, AAS_DEU_EX, AAS_SPI, NONE, TIPU),
403 MFPR_MMP2(GPIO97, 0x1CC, GPIO, LCD, TWSI6, SPI, AAS_DEU_EX, AAS_SPI, NONE, TIPU),
404 MFPR_MMP2(GPIO98, 0x1D0, GPIO, LCD, TWSI6, SPI, ONE_WIRE, NONE, NONE, TIPU),
405 MFPR_MMP2(GPIO99, 0x1D4, GPIO, LCD, SMC, SPI, TWSI5, NONE, NONE, TIPU),
406 MFPR_MMP2(GPIO100, 0x1D8, GPIO, LCD, SMC, SPI, TWSI5, NONE, NONE, TIPU),
407 MFPR_MMP2(GPIO101, 0x1DC, GPIO, LCD, SMC, SPI, NONE, NONE, NONE, TIPU),
408 MFPR_MMP2(GPIO102, 0x000, USIM, GPIO, FSIC, KP_DK, LCD, NONE, NONE, NONE),
409 MFPR_MMP2(GPIO103, 0x004, USIM, GPIO, FSIC, KP_DK, LCD, NONE, NONE, NONE),
410 MFPR_MMP2(GPIO104, 0x1FC, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE),
411 MFPR_MMP2(GPIO105, 0x1F8, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE),
412 MFPR_MMP2(GPIO106, 0x1F4, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE),
413 MFPR_MMP2(GPIO107, 0x1F0, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE),
414 MFPR_MMP2(GPIO108, 0x21C, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE),
415 MFPR_MMP2(GPIO109, 0x218, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE),
416 MFPR_MMP2(GPIO110, 0x214, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE),
417 MFPR_MMP2(GPIO111, 0x200, NAND, GPIO, MMC3, NONE, NONE, NONE, NONE, NONE),
418 MFPR_MMP2(GPIO112, 0x244, NAND, GPIO, MMC3, SMC, NONE, NONE, NONE, NONE),
419 MFPR_MMP2(GPIO113, 0x25C, SMC, GPIO, EXT_DMA, MMC3, SMC, HDMI, NONE, NONE),
420 MFPR_MMP2(GPIO114, 0x164, G_CLKOUT, 32K_CLKOUT, HDMI, NONE, NONE, NONE, NONE, NONE),
421 MFPR_MMP2(GPIO115, 0x260, GPIO, NONE, AC, UART4, UART3, SSP1, NONE, NONE),
422 MFPR_MMP2(GPIO116, 0x264, GPIO, NONE, AC, UART4, UART3, SSP1, NONE, NONE),
423 MFPR_MMP2(GPIO117, 0x268, GPIO, NONE, AC, UART4, UART3, SSP1, NONE, NONE),
424 MFPR_MMP2(GPIO118, 0x26C, GPIO, NONE, AC, UART4, UART3, SSP1, NONE, NONE),
425 MFPR_MMP2(GPIO119, 0x270, GPIO, NONE, CA, SSP3, NONE, NONE, NONE, NONE),
426 MFPR_MMP2(GPIO120, 0x274, GPIO, NONE, CA, SSP3, NONE, NONE, NONE, NONE),
427 MFPR_MMP2(GPIO121, 0x278, GPIO, NONE, CA, SSP3, NONE, NONE, NONE, NONE),
428 MFPR_MMP2(GPIO122, 0x27C, GPIO, NONE, CA, SSP3, NONE, NONE, NONE, NONE),
429 MFPR_MMP2(GPIO123, 0x148, GPIO, SLEEP_IND, ONE_WIRE, 32K_CLKOUT, NONE, NONE, NONE, NONE),
430 MFPR_MMP2(GPIO124, 0x00C, GPIO, MMC1, LCD, MMC3, NAND, NONE, NONE, NONE),
431 MFPR_MMP2(GPIO125, 0x010, GPIO, MMC1, LCD, MMC3, NAND, NONE, NONE, NONE),
432 MFPR_MMP2(GPIO126, 0x014, GPIO, MMC1, LCD, MMC3, NAND, NONE, NONE, NONE),
433 MFPR_MMP2(GPIO127, 0x018, GPIO, NONE, LCD, MMC3, NAND, NONE, NONE, NONE),
434 MFPR_MMP2(GPIO128, 0x01C, GPIO, NONE, LCD, MMC3, NAND, NONE, NONE, NONE),
435 MFPR_MMP2(GPIO129, 0x020, GPIO, MMC1, LCD, MMC3, NAND, NONE, NONE, NONE),
436 MFPR_MMP2(GPIO130, 0x024, GPIO, MMC1, LCD, MMC3, NAND, NONE, NONE, NONE),
437 MFPR_MMP2(GPIO131, 0x028, GPIO, MMC1, NONE, MSP, NONE, NONE, NONE, NONE),
438 MFPR_MMP2(GPIO132, 0x02C, GPIO, MMC1, PRI_JTAG, MSP, SSP3, AAS_JTAG, NONE, NONE),
439 MFPR_MMP2(GPIO133, 0x030, GPIO, MMC1, PRI_JTAG, MSP, SSP3, AAS_JTAG, NONE, NONE),
440 MFPR_MMP2(GPIO134, 0x034, GPIO, MMC1, PRI_JTAG, MSP, SSP3, AAS_JTAG, NONE, NONE),
441 MFPR_MMP2(GPIO135, 0x038, GPIO, NONE, LCD, MMC3, NAND, NONE, NONE, NONE),
442 MFPR_MMP2(GPIO136, 0x03C, GPIO, MMC1, PRI_JTAG, MSP, SSP3, AAS_JTAG, NONE, NONE),
443 MFPR_MMP2(GPIO137, 0x040, GPIO, HDMI, LCD, MSP, NONE, NONE, NONE, NONE),
444 MFPR_MMP2(GPIO138, 0x044, GPIO, NONE, LCD, MMC3, SMC, NONE, NONE, NONE),
445 MFPR_MMP2(GPIO139, 0x048, GPIO, MMC1, PRI_JTAG, MSP, NONE, AAS_JTAG, NONE, NONE),
446 MFPR_MMP2(GPIO140, 0x04C, GPIO, MMC1, LCD, NONE, NONE, UART2, UART1, NONE),
447 MFPR_MMP2(GPIO141, 0x050, GPIO, MMC1, LCD, NONE, NONE, UART2, UART1, NONE),
448 MFPR_MMP2(GPIO142, 0x008, USIM, GPIO, FSIC, KP_DK, NONE, NONE, NONE, NONE),
449 MFPR_MMP2(GPIO143, 0x220, NAND, GPIO, SMC, NONE, NAND, NONE, NONE, NONE),
450 MFPR_MMP2(GPIO144, 0x224, NAND, GPIO, SMC_INT, SMC, NAND, NONE, NONE, NONE),
451 MFPR_MMP2(GPIO145, 0x228, SMC, GPIO, NONE, NONE, SMC, NONE, NONE, NONE),
452 MFPR_MMP2(GPIO146, 0x22C, SMC, GPIO, NONE, NONE, SMC, NONE, NONE, NONE),
453 MFPR_MMP2(GPIO147, 0x230, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE),
454 MFPR_MMP2(GPIO148, 0x234, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE),
455 MFPR_MMP2(GPIO149, 0x238, NAND, GPIO, NONE, NONE, NONE, NONE, NONE, NONE),
456 MFPR_MMP2(GPIO150, 0x23C, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE),
457 MFPR_MMP2(GPIO151, 0x240, SMC, GPIO, MMC3, NONE, NONE, NONE, NONE, NONE),
458 MFPR_MMP2(GPIO152, 0x248, SMC, GPIO, NONE, NONE, SMC, NONE, NONE, NONE),
459 MFPR_MMP2(GPIO153, 0x24C, SMC, GPIO, NONE, NONE, SMC, NONE, NONE, NONE),
460 MFPR_MMP2(GPIO154, 0x254, SMC_INT, GPIO, SMC, NONE, NAND, NONE, NONE, NONE),
461 MFPR_MMP2(GPIO155, 0x258, EXT_DMA, GPIO, SMC, NONE, EXT_DMA, NONE, NONE, NONE),
462 MFPR_MMP2(GPIO156, 0x14C, PRI_JTAG, GPIO, PWM, NONE, NONE, NONE, NONE, NONE),
463 MFPR_MMP2(GPIO157, 0x150, PRI_JTAG, GPIO, PWM, NONE, NONE, NONE, NONE, NONE),
464 MFPR_MMP2(GPIO158, 0x154, PRI_JTAG, GPIO, PWM, NONE, NONE, NONE, NONE, NONE),
465 MFPR_MMP2(GPIO159, 0x158, PRI_JTAG, GPIO, PWM, NONE, NONE, NONE, NONE, NONE),
466 MFPR_MMP2(GPIO160, 0x250, NAND, GPIO, SMC, NONE, NAND, NONE, NONE, NONE),
467 MFPR_MMP2(GPIO161, 0x210, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE),
468 MFPR_MMP2(GPIO162, 0x20C, NAND, GPIO, MMC3, NONE, NONE, NONE, NONE, NONE),
469 MFPR_MMP2(GPIO163, 0x208, NAND, GPIO, MMC3, NONE, NONE, NONE, NONE, NONE),
470 MFPR_MMP2(GPIO164, 0x204, NAND, GPIO, MMC3, NONE, NONE, NONE, NONE, NONE),
471 MFPR_MMP2(GPIO165, 0x1EC, NAND, GPIO, MMC3, NONE, NONE, NONE, NONE, NONE),
472 MFPR_MMP2(GPIO166, 0x1E8, NAND, GPIO, MMC3, NONE, NONE, NONE, NONE, NONE),
473 MFPR_MMP2(GPIO167, 0x1E4, NAND, GPIO, MMC3, NONE, NONE, NONE, NONE, NONE),
474 MFPR_MMP2(GPIO168, 0x1E0, NAND, GPIO, MMC3, NONE, NONE, NONE, NONE, NONE),
475 MFPR_MMP2(TWSI4_SCL, 0x2BC, TWSI4, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
476 MFPR_MMP2(TWSI4_SDA, 0x2C0, TWSI4, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
477 MFPR_MMP2(G_CLKREQ, 0x160, G_CLKREQ, ONE_WIRE, NONE, NONE, NONE, NONE, NONE, NONE),
478 MFPR_MMP2(VCXO_REQ, 0x168, VCXO_REQ, ONE_WIRE, PLL, NONE, NONE, NONE, NONE, NONE),
479 MFPR_MMP2(VCXO_OUT, 0x16C, VCXO_OUT, 32K_CLKOUT, NONE, NONE, NONE, NONE, NONE, NONE),
480};
481
482static const unsigned mmp2_uart1_pin1[] = {GPIO29, GPIO30, GPIO31, GPIO32};
483static const unsigned mmp2_uart1_pin2[] = {GPIO45, GPIO46};
484static const unsigned mmp2_uart1_pin3[] = {GPIO140, GPIO141};
485static const unsigned mmp2_uart2_pin1[] = {GPIO37, GPIO38, GPIO39, GPIO40};
486static const unsigned mmp2_uart2_pin2[] = {GPIO43, GPIO44, GPIO45, GPIO46};
487static const unsigned mmp2_uart2_pin3[] = {GPIO47, GPIO48, GPIO49, GPIO50};
488static const unsigned mmp2_uart2_pin4[] = {GPIO74, GPIO75, GPIO76, GPIO77};
489static const unsigned mmp2_uart2_pin5[] = {GPIO55, GPIO56};
490static const unsigned mmp2_uart2_pin6[] = {GPIO140, GPIO141};
491static const unsigned mmp2_uart3_pin1[] = {GPIO37, GPIO38, GPIO39, GPIO40};
492static const unsigned mmp2_uart3_pin2[] = {GPIO43, GPIO44, GPIO45, GPIO46};
493static const unsigned mmp2_uart3_pin3[] = {GPIO51, GPIO52, GPIO53, GPIO54};
494static const unsigned mmp2_uart3_pin4[] = {GPIO59, GPIO60, GPIO61, GPIO62};
495static const unsigned mmp2_uart3_pin5[] = {GPIO115, GPIO116, GPIO117, GPIO118};
496static const unsigned mmp2_uart3_pin6[] = {GPIO51, GPIO52};
497static const unsigned mmp2_uart4_pin1[] = {GPIO43, GPIO44, GPIO45, GPIO46};
498static const unsigned mmp2_uart4_pin2[] = {GPIO63, GPIO64, GPIO65, GPIO66};
499static const unsigned mmp2_uart4_pin3[] = {GPIO74, GPIO75, GPIO76, GPIO77};
500static const unsigned mmp2_uart4_pin4[] = {GPIO115, GPIO116, GPIO117, GPIO118};
501static const unsigned mmp2_uart4_pin5[] = {GPIO59, GPIO60};
502static const unsigned mmp2_kpdk_pin1[] = {GPIO16, GPIO17, GPIO18, GPIO19};
503static const unsigned mmp2_kpdk_pin2[] = {GPIO16, GPIO17};
504static const unsigned mmp2_twsi2_pin1[] = {GPIO37, GPIO38};
505static const unsigned mmp2_twsi2_pin2[] = {GPIO39, GPIO40};
506static const unsigned mmp2_twsi2_pin3[] = {GPIO43, GPIO44};
507static const unsigned mmp2_twsi2_pin4[] = {GPIO53, GPIO54};
508static const unsigned mmp2_twsi2_pin5[] = {GPIO55, GPIO56};
509static const unsigned mmp2_twsi3_pin1[] = {GPIO71, GPIO72};
510static const unsigned mmp2_twsi3_pin2[] = {GPIO95, GPIO96};
511static const unsigned mmp2_twsi4_pin1[] = {TWSI4_SCL, TWSI4_SDA};
512static const unsigned mmp2_twsi5_pin1[] = {GPIO41, GPIO42};
513static const unsigned mmp2_twsi5_pin2[] = {GPIO84, GPIO85};
514static const unsigned mmp2_twsi5_pin3[] = {GPIO99, GPIO100};
515static const unsigned mmp2_twsi6_pin1[] = {GPIO47, GPIO48};
516static const unsigned mmp2_twsi6_pin2[] = {GPIO86, GPIO87};
517static const unsigned mmp2_twsi6_pin3[] = {GPIO97, GPIO98};
518static const unsigned mmp2_ccic1_pin1[] = {GPIO12, GPIO13, GPIO14, GPIO15,
519 GPIO16, GPIO17, GPIO18, GPIO19, GPIO20, GPIO21, GPIO22, GPIO23};
520static const unsigned mmp2_ccic1_pin2[] = {GPIO59, GPIO60, GPIO61, GPIO62,
521 GPIO63, GPIO64, GPIO65, GPIO66, GPIO67, GPIO68, GPIO69, GPIO70};
522static const unsigned mmp2_ccic2_pin1[] = {GPIO59, GPIO60, GPIO61, GPIO62,
523 GPIO63, GPIO64, GPIO65, GPIO66, GPIO67, GPIO68, GPIO69, GPIO70};
524static const unsigned mmp2_ccic2_pin2[] = {GPIO82, GPIO83, GPIO86, GPIO87,
525 GPIO88, GPIO89, GPIO90, GPIO91, GPIO92, GPIO93, GPIO94, GPIO95};
526static const unsigned mmp2_ulpi_pin1[] = {GPIO59, GPIO60, GPIO61, GPIO62,
527 GPIO63, GPIO64, GPIO65, GPIO66, GPIO67, GPIO68, GPIO69, GPIO70};
528static const unsigned mmp2_ro_pin1[] = {GPIO16, GPIO17};
529static const unsigned mmp2_ro_pin2[] = {GPIO18, GPIO19};
530static const unsigned mmp2_ro_pin3[] = {GPIO51, GPIO52};
531static const unsigned mmp2_ro_pin4[] = {GPIO55, GPIO56};
532static const unsigned mmp2_i2s_pin1[] = {GPIO24, GPIO25, GPIO26, GPIO27,
533 GPIO28};
534static const unsigned mmp2_i2s_pin2[] = {GPIO33, GPIO34, GPIO35, GPIO36};
535static const unsigned mmp2_ssp1_pin1[] = {GPIO37, GPIO38, GPIO39, GPIO40};
536static const unsigned mmp2_ssp1_pin2[] = {GPIO43, GPIO44, GPIO45, GPIO46};
537static const unsigned mmp2_ssp1_pin3[] = {GPIO115, GPIO116, GPIO117, GPIO118};
538static const unsigned mmp2_ssp2_pin1[] = {GPIO47, GPIO48, GPIO49, GPIO50};
539static const unsigned mmp2_ssp3_pin1[] = {GPIO119, GPIO120, GPIO121, GPIO122};
540static const unsigned mmp2_ssp3_pin2[] = {GPIO132, GPIO133, GPIO133, GPIO136};
541static const unsigned mmp2_sspa2_pin1[] = {GPIO25, GPIO26, GPIO27, GPIO28};
542static const unsigned mmp2_sspa2_pin2[] = {GPIO33, GPIO34, GPIO35, GPIO36};
543static const unsigned mmp2_mmc1_pin1[] = {GPIO131, GPIO132, GPIO133, GPIO134,
544 GPIO136, GPIO139, GPIO140, GPIO141};
545static const unsigned mmp2_mmc2_pin1[] = {GPIO37, GPIO38, GPIO39, GPIO40,
546 GPIO41, GPIO42};
547static const unsigned mmp2_mmc3_pin1[] = {GPIO111, GPIO112, GPIO151, GPIO162,
548 GPIO163, GPIO164, GPIO165, GPIO166, GPIO167, GPIO168};
549
550static struct pxa3xx_pin_group mmp2_grps[] = {
551 GRP_MMP2("uart1 4p1", UART1, mmp2_uart1_pin1),
552 GRP_MMP2("uart1 2p2", UART1, mmp2_uart1_pin2),
553 GRP_MMP2("uart1 2p3", UART1, mmp2_uart1_pin3),
554 GRP_MMP2("uart2 4p1", UART2, mmp2_uart2_pin1),
555 GRP_MMP2("uart2 4p2", UART2, mmp2_uart2_pin2),
556 GRP_MMP2("uart2 4p3", UART2, mmp2_uart2_pin3),
557 GRP_MMP2("uart2 4p4", UART2, mmp2_uart2_pin4),
558 GRP_MMP2("uart2 2p5", UART2, mmp2_uart2_pin5),
559 GRP_MMP2("uart2 2p6", UART2, mmp2_uart2_pin6),
560 GRP_MMP2("uart3 4p1", UART3, mmp2_uart3_pin1),
561 GRP_MMP2("uart3 4p2", UART3, mmp2_uart3_pin2),
562 GRP_MMP2("uart3 4p3", UART3, mmp2_uart3_pin3),
563 GRP_MMP2("uart3 4p4", UART3, mmp2_uart3_pin4),
564 GRP_MMP2("uart3 4p5", UART3, mmp2_uart3_pin5),
565 GRP_MMP2("uart3 2p6", UART3, mmp2_uart3_pin6),
566 GRP_MMP2("uart4 4p1", UART4, mmp2_uart4_pin1),
567 GRP_MMP2("uart4 4p2", UART4, mmp2_uart4_pin2),
568 GRP_MMP2("uart4 4p3", UART4, mmp2_uart4_pin3),
569 GRP_MMP2("uart4 4p4", UART4, mmp2_uart4_pin4),
570 GRP_MMP2("uart4 2p5", UART4, mmp2_uart4_pin5),
571 GRP_MMP2("kpdk 4p1", KP_DK, mmp2_kpdk_pin1),
572 GRP_MMP2("kpdk 4p2", KP_DK, mmp2_kpdk_pin2),
573 GRP_MMP2("twsi2-1", TWSI2, mmp2_twsi2_pin1),
574 GRP_MMP2("twsi2-2", TWSI2, mmp2_twsi2_pin2),
575 GRP_MMP2("twsi2-3", TWSI2, mmp2_twsi2_pin3),
576 GRP_MMP2("twsi2-4", TWSI2, mmp2_twsi2_pin4),
577 GRP_MMP2("twsi2-5", TWSI2, mmp2_twsi2_pin5),
578 GRP_MMP2("twsi3-1", TWSI3, mmp2_twsi3_pin1),
579 GRP_MMP2("twsi3-2", TWSI3, mmp2_twsi3_pin2),
580 GRP_MMP2("twsi4", TWSI4, mmp2_twsi4_pin1),
581 GRP_MMP2("twsi5-1", TWSI5, mmp2_twsi5_pin1),
582 GRP_MMP2("twsi5-2", TWSI5, mmp2_twsi5_pin2),
583 GRP_MMP2("twsi5-3", TWSI5, mmp2_twsi5_pin3),
584 GRP_MMP2("twsi6-1", TWSI6, mmp2_twsi6_pin1),
585 GRP_MMP2("twsi6-2", TWSI6, mmp2_twsi6_pin2),
586 GRP_MMP2("twsi6-3", TWSI6, mmp2_twsi6_pin3),
587 GRP_MMP2("ccic1-1", CCIC1, mmp2_ccic1_pin1),
588 GRP_MMP2("ccic1-2", CCIC1, mmp2_ccic1_pin2),
589 GRP_MMP2("ccic2-1", CCIC2, mmp2_ccic2_pin1),
590 GRP_MMP2("ccic2-1", CCIC2, mmp2_ccic2_pin2),
591 GRP_MMP2("ulpi", ULPI, mmp2_ulpi_pin1),
592 GRP_MMP2("ro-1", ROT, mmp2_ro_pin1),
593 GRP_MMP2("ro-2", ROT, mmp2_ro_pin2),
594 GRP_MMP2("ro-3", ROT, mmp2_ro_pin3),
595 GRP_MMP2("ro-4", ROT, mmp2_ro_pin4),
596 GRP_MMP2("i2s 5p1", I2S, mmp2_i2s_pin1),
597 GRP_MMP2("i2s 4p2", I2S, mmp2_i2s_pin2),
598 GRP_MMP2("ssp1 4p1", SSP1, mmp2_ssp1_pin1),
599 GRP_MMP2("ssp1 4p2", SSP1, mmp2_ssp1_pin2),
600 GRP_MMP2("ssp1 4p3", SSP1, mmp2_ssp1_pin3),
601 GRP_MMP2("ssp2 4p1", SSP2, mmp2_ssp2_pin1),
602 GRP_MMP2("ssp3 4p1", SSP3, mmp2_ssp3_pin1),
603 GRP_MMP2("ssp3 4p2", SSP3, mmp2_ssp3_pin2),
604 GRP_MMP2("sspa2 4p1", SSPA2, mmp2_sspa2_pin1),
605 GRP_MMP2("sspa2 4p2", SSPA2, mmp2_sspa2_pin2),
606 GRP_MMP2("mmc1 8p1", MMC1, mmp2_mmc1_pin1),
607 GRP_MMP2("mmc2 6p1", MMC2, mmp2_mmc2_pin1),
608 GRP_MMP2("mmc3 10p1", MMC3, mmp2_mmc3_pin1),
609};
610
611static const char * const mmp2_uart1_grps[] = {"uart1 4p1", "uart1 2p2",
612 "uart1 2p3"};
613static const char * const mmp2_uart2_grps[] = {"uart2 4p1", "uart2 4p2",
614 "uart2 4p3", "uart2 4p4", "uart2 4p5", "uart2 4p6"};
615static const char * const mmp2_uart3_grps[] = {"uart3 4p1", "uart3 4p2",
616 "uart3 4p3", "uart3 4p4", "uart3 4p5", "uart3 2p6"};
617static const char * const mmp2_uart4_grps[] = {"uart4 4p1", "uart4 4p2",
618 "uart4 4p3", "uart4 4p4", "uart4 2p5"};
619static const char * const mmp2_kpdk_grps[] = {"kpdk 4p1", "kpdk 4p2"};
620static const char * const mmp2_twsi2_grps[] = {"twsi2-1", "twsi2-2",
621 "twsi2-3", "twsi2-4", "twsi2-5"};
622static const char * const mmp2_twsi3_grps[] = {"twsi3-1", "twsi3-2"};
623static const char * const mmp2_twsi4_grps[] = {"twsi4"};
624static const char * const mmp2_twsi5_grps[] = {"twsi5-1", "twsi5-2",
625 "twsi5-3"};
626static const char * const mmp2_twsi6_grps[] = {"twsi6-1", "twsi6-2",
627 "twsi6-3"};
628static const char * const mmp2_ccic1_grps[] = {"ccic1-1", "ccic1-2"};
629static const char * const mmp2_ccic2_grps[] = {"ccic2-1", "ccic2-2"};
630static const char * const mmp2_ulpi_grps[] = {"ulpi"};
631static const char * const mmp2_ro_grps[] = {"ro-1", "ro-2", "ro-3", "ro-4"};
632static const char * const mmp2_i2s_grps[] = {"i2s 5p1", "i2s 4p2"};
633static const char * const mmp2_ssp1_grps[] = {"ssp1 4p1", "ssp1 4p2",
634 "ssp1 4p3"};
635static const char * const mmp2_ssp2_grps[] = {"ssp2 4p1"};
636static const char * const mmp2_ssp3_grps[] = {"ssp3 4p1", "ssp3 4p2"};
637static const char * const mmp2_sspa2_grps[] = {"sspa2 4p1", "sspa2 4p2"};
638static const char * const mmp2_mmc1_grps[] = {"mmc1 8p1"};
639static const char * const mmp2_mmc2_grps[] = {"mmc2 6p1"};
640static const char * const mmp2_mmc3_grps[] = {"mmc3 10p1"};
641
642static struct pxa3xx_pmx_func mmp2_funcs[] = {
643 {"uart1", ARRAY_AND_SIZE(mmp2_uart1_grps)},
644 {"uart2", ARRAY_AND_SIZE(mmp2_uart2_grps)},
645 {"uart3", ARRAY_AND_SIZE(mmp2_uart3_grps)},
646 {"uart4", ARRAY_AND_SIZE(mmp2_uart4_grps)},
647 {"kpdk", ARRAY_AND_SIZE(mmp2_kpdk_grps)},
648 {"twsi2", ARRAY_AND_SIZE(mmp2_twsi2_grps)},
649 {"twsi3", ARRAY_AND_SIZE(mmp2_twsi3_grps)},
650 {"twsi4", ARRAY_AND_SIZE(mmp2_twsi4_grps)},
651 {"twsi5", ARRAY_AND_SIZE(mmp2_twsi5_grps)},
652 {"twsi6", ARRAY_AND_SIZE(mmp2_twsi6_grps)},
653 {"ccic1", ARRAY_AND_SIZE(mmp2_ccic1_grps)},
654 {"ccic2", ARRAY_AND_SIZE(mmp2_ccic2_grps)},
655 {"ulpi", ARRAY_AND_SIZE(mmp2_ulpi_grps)},
656 {"ro", ARRAY_AND_SIZE(mmp2_ro_grps)},
657 {"i2s", ARRAY_AND_SIZE(mmp2_i2s_grps)},
658 {"ssp1", ARRAY_AND_SIZE(mmp2_ssp1_grps)},
659 {"ssp2", ARRAY_AND_SIZE(mmp2_ssp2_grps)},
660 {"ssp3", ARRAY_AND_SIZE(mmp2_ssp3_grps)},
661 {"sspa2", ARRAY_AND_SIZE(mmp2_sspa2_grps)},
662 {"mmc1", ARRAY_AND_SIZE(mmp2_mmc1_grps)},
663 {"mmc2", ARRAY_AND_SIZE(mmp2_mmc2_grps)},
664 {"mmc3", ARRAY_AND_SIZE(mmp2_mmc3_grps)},
665};
666
667static struct pinctrl_desc mmp2_pctrl_desc = {
668 .name = "mmp2-pinctrl",
669 .owner = THIS_MODULE,
670};
671
672static struct pxa3xx_pinmux_info mmp2_info = {
673 .mfp = mmp2_mfp,
674 .num_mfp = ARRAY_SIZE(mmp2_mfp),
675 .grps = mmp2_grps,
676 .num_grps = ARRAY_SIZE(mmp2_grps),
677 .funcs = mmp2_funcs,
678 .num_funcs = ARRAY_SIZE(mmp2_funcs),
679 .num_gpio = 169,
680 .desc = &mmp2_pctrl_desc,
681 .pads = mmp2_pads,
682 .num_pads = ARRAY_SIZE(mmp2_pads),
683
684 .cputype = PINCTRL_MMP2,
685 .ds_mask = MMP2_DS_MASK,
686 .ds_shift = MMP2_DS_SHIFT,
687};
688
689static int __devinit mmp2_pinmux_probe(struct platform_device *pdev)
690{
691 return pxa3xx_pinctrl_register(pdev, &mmp2_info);
692}
693
694static int __devexit mmp2_pinmux_remove(struct platform_device *pdev)
695{
696 return pxa3xx_pinctrl_unregister(pdev);
697}
698
699static struct platform_driver mmp2_pinmux_driver = {
700 .driver = {
701 .name = "mmp2-pinmux",
702 .owner = THIS_MODULE,
703 },
704 .probe = mmp2_pinmux_probe,
705 .remove = __devexit_p(mmp2_pinmux_remove),
706};
707
708static int __init mmp2_pinmux_init(void)
709{
710 return platform_driver_register(&mmp2_pinmux_driver);
711}
712core_initcall_sync(mmp2_pinmux_init);
713
714static void __exit mmp2_pinmux_exit(void)
715{
716 platform_driver_unregister(&mmp2_pinmux_driver);
717}
718module_exit(mmp2_pinmux_exit);
719
720MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com>");
721MODULE_DESCRIPTION("PXA3xx pin control driver");
722MODULE_LICENSE("GPL v2");
diff --git a/drivers/pinctrl/pinctrl-pxa168.c b/drivers/pinctrl/pinctrl-pxa168.c
new file mode 100644
index 000000000000..c1997fa7f28c
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-pxa168.c
@@ -0,0 +1,651 @@
1/*
2 * linux/drivers/pinctrl/pinmux-pxa168.c
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * publishhed by the Free Software Foundation.
7 *
8 * Copyright (C) 2011, Marvell Technology Group Ltd.
9 *
10 * Author: Haojian Zhuang <haojian.zhuang@marvell.com>
11 *
12 */
13
14#include <linux/device.h>
15#include <linux/module.h>
16#include <linux/io.h>
17#include <linux/platform_device.h>
18#include "pinctrl-pxa3xx.h"
19
20#define PXA168_DS_MASK 0x1800
21#define PXA168_DS_SHIFT 11
22#define PXA168_SLEEP_MASK 0x38
23#define PXA168_SLEEP_SELECT (1 << 9)
24#define PXA168_SLEEP_DATA (1 << 8)
25#define PXA168_SLEEP_DIR (1 << 7)
26
27#define MFPR_168(a, r, f0, f1, f2, f3, f4, f5, f6, f7) \
28 { \
29 .name = #a, \
30 .pin = a, \
31 .mfpr = r, \
32 .func = { \
33 PXA168_MUX_##f0, \
34 PXA168_MUX_##f1, \
35 PXA168_MUX_##f2, \
36 PXA168_MUX_##f3, \
37 PXA168_MUX_##f4, \
38 PXA168_MUX_##f5, \
39 PXA168_MUX_##f6, \
40 PXA168_MUX_##f7, \
41 }, \
42 }
43
44#define GRP_168(a, m, p) \
45 { .name = a, .mux = PXA168_MUX_##m, .pins = p, .npins = ARRAY_SIZE(p), }
46
47/* 131 pins */
48enum pxa168_pin_list {
49 /* 0~122: GPIO0~GPIO122 */
50 PWR_SCL = 123,
51 PWR_SDA,
52 TDI,
53 TMS,
54 TCK,
55 TDO,
56 TRST,
57 WAKEUP = 130,
58};
59
60enum pxa168_mux {
61 /* PXA3xx_MUX_GPIO = 0 (predefined in pinctrl-pxa3xx.h) */
62 PXA168_MUX_GPIO = 0,
63 PXA168_MUX_DFIO,
64 PXA168_MUX_NAND,
65 PXA168_MUX_SMC,
66 PXA168_MUX_SMC_CS0,
67 PXA168_MUX_SMC_CS1,
68 PXA168_MUX_SMC_INT,
69 PXA168_MUX_SMC_RDY,
70 PXA168_MUX_MMC1,
71 PXA168_MUX_MMC2,
72 PXA168_MUX_MMC2_CMD,
73 PXA168_MUX_MMC2_CLK,
74 PXA168_MUX_MMC3,
75 PXA168_MUX_MMC3_CMD,
76 PXA168_MUX_MMC3_CLK,
77 PXA168_MUX_MMC4,
78 PXA168_MUX_MSP,
79 PXA168_MUX_MSP_DAT3,
80 PXA168_MUX_MSP_INS,
81 PXA168_MUX_I2C,
82 PXA168_MUX_PWRI2C,
83 PXA168_MUX_AC97,
84 PXA168_MUX_AC97_SYSCLK,
85 PXA168_MUX_PWM,
86 PXA168_MUX_PWM1,
87 PXA168_MUX_XD,
88 PXA168_MUX_XP,
89 PXA168_MUX_LCD,
90 PXA168_MUX_CCIC,
91 PXA168_MUX_CF,
92 PXA168_MUX_CF_RDY,
93 PXA168_MUX_CF_nINPACK,
94 PXA168_MUX_CF_nWAIT,
95 PXA168_MUX_KP_MKOUT,
96 PXA168_MUX_KP_MKIN,
97 PXA168_MUX_KP_DK,
98 PXA168_MUX_ETH,
99 PXA168_MUX_ETH_TX,
100 PXA168_MUX_ETH_RX,
101 PXA168_MUX_ONE_WIRE,
102 PXA168_MUX_UART1,
103 PXA168_MUX_UART1_TX,
104 PXA168_MUX_UART1_CTS,
105 PXA168_MUX_UART1_nRI,
106 PXA168_MUX_UART1_DTR,
107 PXA168_MUX_UART2,
108 PXA168_MUX_UART2_TX,
109 PXA168_MUX_UART3,
110 PXA168_MUX_UART3_TX,
111 PXA168_MUX_UART3_CTS,
112 PXA168_MUX_SSP1,
113 PXA168_MUX_SSP1_TX,
114 PXA168_MUX_SSP2,
115 PXA168_MUX_SSP2_TX,
116 PXA168_MUX_SSP3,
117 PXA168_MUX_SSP3_TX,
118 PXA168_MUX_SSP4,
119 PXA168_MUX_SSP4_TX,
120 PXA168_MUX_SSP5,
121 PXA168_MUX_SSP5_TX,
122 PXA168_MUX_USB,
123 PXA168_MUX_JTAG,
124 PXA168_MUX_RESET,
125 PXA168_MUX_WAKEUP,
126 PXA168_MUX_EXT_32K_IN,
127 PXA168_MUX_NONE = 0xffff,
128};
129
130static struct pinctrl_pin_desc pxa168_pads[] = {
131 PINCTRL_PIN(GPIO0, "GPIO0"),
132 PINCTRL_PIN(GPIO1, "GPIO1"),
133 PINCTRL_PIN(GPIO2, "GPIO2"),
134 PINCTRL_PIN(GPIO3, "GPIO3"),
135 PINCTRL_PIN(GPIO4, "GPIO4"),
136 PINCTRL_PIN(GPIO5, "GPIO5"),
137 PINCTRL_PIN(GPIO6, "GPIO6"),
138 PINCTRL_PIN(GPIO7, "GPIO7"),
139 PINCTRL_PIN(GPIO8, "GPIO8"),
140 PINCTRL_PIN(GPIO9, "GPIO9"),
141 PINCTRL_PIN(GPIO10, "GPIO10"),
142 PINCTRL_PIN(GPIO11, "GPIO11"),
143 PINCTRL_PIN(GPIO12, "GPIO12"),
144 PINCTRL_PIN(GPIO13, "GPIO13"),
145 PINCTRL_PIN(GPIO14, "GPIO14"),
146 PINCTRL_PIN(GPIO15, "GPIO15"),
147 PINCTRL_PIN(GPIO16, "GPIO16"),
148 PINCTRL_PIN(GPIO17, "GPIO17"),
149 PINCTRL_PIN(GPIO18, "GPIO18"),
150 PINCTRL_PIN(GPIO19, "GPIO19"),
151 PINCTRL_PIN(GPIO20, "GPIO20"),
152 PINCTRL_PIN(GPIO21, "GPIO21"),
153 PINCTRL_PIN(GPIO22, "GPIO22"),
154 PINCTRL_PIN(GPIO23, "GPIO23"),
155 PINCTRL_PIN(GPIO24, "GPIO24"),
156 PINCTRL_PIN(GPIO25, "GPIO25"),
157 PINCTRL_PIN(GPIO26, "GPIO26"),
158 PINCTRL_PIN(GPIO27, "GPIO27"),
159 PINCTRL_PIN(GPIO28, "GPIO28"),
160 PINCTRL_PIN(GPIO29, "GPIO29"),
161 PINCTRL_PIN(GPIO30, "GPIO30"),
162 PINCTRL_PIN(GPIO31, "GPIO31"),
163 PINCTRL_PIN(GPIO32, "GPIO32"),
164 PINCTRL_PIN(GPIO33, "GPIO33"),
165 PINCTRL_PIN(GPIO34, "GPIO34"),
166 PINCTRL_PIN(GPIO35, "GPIO35"),
167 PINCTRL_PIN(GPIO36, "GPIO36"),
168 PINCTRL_PIN(GPIO37, "GPIO37"),
169 PINCTRL_PIN(GPIO38, "GPIO38"),
170 PINCTRL_PIN(GPIO39, "GPIO39"),
171 PINCTRL_PIN(GPIO40, "GPIO40"),
172 PINCTRL_PIN(GPIO41, "GPIO41"),
173 PINCTRL_PIN(GPIO42, "GPIO42"),
174 PINCTRL_PIN(GPIO43, "GPIO43"),
175 PINCTRL_PIN(GPIO44, "GPIO44"),
176 PINCTRL_PIN(GPIO45, "GPIO45"),
177 PINCTRL_PIN(GPIO46, "GPIO46"),
178 PINCTRL_PIN(GPIO47, "GPIO47"),
179 PINCTRL_PIN(GPIO48, "GPIO48"),
180 PINCTRL_PIN(GPIO49, "GPIO49"),
181 PINCTRL_PIN(GPIO50, "GPIO50"),
182 PINCTRL_PIN(GPIO51, "GPIO51"),
183 PINCTRL_PIN(GPIO52, "GPIO52"),
184 PINCTRL_PIN(GPIO53, "GPIO53"),
185 PINCTRL_PIN(GPIO54, "GPIO54"),
186 PINCTRL_PIN(GPIO55, "GPIO55"),
187 PINCTRL_PIN(GPIO56, "GPIO56"),
188 PINCTRL_PIN(GPIO57, "GPIO57"),
189 PINCTRL_PIN(GPIO58, "GPIO58"),
190 PINCTRL_PIN(GPIO59, "GPIO59"),
191 PINCTRL_PIN(GPIO60, "GPIO60"),
192 PINCTRL_PIN(GPIO61, "GPIO61"),
193 PINCTRL_PIN(GPIO62, "GPIO62"),
194 PINCTRL_PIN(GPIO63, "GPIO63"),
195 PINCTRL_PIN(GPIO64, "GPIO64"),
196 PINCTRL_PIN(GPIO65, "GPIO65"),
197 PINCTRL_PIN(GPIO66, "GPIO66"),
198 PINCTRL_PIN(GPIO67, "GPIO67"),
199 PINCTRL_PIN(GPIO68, "GPIO68"),
200 PINCTRL_PIN(GPIO69, "GPIO69"),
201 PINCTRL_PIN(GPIO70, "GPIO70"),
202 PINCTRL_PIN(GPIO71, "GPIO71"),
203 PINCTRL_PIN(GPIO72, "GPIO72"),
204 PINCTRL_PIN(GPIO73, "GPIO73"),
205 PINCTRL_PIN(GPIO74, "GPIO74"),
206 PINCTRL_PIN(GPIO75, "GPIO75"),
207 PINCTRL_PIN(GPIO76, "GPIO76"),
208 PINCTRL_PIN(GPIO77, "GPIO77"),
209 PINCTRL_PIN(GPIO78, "GPIO78"),
210 PINCTRL_PIN(GPIO79, "GPIO79"),
211 PINCTRL_PIN(GPIO80, "GPIO80"),
212 PINCTRL_PIN(GPIO81, "GPIO81"),
213 PINCTRL_PIN(GPIO82, "GPIO82"),
214 PINCTRL_PIN(GPIO83, "GPIO83"),
215 PINCTRL_PIN(GPIO84, "GPIO84"),
216 PINCTRL_PIN(GPIO85, "GPIO85"),
217 PINCTRL_PIN(GPIO86, "GPIO86"),
218 PINCTRL_PIN(GPIO87, "GPIO87"),
219 PINCTRL_PIN(GPIO88, "GPIO88"),
220 PINCTRL_PIN(GPIO89, "GPIO89"),
221 PINCTRL_PIN(GPIO90, "GPIO90"),
222 PINCTRL_PIN(GPIO91, "GPIO91"),
223 PINCTRL_PIN(GPIO92, "GPIO92"),
224 PINCTRL_PIN(GPIO93, "GPIO93"),
225 PINCTRL_PIN(GPIO94, "GPIO94"),
226 PINCTRL_PIN(GPIO95, "GPIO95"),
227 PINCTRL_PIN(GPIO96, "GPIO96"),
228 PINCTRL_PIN(GPIO97, "GPIO97"),
229 PINCTRL_PIN(GPIO98, "GPIO98"),
230 PINCTRL_PIN(GPIO99, "GPIO99"),
231 PINCTRL_PIN(GPIO100, "GPIO100"),
232 PINCTRL_PIN(GPIO101, "GPIO101"),
233 PINCTRL_PIN(GPIO102, "GPIO102"),
234 PINCTRL_PIN(GPIO103, "GPIO103"),
235 PINCTRL_PIN(GPIO104, "GPIO104"),
236 PINCTRL_PIN(GPIO105, "GPIO105"),
237 PINCTRL_PIN(GPIO106, "GPIO106"),
238 PINCTRL_PIN(GPIO107, "GPIO107"),
239 PINCTRL_PIN(GPIO108, "GPIO108"),
240 PINCTRL_PIN(GPIO109, "GPIO109"),
241 PINCTRL_PIN(GPIO110, "GPIO110"),
242 PINCTRL_PIN(GPIO111, "GPIO111"),
243 PINCTRL_PIN(GPIO112, "GPIO112"),
244 PINCTRL_PIN(GPIO113, "GPIO113"),
245 PINCTRL_PIN(GPIO114, "GPIO114"),
246 PINCTRL_PIN(GPIO115, "GPIO115"),
247 PINCTRL_PIN(GPIO116, "GPIO116"),
248 PINCTRL_PIN(GPIO117, "GPIO117"),
249 PINCTRL_PIN(GPIO118, "GPIO118"),
250 PINCTRL_PIN(GPIO119, "GPIO119"),
251 PINCTRL_PIN(GPIO120, "GPIO120"),
252 PINCTRL_PIN(GPIO121, "GPIO121"),
253 PINCTRL_PIN(GPIO122, "GPIO122"),
254 PINCTRL_PIN(PWR_SCL, "PWR_SCL"),
255 PINCTRL_PIN(PWR_SDA, "PWR_SDA"),
256 PINCTRL_PIN(TDI, "TDI"),
257 PINCTRL_PIN(TMS, "TMS"),
258 PINCTRL_PIN(TCK, "TCK"),
259 PINCTRL_PIN(TDO, "TDO"),
260 PINCTRL_PIN(TRST, "TRST"),
261 PINCTRL_PIN(WAKEUP, "WAKEUP"),
262};
263
264struct pxa3xx_mfp_pin pxa168_mfp[] = {
265 /* pin offs f0 f1 f2 f3 f4 f5 f6 f7 */
266 MFPR_168(GPIO0, 0x04C, DFIO, NONE, NONE, MSP, MMC3_CMD, GPIO, MMC3, NONE),
267 MFPR_168(GPIO1, 0x050, DFIO, NONE, NONE, MSP, MMC3_CLK, GPIO, MMC3, NONE),
268 MFPR_168(GPIO2, 0x054, DFIO, NONE, NONE, MSP, NONE, GPIO, MMC3, NONE),
269 MFPR_168(GPIO3, 0x058, DFIO, NONE, NONE, NONE, NONE, GPIO, MMC3, NONE),
270 MFPR_168(GPIO4, 0x05C, DFIO, NONE, NONE, MSP_DAT3, NONE, GPIO, MMC3, NONE),
271 MFPR_168(GPIO5, 0x060, DFIO, NONE, NONE, MSP, NONE, GPIO, MMC3, NONE),
272 MFPR_168(GPIO6, 0x064, DFIO, NONE, NONE, MSP, NONE, GPIO, MMC3, NONE),
273 MFPR_168(GPIO7, 0x068, DFIO, NONE, NONE, MSP, NONE, GPIO, MMC3, NONE),
274 MFPR_168(GPIO8, 0x06C, DFIO, MMC2, UART3_TX, NONE, MMC2_CMD, GPIO, MMC3_CLK, NONE),
275 MFPR_168(GPIO9, 0x070, DFIO, MMC2, UART3, NONE, MMC2_CLK, GPIO, MMC3_CMD, NONE),
276 MFPR_168(GPIO10, 0x074, DFIO, MMC2, UART3, NONE, NONE, GPIO, MSP_DAT3, NONE),
277 MFPR_168(GPIO11, 0x078, DFIO, MMC2, UART3, NONE, NONE, GPIO, MSP, NONE),
278 MFPR_168(GPIO12, 0x07C, DFIO, MMC2, UART3, NONE, NONE, GPIO, MSP, NONE),
279 MFPR_168(GPIO13, 0x080, DFIO, MMC2, UART3, NONE, NONE, GPIO, MSP, NONE),
280 MFPR_168(GPIO14, 0x084, DFIO, MMC2, NONE, NONE, NONE, GPIO, MSP, NONE),
281 MFPR_168(GPIO15, 0x088, DFIO, MMC2, NONE, NONE, NONE, GPIO, MSP, NONE),
282 MFPR_168(GPIO16, 0x08C, GPIO, NAND, SMC_CS0, SMC_CS1, NONE, NONE, MMC3, NONE),
283 MFPR_168(GPIO17, 0x090, NAND, NONE, NONE, NONE, NONE, GPIO, MSP, NONE),
284 MFPR_168(GPIO18, 0x094, GPIO, NAND, SMC_CS1, SMC_CS0, NONE, NONE, NONE, NONE),
285 MFPR_168(GPIO19, 0x098, SMC_CS0, NONE, NONE, CF, NONE, GPIO, NONE, NONE),
286 MFPR_168(GPIO20, 0x09C, GPIO, NONE, SMC_CS1, CF, CF_RDY, NONE, NONE, NONE),
287 MFPR_168(GPIO21, 0x0A0, NAND, MMC2_CLK, NONE, NONE, NONE, GPIO, NONE, NONE),
288 MFPR_168(GPIO22, 0x0A4, NAND, MMC2_CMD, NONE, NONE, NONE, GPIO, NONE, NONE),
289 MFPR_168(GPIO23, 0x0A8, SMC, NAND, NONE, CF, NONE, GPIO, NONE, NONE),
290 MFPR_168(GPIO24, 0x0AC, NAND, NONE, NONE, NONE, NONE, GPIO, NONE, NONE),
291 MFPR_168(GPIO25, 0x0B0, SMC, NAND, NONE, CF, NONE, GPIO, NONE, NONE),
292 MFPR_168(GPIO26, 0x0B4, GPIO, NAND, NONE, NONE, CF, NONE, NONE, NONE),
293 MFPR_168(GPIO27, 0x0B8, SMC_INT, NAND, SMC, NONE, SMC_RDY, GPIO, NONE, NONE),
294 MFPR_168(GPIO28, 0x0BC, SMC_RDY, MMC4, SMC, CF_RDY, NONE, GPIO, MMC2_CMD, NONE),
295 MFPR_168(GPIO29, 0x0C0, SMC, MMC4, NONE, CF, NONE, GPIO, MMC2_CLK, KP_DK),
296 MFPR_168(GPIO30, 0x0C4, SMC, MMC4, UART3_TX, CF, NONE, GPIO, MMC2, KP_DK),
297 MFPR_168(GPIO31, 0x0C8, SMC, MMC4, UART3, CF, NONE, GPIO, MMC2, KP_DK),
298 MFPR_168(GPIO32, 0x0CC, SMC, MMC4, UART3, CF, NONE, GPIO, MMC2, KP_DK),
299 MFPR_168(GPIO33, 0x0D0, SMC, MMC4, UART3, CF, CF_nINPACK, GPIO, MMC2, KP_DK),
300 MFPR_168(GPIO34, 0x0D4, GPIO, NONE, SMC_CS1, CF, CF_nWAIT, NONE, MMC3, KP_DK),
301 MFPR_168(GPIO35, 0x0D8, GPIO, NONE, SMC, CF_nINPACK, NONE, NONE, MMC3_CMD, KP_DK),
302 MFPR_168(GPIO36, 0x0DC, GPIO, NONE, SMC, CF_nWAIT, NONE, NONE, MMC3_CLK, KP_DK),
303 MFPR_168(GPIO37, 0x000, GPIO, MMC1, NONE, KP_MKOUT, CCIC, XP, KP_MKIN, KP_DK),
304 MFPR_168(GPIO38, 0x004, GPIO, MMC1, NONE, KP_MKOUT, CCIC, XP, KP_MKIN, KP_DK),
305 MFPR_168(GPIO39, 0x008, GPIO, NONE, NONE, KP_MKOUT, CCIC, XP, KP_MKIN, KP_DK),
306 MFPR_168(GPIO40, 0x00C, GPIO, MMC1, MSP, KP_MKOUT, CCIC, XP, KP_MKIN, KP_DK),
307 MFPR_168(GPIO41, 0x010, GPIO, MMC1, MSP, NONE, CCIC, XP, KP_MKIN, KP_DK),
308 MFPR_168(GPIO42, 0x014, GPIO, I2C, NONE, MSP, CCIC, XP, KP_MKIN, KP_DK),
309 MFPR_168(GPIO43, 0x018, GPIO, MMC1, MSP, MSP_INS, NONE, NONE, KP_MKIN, KP_DK),
310 MFPR_168(GPIO44, 0x01C, GPIO, MMC1, MSP_DAT3, MSP, CCIC, XP, KP_MKIN, KP_DK),
311 MFPR_168(GPIO45, 0x020, GPIO, NONE, NONE, MSP, CCIC, XP, NONE, KP_DK),
312 MFPR_168(GPIO46, 0x024, GPIO, MMC1, MSP_INS, MSP, CCIC, NONE, KP_MKOUT, KP_DK),
313 MFPR_168(GPIO47, 0x028, GPIO, NONE, NONE, MSP_INS, NONE, XP, NONE, KP_DK),
314 MFPR_168(GPIO48, 0x02C, GPIO, MMC1, NONE, MSP_DAT3, CCIC, NONE, NONE, KP_DK),
315 MFPR_168(GPIO49, 0x030, GPIO, MMC1, NONE, MSP, NONE, XD, KP_MKOUT, NONE),
316 MFPR_168(GPIO50, 0x034, GPIO, I2C, NONE, MSP, CCIC, XD, KP_MKOUT, NONE),
317 MFPR_168(GPIO51, 0x038, GPIO, MMC1, NONE, MSP, NONE, XD, KP_MKOUT, NONE),
318 MFPR_168(GPIO52, 0x03C, GPIO, MMC1, NONE, MSP, NONE, XD, KP_MKOUT, NONE),
319 MFPR_168(GPIO53, 0x040, GPIO, MMC1, NONE, NONE, NONE, XD, KP_MKOUT, NONE),
320 MFPR_168(GPIO54, 0x044, GPIO, MMC1, NONE, NONE, CCIC, XD, KP_MKOUT, NONE),
321 MFPR_168(GPIO55, 0x048, GPIO, NONE, NONE, MSP, CCIC, XD, KP_MKOUT, NONE),
322 MFPR_168(GPIO56, 0x0E0, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
323 MFPR_168(GPIO57, 0x0E4, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
324 MFPR_168(GPIO58, 0x0E8, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
325 MFPR_168(GPIO59, 0x0EC, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
326 MFPR_168(GPIO60, 0x0F0, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
327 MFPR_168(GPIO61, 0x0F4, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
328 MFPR_168(GPIO62, 0x0F8, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
329 MFPR_168(GPIO63, 0x0FC, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
330 MFPR_168(GPIO64, 0x100, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
331 MFPR_168(GPIO65, 0x104, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
332 MFPR_168(GPIO66, 0x108, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
333 MFPR_168(GPIO67, 0x10C, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
334 MFPR_168(GPIO68, 0x110, GPIO, LCD, NONE, XD, NONE, NONE, NONE, NONE),
335 MFPR_168(GPIO69, 0x114, GPIO, LCD, NONE, XD, NONE, NONE, NONE, NONE),
336 MFPR_168(GPIO70, 0x118, GPIO, LCD, NONE, XD, NONE, NONE, NONE, NONE),
337 MFPR_168(GPIO71, 0x11C, GPIO, LCD, NONE, XD, NONE, NONE, NONE, NONE),
338 MFPR_168(GPIO72, 0x120, GPIO, LCD, NONE, XD, NONE, NONE, NONE, NONE),
339 MFPR_168(GPIO73, 0x124, GPIO, LCD, NONE, XD, NONE, NONE, NONE, NONE),
340 MFPR_168(GPIO74, 0x128, GPIO, LCD, PWM, XD, NONE, NONE, NONE, NONE),
341 MFPR_168(GPIO75, 0x12C, GPIO, LCD, PWM, XD, ONE_WIRE, NONE, NONE, NONE),
342 MFPR_168(GPIO76, 0x130, GPIO, LCD, PWM, I2C, NONE, NONE, MSP_INS, NONE),
343 MFPR_168(GPIO77, 0x134, GPIO, LCD, PWM1, I2C, ONE_WIRE, NONE, XD, NONE),
344 MFPR_168(GPIO78, 0x138, GPIO, LCD, NONE, NONE, NONE, MMC4, NONE, NONE),
345 MFPR_168(GPIO79, 0x13C, GPIO, LCD, NONE, NONE, ONE_WIRE, MMC4, NONE, NONE),
346 MFPR_168(GPIO80, 0x140, GPIO, LCD, NONE, I2C, NONE, MMC4, NONE, NONE),
347 MFPR_168(GPIO81, 0x144, GPIO, LCD, NONE, I2C, ONE_WIRE, MMC4, NONE, NONE),
348 MFPR_168(GPIO82, 0x148, GPIO, LCD, PWM, NONE, NONE, MMC4, NONE, NONE),
349 MFPR_168(GPIO83, 0x14C, GPIO, LCD, PWM, NONE, RESET, MMC4, NONE, NONE),
350 MFPR_168(GPIO84, 0x150, GPIO, NONE, PWM, ONE_WIRE, PWM1, NONE, NONE, EXT_32K_IN),
351 MFPR_168(GPIO85, 0x154, GPIO, NONE, PWM1, NONE, NONE, NONE, NONE, USB),
352 MFPR_168(GPIO86, 0x158, GPIO, MMC2, UART2, NONE, JTAG, ETH_TX, SSP5_TX, SSP5),
353 MFPR_168(GPIO87, 0x15C, GPIO, MMC2, UART2, NONE, JTAG, ETH_TX, SSP5, SSP5_TX),
354 MFPR_168(GPIO88, 0x160, GPIO, MMC2, UART2, UART2_TX, JTAG, ETH_TX, ETH_RX, SSP5),
355 MFPR_168(GPIO89, 0x164, GPIO, MMC2, UART2_TX, UART2, JTAG, ETH_TX, ETH_RX, SSP5),
356 MFPR_168(GPIO90, 0x168, GPIO, MMC2, NONE, SSP3, JTAG, ETH_TX, ETH_RX, NONE),
357 MFPR_168(GPIO91, 0x16C, GPIO, MMC2, NONE, SSP3, SSP4, ETH_TX, ETH_RX, NONE),
358 MFPR_168(GPIO92, 0x170, GPIO, MMC2, NONE, SSP3, SSP3_TX, ETH, NONE, NONE),
359 MFPR_168(GPIO93, 0x174, GPIO, MMC2, NONE, SSP3_TX, SSP3, ETH, NONE, NONE),
360 MFPR_168(GPIO94, 0x178, GPIO, MMC2_CMD, SSP3, AC97_SYSCLK, AC97, ETH, NONE, NONE),
361 MFPR_168(GPIO95, 0x17C, GPIO, MMC2_CLK, NONE, NONE, AC97, ETH, NONE, NONE),
362 MFPR_168(GPIO96, 0x180, GPIO, PWM, NONE, MMC2, NONE, ETH_RX, ETH_TX, NONE),
363 MFPR_168(GPIO97, 0x184, GPIO, PWM, ONE_WIRE, NONE, NONE, ETH_RX, ETH_TX, NONE),
364 MFPR_168(GPIO98, 0x188, GPIO, PWM1, UART3_TX, UART3, NONE, ETH_RX, ETH_TX, NONE),
365 MFPR_168(GPIO99, 0x18C, GPIO, ONE_WIRE, UART3, UART3_TX, NONE, ETH_RX, ETH_TX, NONE),
366 MFPR_168(GPIO100, 0x190, GPIO, NONE, UART3_CTS, UART3, NONE, ETH, NONE, NONE),
367 MFPR_168(GPIO101, 0x194, GPIO, NONE, UART3, UART3_CTS, NONE, ETH, NONE, NONE),
368 MFPR_168(GPIO102, 0x198, GPIO, I2C, UART3, SSP4, NONE, NONE, NONE, NONE),
369 MFPR_168(GPIO103, 0x19C, GPIO, I2C, UART3, SSP4, SSP2, ETH, NONE, NONE),
370 MFPR_168(GPIO104, 0x1A0, GPIO, PWM, UART1, SSP4, SSP4_TX, AC97, KP_MKOUT, NONE),
371 MFPR_168(GPIO105, 0x1A4, GPIO, I2C, UART1, SSP4_TX, SSP4, AC97, KP_MKOUT, NONE),
372 MFPR_168(GPIO106, 0x1A8, GPIO, I2C, PWM1, AC97_SYSCLK, MMC2, NONE, KP_MKOUT, NONE),
373 MFPR_168(GPIO107, 0x1AC, GPIO, UART1_TX, UART1, NONE, SSP2, MSP_DAT3, NONE, KP_MKIN),
374 MFPR_168(GPIO108, 0x1B0, GPIO, UART1, UART1_TX, NONE, SSP2_TX, MSP, NONE, KP_MKIN),
375 MFPR_168(GPIO109, 0x1B4, GPIO, UART1_CTS, UART1, NONE, AC97_SYSCLK, MSP, NONE, KP_MKIN),
376 MFPR_168(GPIO110, 0x1B8, GPIO, UART1, UART1_CTS, NONE, SMC_RDY, MSP, NONE, KP_MKIN),
377 MFPR_168(GPIO111, 0x1BC, GPIO, UART1_nRI, UART1, SSP3, SSP2, MSP, XD, KP_MKOUT),
378 MFPR_168(GPIO112, 0x1C0, GPIO, UART1_DTR, UART1, ONE_WIRE, SSP2, MSP, XD, KP_MKOUT),
379 MFPR_168(GPIO113, 0x1C4, GPIO, NONE, NONE, NONE, NONE, NONE, AC97_SYSCLK, NONE),
380 MFPR_168(GPIO114, 0x1C8, GPIO, SSP1, NONE, NONE, NONE, NONE, AC97, NONE),
381 MFPR_168(GPIO115, 0x1CC, GPIO, SSP1, NONE, NONE, NONE, NONE, AC97, NONE),
382 MFPR_168(GPIO116, 0x1D0, GPIO, SSP1_TX, SSP1, NONE, NONE, NONE, AC97, NONE),
383 MFPR_168(GPIO117, 0x1D4, GPIO, SSP1, SSP1_TX, NONE, MMC2_CMD, NONE, AC97, NONE),
384 MFPR_168(GPIO118, 0x1D8, GPIO, SSP2, NONE, NONE, MMC2_CLK, NONE, AC97, KP_MKIN),
385 MFPR_168(GPIO119, 0x1DC, GPIO, SSP2, NONE, NONE, MMC2, NONE, AC97, KP_MKIN),
386 MFPR_168(GPIO120, 0x1E0, GPIO, SSP2, SSP2_TX, NONE, MMC2, NONE, NONE, KP_MKIN),
387 MFPR_168(GPIO121, 0x1E4, GPIO, SSP2_TX, SSP2, NONE, MMC2, NONE, NONE, KP_MKIN),
388 MFPR_168(GPIO122, 0x1E8, GPIO, AC97_SYSCLK, SSP2, PWM, MMC2, NONE, NONE, NONE),
389 MFPR_168(PWR_SCL, 0x1EC, PWRI2C, NONE, NONE, NONE, NONE, NONE, GPIO, MMC4),
390 MFPR_168(PWR_SDA, 0x1F0, PWRI2C, NONE, NONE, NONE, NONE, NONE, GPIO, NONE),
391 MFPR_168(TDI, 0x1F4, JTAG, PWM1, UART2, MMC4, SSP5, NONE, XD, MMC4),
392 MFPR_168(TMS, 0x1F8, JTAG, PWM, UART2, NONE, SSP5, NONE, XD, MMC4),
393 MFPR_168(TCK, 0x1FC, JTAG, PWM, UART2, UART2_TX, SSP5, NONE, XD, MMC4),
394 MFPR_168(TDO, 0x200, JTAG, PWM, UART2_TX, UART2, SSP5_TX, NONE, XD, MMC4),
395 MFPR_168(TRST, 0x204, JTAG, ONE_WIRE, SSP2, SSP3, AC97_SYSCLK, NONE, XD, MMC4),
396 MFPR_168(WAKEUP, 0x208, WAKEUP, ONE_WIRE, PWM1, PWM, SSP2, NONE, GPIO, MMC4),
397};
398
399static const unsigned p168_jtag_pin1[] = {TDI, TMS, TCK, TDO, TRST};
400static const unsigned p168_wakeup_pin1[] = {WAKEUP};
401static const unsigned p168_ssp1rx_pin1[] = {GPIO114, GPIO115, GPIO116};
402static const unsigned p168_ssp1tx_pin1[] = {GPIO117};
403static const unsigned p168_ssp4rx_pin1[] = {GPIO102, GPIO103, GPIO104};
404static const unsigned p168_ssp4tx_pin1[] = {GPIO105};
405static const unsigned p168_ssp5rx_pin1[] = {GPIO86, GPIO88, GPIO89};
406static const unsigned p168_ssp5tx_pin1[] = {GPIO87};
407static const unsigned p168_i2c_pin1[] = {GPIO105, GPIO106};
408static const unsigned p168_pwri2c_pin1[] = {PWR_SCL, PWR_SDA};
409static const unsigned p168_mmc1_pin1[] = {GPIO40, GPIO41, GPIO43, GPIO46,
410 GPIO49, GPIO51, GPIO52, GPIO53};
411static const unsigned p168_mmc2_data_pin1[] = {GPIO90, GPIO91, GPIO92, GPIO93};
412static const unsigned p168_mmc2_cmd_pin1[] = {GPIO94};
413static const unsigned p168_mmc2_clk_pin1[] = {GPIO95};
414static const unsigned p168_mmc3_data_pin1[] = {GPIO0, GPIO1, GPIO2, GPIO3,
415 GPIO4, GPIO5, GPIO6, GPIO7};
416static const unsigned p168_mmc3_cmd_pin1[] = {GPIO9};
417static const unsigned p168_mmc3_clk_pin1[] = {GPIO8};
418static const unsigned p168_eth_pin1[] = {GPIO92, GPIO93, GPIO100, GPIO101,
419 GPIO103};
420static const unsigned p168_ethtx_pin1[] = {GPIO86, GPIO87, GPIO88, GPIO89,
421 GPIO90, GPIO91};
422static const unsigned p168_ethrx_pin1[] = {GPIO94, GPIO95, GPIO96, GPIO97,
423 GPIO98, GPIO99};
424static const unsigned p168_uart1rx_pin1[] = {GPIO107};
425static const unsigned p168_uart1tx_pin1[] = {GPIO108};
426static const unsigned p168_uart3rx_pin1[] = {GPIO98, GPIO100, GPIO101};
427static const unsigned p168_uart3tx_pin1[] = {GPIO99};
428static const unsigned p168_msp_pin1[] = {GPIO40, GPIO41, GPIO42, GPIO43,
429 GPIO44, GPIO50};
430static const unsigned p168_ccic_pin1[] = {GPIO37, GPIO38, GPIO39, GPIO40,
431 GPIO41, GPIO42, GPIO44, GPIO45, GPIO46, GPIO48, GPIO54, GPIO55};
432static const unsigned p168_xd_pin1[] = {GPIO37, GPIO38, GPIO39, GPIO40,
433 GPIO41, GPIO42, GPIO44, GPIO45, GPIO47, GPIO48, GPIO49, GPIO50,
434 GPIO51, GPIO52};
435static const unsigned p168_lcd_pin1[] = {GPIO56, GPIO57, GPIO58, GPIO59,
436 GPIO60, GPIO61, GPIO62, GPIO63, GPIO64, GPIO65, GPIO66, GPIO67,
437 GPIO68, GPIO69, GPIO70, GPIO71, GPIO72, GPIO73, GPIO74, GPIO75,
438 GPIO76, GPIO77, GPIO78, GPIO79, GPIO80, GPIO81, GPIO82, GPIO83};
439static const unsigned p168_dfio_pin1[] = {GPIO0, GPIO1, GPIO2, GPIO3,
440 GPIO4, GPIO5, GPIO6, GPIO7, GPIO8, GPIO9, GPIO10, GPIO11, GPIO12,
441 GPIO13, GPIO14, GPIO15};
442static const unsigned p168_nand_pin1[] = {GPIO16, GPIO17, GPIO21, GPIO22,
443 GPIO24, GPIO26};
444static const unsigned p168_smc_pin1[] = {GPIO23, GPIO25, GPIO29, GPIO35,
445 GPIO36};
446static const unsigned p168_smccs0_pin1[] = {GPIO18};
447static const unsigned p168_smccs1_pin1[] = {GPIO34};
448static const unsigned p168_smcrdy_pin1[] = {GPIO28};
449static const unsigned p168_ac97sysclk_pin1[] = {GPIO113};
450static const unsigned p168_ac97_pin1[] = {GPIO114, GPIO115, GPIO117, GPIO118,
451 GPIO119};
452static const unsigned p168_cf_pin1[] = {GPIO19, GPIO20, GPIO23, GPIO25,
453 GPIO28, GPIO29, GPIO30, GPIO31, GPIO32, GPIO33, GPIO34, GPIO35,
454 GPIO36};
455static const unsigned p168_kpmkin_pin1[] = {GPIO109, GPIO110, GPIO121};
456static const unsigned p168_kpmkout_pin1[] = {GPIO111, GPIO112};
457static const unsigned p168_gpio86_pin1[] = {WAKEUP};
458static const unsigned p168_gpio86_pin2[] = {GPIO86};
459static const unsigned p168_gpio87_pin1[] = {GPIO87};
460static const unsigned p168_gpio87_pin2[] = {PWR_SDA};
461static const unsigned p168_gpio88_pin1[] = {GPIO88};
462static const unsigned p168_gpio88_pin2[] = {PWR_SCL};
463
464static struct pxa3xx_pin_group pxa168_grps[] = {
465 GRP_168("uart1rx-1", UART1, p168_uart1rx_pin1),
466 GRP_168("uart1tx-1", UART1_TX, p168_uart1tx_pin1),
467 GRP_168("uart3rx-1", UART3, p168_uart3rx_pin1),
468 GRP_168("uart3tx-1", UART3_TX, p168_uart3tx_pin1),
469 GRP_168("ssp1rx-1", SSP1, p168_ssp1rx_pin1),
470 GRP_168("ssp1tx-1", SSP1_TX, p168_ssp1tx_pin1),
471 GRP_168("ssp4rx-1", SSP4, p168_ssp4rx_pin1),
472 GRP_168("ssp4tx-1", SSP4_TX, p168_ssp4tx_pin1),
473 GRP_168("ssp5rx-1", SSP5, p168_ssp5rx_pin1),
474 GRP_168("ssp5tx-1", SSP5_TX, p168_ssp5tx_pin1),
475 GRP_168("jtag", JTAG, p168_jtag_pin1),
476 GRP_168("wakeup", WAKEUP, p168_wakeup_pin1),
477 GRP_168("i2c", I2C, p168_i2c_pin1),
478 GRP_168("pwri2c", PWRI2C, p168_pwri2c_pin1),
479 GRP_168("mmc1 8p1", MMC1, p168_mmc1_pin1),
480 GRP_168("mmc2 4p1", MMC2, p168_mmc2_data_pin1),
481 GRP_168("mmc2 cmd1", MMC2_CMD, p168_mmc2_cmd_pin1),
482 GRP_168("mmc2 clk1", MMC2_CLK, p168_mmc2_clk_pin1),
483 GRP_168("mmc3 8p1", MMC3, p168_mmc3_data_pin1),
484 GRP_168("mmc3 cmd1", MMC3_CMD, p168_mmc3_cmd_pin1),
485 GRP_168("mmc3 clk1", MMC3_CLK, p168_mmc3_clk_pin1),
486 GRP_168("eth", ETH, p168_eth_pin1),
487 GRP_168("eth rx", ETH_RX, p168_ethrx_pin1),
488 GRP_168("eth tx", ETH_TX, p168_ethtx_pin1),
489 GRP_168("msp", MSP, p168_msp_pin1),
490 GRP_168("ccic", CCIC, p168_ccic_pin1),
491 GRP_168("xd", XD, p168_xd_pin1),
492 GRP_168("lcd", LCD, p168_lcd_pin1),
493 GRP_168("dfio", DFIO, p168_dfio_pin1),
494 GRP_168("nand", NAND, p168_nand_pin1),
495 GRP_168("smc", SMC, p168_smc_pin1),
496 GRP_168("smc cs0", SMC_CS0, p168_smccs0_pin1),
497 GRP_168("smc cs1", SMC_CS1, p168_smccs1_pin1),
498 GRP_168("smc rdy", SMC_RDY, p168_smcrdy_pin1),
499 GRP_168("ac97 sysclk", AC97_SYSCLK, p168_ac97sysclk_pin1),
500 GRP_168("ac97", AC97, p168_ac97_pin1),
501 GRP_168("cf", CF, p168_cf_pin1),
502 GRP_168("kp mkin 3p1", KP_MKIN, p168_kpmkin_pin1),
503 GRP_168("kp mkout 2p1", KP_MKOUT, p168_kpmkout_pin1),
504 GRP_168("gpio86-1", GPIO, p168_gpio86_pin1),
505 GRP_168("gpio86-2", GPIO, p168_gpio86_pin2),
506 GRP_168("gpio87-1", GPIO, p168_gpio87_pin1),
507 GRP_168("gpio87-2", GPIO, p168_gpio87_pin2),
508 GRP_168("gpio88-1", GPIO, p168_gpio88_pin1),
509 GRP_168("gpio88-2", GPIO, p168_gpio88_pin2),
510};
511
512static const char * const p168_uart1rx_grps[] = {"uart1rx-1"};
513static const char * const p168_uart1tx_grps[] = {"uart1tx-1"};
514static const char * const p168_uart3rx_grps[] = {"uart3rx-1"};
515static const char * const p168_uart3tx_grps[] = {"uart3tx-1"};
516static const char * const p168_ssp1rx_grps[] = {"ssp1rx-1"};
517static const char * const p168_ssp1tx_grps[] = {"ssp1tx-1"};
518static const char * const p168_ssp4rx_grps[] = {"ssp4rx-1"};
519static const char * const p168_ssp4tx_grps[] = {"ssp4tx-1"};
520static const char * const p168_ssp5rx_grps[] = {"ssp5rx-1"};
521static const char * const p168_ssp5tx_grps[] = {"ssp5tx-1"};
522static const char * const p168_i2c_grps[] = {"i2c"};
523static const char * const p168_pwri2c_grps[] = {"pwri2c"};
524static const char * const p168_mmc1_grps[] = {"mmc1 8p1"};
525static const char * const p168_mmc2_data_grps[] = {"mmc2 4p1"};
526static const char * const p168_mmc2_cmd_grps[] = {"mmc2 cmd1"};
527static const char * const p168_mmc2_clk_grps[] = {"mmc2 clk1"};
528static const char * const p168_mmc3_data_grps[] = {"mmc3 8p1"};
529static const char * const p168_mmc3_cmd_grps[] = {"mmc3 cmd1"};
530static const char * const p168_mmc3_clk_grps[] = {"mmc3 clk1"};
531static const char * const p168_eth_grps[] = {"eth"};
532static const char * const p168_ethrx_grps[] = {"eth rx"};
533static const char * const p168_ethtx_grps[] = {"eth tx"};
534static const char * const p168_msp_grps[] = {"msp"};
535static const char * const p168_ccic_grps[] = {"ccic"};
536static const char * const p168_xd_grps[] = {"xd"};
537static const char * const p168_lcd_grps[] = {"lcd"};
538static const char * const p168_dfio_grps[] = {"dfio"};
539static const char * const p168_nand_grps[] = {"nand"};
540static const char * const p168_smc_grps[] = {"smc"};
541static const char * const p168_smccs0_grps[] = {"smc cs0"};
542static const char * const p168_smccs1_grps[] = {"smc cs1"};
543static const char * const p168_smcrdy_grps[] = {"smc rdy"};
544static const char * const p168_ac97sysclk_grps[] = {"ac97 sysclk"};
545static const char * const p168_ac97_grps[] = {"ac97"};
546static const char * const p168_cf_grps[] = {"cf"};
547static const char * const p168_kpmkin_grps[] = {"kp mkin 3p1"};
548static const char * const p168_kpmkout_grps[] = {"kp mkout 2p1"};
549static const char * const p168_gpio86_grps[] = {"gpio86-1", "gpio86-2"};
550static const char * const p168_gpio87_grps[] = {"gpio87-1", "gpio87-2"};
551static const char * const p168_gpio88_grps[] = {"gpio88-1", "gpio88-2"};
552
553static struct pxa3xx_pmx_func pxa168_funcs[] = {
554 {"uart1 rx", ARRAY_AND_SIZE(p168_uart1rx_grps)},
555 {"uart1 tx", ARRAY_AND_SIZE(p168_uart1tx_grps)},
556 {"uart3 rx", ARRAY_AND_SIZE(p168_uart3rx_grps)},
557 {"uart3 tx", ARRAY_AND_SIZE(p168_uart3tx_grps)},
558 {"ssp1 rx", ARRAY_AND_SIZE(p168_ssp1rx_grps)},
559 {"ssp1 tx", ARRAY_AND_SIZE(p168_ssp1tx_grps)},
560 {"ssp4 rx", ARRAY_AND_SIZE(p168_ssp4rx_grps)},
561 {"ssp4 tx", ARRAY_AND_SIZE(p168_ssp4tx_grps)},
562 {"ssp5 rx", ARRAY_AND_SIZE(p168_ssp5rx_grps)},
563 {"ssp5 tx", ARRAY_AND_SIZE(p168_ssp5tx_grps)},
564 {"i2c", ARRAY_AND_SIZE(p168_i2c_grps)},
565 {"pwri2c", ARRAY_AND_SIZE(p168_pwri2c_grps)},
566 {"mmc1", ARRAY_AND_SIZE(p168_mmc1_grps)},
567 {"mmc2", ARRAY_AND_SIZE(p168_mmc2_data_grps)},
568 {"mmc2 cmd", ARRAY_AND_SIZE(p168_mmc2_cmd_grps)},
569 {"mmc2 clk", ARRAY_AND_SIZE(p168_mmc2_clk_grps)},
570 {"mmc3", ARRAY_AND_SIZE(p168_mmc3_data_grps)},
571 {"mmc3 cmd", ARRAY_AND_SIZE(p168_mmc3_cmd_grps)},
572 {"mmc3 clk", ARRAY_AND_SIZE(p168_mmc3_clk_grps)},
573 {"eth", ARRAY_AND_SIZE(p168_eth_grps)},
574 {"eth rx", ARRAY_AND_SIZE(p168_ethrx_grps)},
575 {"eth tx", ARRAY_AND_SIZE(p168_ethtx_grps)},
576 {"msp", ARRAY_AND_SIZE(p168_msp_grps)},
577 {"ccic", ARRAY_AND_SIZE(p168_ccic_grps)},
578 {"xd", ARRAY_AND_SIZE(p168_xd_grps)},
579 {"lcd", ARRAY_AND_SIZE(p168_lcd_grps)},
580 {"dfio", ARRAY_AND_SIZE(p168_dfio_grps)},
581 {"nand", ARRAY_AND_SIZE(p168_nand_grps)},
582 {"smc", ARRAY_AND_SIZE(p168_smc_grps)},
583 {"smc cs0", ARRAY_AND_SIZE(p168_smccs0_grps)},
584 {"smc cs1", ARRAY_AND_SIZE(p168_smccs1_grps)},
585 {"smc rdy", ARRAY_AND_SIZE(p168_smcrdy_grps)},
586 {"ac97", ARRAY_AND_SIZE(p168_ac97_grps)},
587 {"ac97 sysclk", ARRAY_AND_SIZE(p168_ac97sysclk_grps)},
588 {"cf", ARRAY_AND_SIZE(p168_cf_grps)},
589 {"kpmkin", ARRAY_AND_SIZE(p168_kpmkin_grps)},
590 {"kpmkout", ARRAY_AND_SIZE(p168_kpmkout_grps)},
591 {"gpio86", ARRAY_AND_SIZE(p168_gpio86_grps)},
592 {"gpio87", ARRAY_AND_SIZE(p168_gpio87_grps)},
593 {"gpio88", ARRAY_AND_SIZE(p168_gpio88_grps)},
594};
595
596static struct pinctrl_desc pxa168_pctrl_desc = {
597 .name = "pxa168-pinctrl",
598 .owner = THIS_MODULE,
599};
600
601static struct pxa3xx_pinmux_info pxa168_info = {
602 .mfp = pxa168_mfp,
603 .num_mfp = ARRAY_SIZE(pxa168_mfp),
604 .grps = pxa168_grps,
605 .num_grps = ARRAY_SIZE(pxa168_grps),
606 .funcs = pxa168_funcs,
607 .num_funcs = ARRAY_SIZE(pxa168_funcs),
608 .num_gpio = 128,
609 .desc = &pxa168_pctrl_desc,
610 .pads = pxa168_pads,
611 .num_pads = ARRAY_SIZE(pxa168_pads),
612
613 .cputype = PINCTRL_PXA168,
614 .ds_mask = PXA168_DS_MASK,
615 .ds_shift = PXA168_DS_SHIFT,
616};
617
618static int __devinit pxa168_pinmux_probe(struct platform_device *pdev)
619{
620 return pxa3xx_pinctrl_register(pdev, &pxa168_info);
621}
622
623static int __devexit pxa168_pinmux_remove(struct platform_device *pdev)
624{
625 return pxa3xx_pinctrl_unregister(pdev);
626}
627
628static struct platform_driver pxa168_pinmux_driver = {
629 .driver = {
630 .name = "pxa168-pinmux",
631 .owner = THIS_MODULE,
632 },
633 .probe = pxa168_pinmux_probe,
634 .remove = __devexit_p(pxa168_pinmux_remove),
635};
636
637static int __init pxa168_pinmux_init(void)
638{
639 return platform_driver_register(&pxa168_pinmux_driver);
640}
641core_initcall_sync(pxa168_pinmux_init);
642
643static void __exit pxa168_pinmux_exit(void)
644{
645 platform_driver_unregister(&pxa168_pinmux_driver);
646}
647module_exit(pxa168_pinmux_exit);
648
649MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com>");
650MODULE_DESCRIPTION("PXA3xx pin control driver");
651MODULE_LICENSE("GPL v2");
diff --git a/drivers/pinctrl/pinctrl-pxa3xx.c b/drivers/pinctrl/pinctrl-pxa3xx.c
new file mode 100644
index 000000000000..079dce0e93e9
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-pxa3xx.c
@@ -0,0 +1,244 @@
1/*
2 * linux/drivers/pinctrl/pinctrl-pxa3xx.c
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * publishhed by the Free Software Foundation.
7 *
8 * Copyright (C) 2011, Marvell Technology Group Ltd.
9 *
10 * Author: Haojian Zhuang <haojian.zhuang@marvell.com>
11 *
12 */
13
14#include <linux/module.h>
15#include <linux/device.h>
16#include <linux/io.h>
17#include <linux/platform_device.h>
18#include <linux/slab.h>
19#include "pinctrl-pxa3xx.h"
20
21static struct pinctrl_gpio_range pxa3xx_pinctrl_gpio_range = {
22 .name = "PXA3xx GPIO",
23 .id = 0,
24 .base = 0,
25 .pin_base = 0,
26};
27
28static int pxa3xx_list_groups(struct pinctrl_dev *pctrldev, unsigned selector)
29{
30 struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
31 if (selector >= info->num_grps)
32 return -EINVAL;
33 return 0;
34}
35
36static const char *pxa3xx_get_group_name(struct pinctrl_dev *pctrldev,
37 unsigned selector)
38{
39 struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
40 if (selector >= info->num_grps)
41 return NULL;
42 return info->grps[selector].name;
43}
44
45static int pxa3xx_get_group_pins(struct pinctrl_dev *pctrldev,
46 unsigned selector,
47 const unsigned **pins,
48 unsigned *num_pins)
49{
50 struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
51 if (selector >= info->num_grps)
52 return -EINVAL;
53 *pins = info->grps[selector].pins;
54 *num_pins = info->grps[selector].npins;
55 return 0;
56}
57
58static struct pinctrl_ops pxa3xx_pctrl_ops = {
59 .list_groups = pxa3xx_list_groups,
60 .get_group_name = pxa3xx_get_group_name,
61 .get_group_pins = pxa3xx_get_group_pins,
62};
63
64static int pxa3xx_pmx_list_func(struct pinctrl_dev *pctrldev, unsigned func)
65{
66 struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
67 if (func >= info->num_funcs)
68 return -EINVAL;
69 return 0;
70}
71
72static const char *pxa3xx_pmx_get_func_name(struct pinctrl_dev *pctrldev,
73 unsigned func)
74{
75 struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
76 return info->funcs[func].name;
77}
78
79static int pxa3xx_pmx_get_groups(struct pinctrl_dev *pctrldev, unsigned func,
80 const char * const **groups,
81 unsigned * const num_groups)
82{
83 struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
84 *groups = info->funcs[func].groups;
85 *num_groups = info->funcs[func].num_groups;
86 return 0;
87}
88
89/* Return function number. If failure, return negative value. */
90static int match_mux(struct pxa3xx_mfp_pin *mfp, unsigned mux)
91{
92 int i;
93 for (i = 0; i < PXA3xx_MAX_MUX; i++) {
94 if (mfp->func[i] == mux)
95 break;
96 }
97 if (i >= PXA3xx_MAX_MUX)
98 return -EINVAL;
99 return i;
100}
101
102/* check whether current pin configuration is valid. Negative for failure */
103static int match_group_mux(struct pxa3xx_pin_group *grp,
104 struct pxa3xx_pinmux_info *info,
105 unsigned mux)
106{
107 int i, pin, ret = 0;
108 for (i = 0; i < grp->npins; i++) {
109 pin = grp->pins[i];
110 ret = match_mux(&info->mfp[pin], mux);
111 if (ret < 0) {
112 dev_err(info->dev, "Can't find mux %d on pin%d\n",
113 mux, pin);
114 break;
115 }
116 }
117 return ret;
118}
119
120static int pxa3xx_pmx_enable(struct pinctrl_dev *pctrldev, unsigned func,
121 unsigned group)
122{
123 struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
124 struct pxa3xx_pin_group *pin_grp = &info->grps[group];
125 unsigned int data;
126 int i, mfpr, pin, pin_func;
127
128 if (!pin_grp->npins ||
129 (match_group_mux(pin_grp, info, pin_grp->mux) < 0)) {
130 dev_err(info->dev, "Failed to set the pin group: %d\n", group);
131 return -EINVAL;
132 }
133 for (i = 0; i < pin_grp->npins; i++) {
134 pin = pin_grp->pins[i];
135 pin_func = match_mux(&info->mfp[pin], pin_grp->mux);
136 mfpr = info->mfp[pin].mfpr;
137 data = readl_relaxed(info->virt_base + mfpr);
138 data &= ~MFPR_FUNC_MASK;
139 data |= pin_func;
140 writel_relaxed(data, info->virt_base + mfpr);
141 }
142 return 0;
143}
144
145static void pxa3xx_pmx_disable(struct pinctrl_dev *pctrldev, unsigned func,
146 unsigned group)
147{
148}
149
150static int pxa3xx_pmx_request_gpio(struct pinctrl_dev *pctrldev,
151 struct pinctrl_gpio_range *range,
152 unsigned pin)
153{
154 struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
155 unsigned int data;
156 int pin_func, mfpr;
157
158 pin_func = match_mux(&info->mfp[pin], PXA3xx_MUX_GPIO);
159 if (pin_func < 0) {
160 dev_err(info->dev, "No GPIO function on pin%d (%s)\n",
161 pin, info->pads[pin].name);
162 return -EINVAL;
163 }
164 mfpr = info->mfp[pin].mfpr;
165 /* write gpio function into mfpr register */
166 data = readl_relaxed(info->virt_base + mfpr) & ~MFPR_FUNC_MASK;
167 data |= pin_func;
168 writel_relaxed(data, info->virt_base + mfpr);
169 return 0;
170}
171
172static struct pinmux_ops pxa3xx_pmx_ops = {
173 .list_functions = pxa3xx_pmx_list_func,
174 .get_function_name = pxa3xx_pmx_get_func_name,
175 .get_function_groups = pxa3xx_pmx_get_groups,
176 .enable = pxa3xx_pmx_enable,
177 .disable = pxa3xx_pmx_disable,
178 .gpio_request_enable = pxa3xx_pmx_request_gpio,
179};
180
181int pxa3xx_pinctrl_register(struct platform_device *pdev,
182 struct pxa3xx_pinmux_info *info)
183{
184 struct pinctrl_desc *desc;
185 struct resource *res;
186 int ret = 0;
187
188 if (!info || !info->cputype)
189 return -EINVAL;
190 desc = info->desc;
191 desc->pins = info->pads;
192 desc->npins = info->num_pads;
193 desc->pctlops = &pxa3xx_pctrl_ops;
194 desc->pmxops = &pxa3xx_pmx_ops;
195 info->dev = &pdev->dev;
196 pxa3xx_pinctrl_gpio_range.npins = info->num_gpio;
197
198 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
199 if (!res)
200 return -ENOENT;
201 info->phy_base = res->start;
202 info->phy_size = resource_size(res);
203 info->virt_base = ioremap(info->phy_base, info->phy_size);
204 if (!info->virt_base)
205 return -ENOMEM;
206 info->pctrl = pinctrl_register(desc, &pdev->dev, info);
207 if (!info->pctrl) {
208 dev_err(&pdev->dev, "failed to register PXA pinmux driver\n");
209 ret = -EINVAL;
210 goto err;
211 }
212 pinctrl_add_gpio_range(info->pctrl, &pxa3xx_pinctrl_gpio_range);
213 platform_set_drvdata(pdev, info);
214 return 0;
215err:
216 iounmap(info->virt_base);
217 return ret;
218}
219
220int pxa3xx_pinctrl_unregister(struct platform_device *pdev)
221{
222 struct pxa3xx_pinmux_info *info = platform_get_drvdata(pdev);
223
224 pinctrl_unregister(info->pctrl);
225 iounmap(info->virt_base);
226 platform_set_drvdata(pdev, NULL);
227 return 0;
228}
229
230static int __init pxa3xx_pinctrl_init(void)
231{
232 pr_info("pxa3xx-pinctrl: PXA3xx pinctrl driver initializing\n");
233 return 0;
234}
235core_initcall_sync(pxa3xx_pinctrl_init);
236
237static void __exit pxa3xx_pinctrl_exit(void)
238{
239}
240module_exit(pxa3xx_pinctrl_exit);
241
242MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com>");
243MODULE_DESCRIPTION("PXA3xx pin control driver");
244MODULE_LICENSE("GPL v2");
diff --git a/drivers/pinctrl/pinctrl-pxa3xx.h b/drivers/pinctrl/pinctrl-pxa3xx.h
new file mode 100644
index 000000000000..8135744d6599
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-pxa3xx.h
@@ -0,0 +1,264 @@
1/*
2 * linux/drivers/pinctrl/pinctrl-pxa3xx.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * publishhed by the Free Software Foundation.
7 *
8 * Copyright (C) 2011, Marvell Technology Group Ltd.
9 *
10 * Author: Haojian Zhuang <haojian.zhuang@marvell.com>
11 *
12 */
13
14#ifndef __PINCTRL_PXA3XX_H
15
16#include <linux/pinctrl/pinctrl.h>
17#include <linux/pinctrl/pinmux.h>
18
19#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
20
21#define PXA3xx_MUX_GPIO 0
22
23#define PXA3xx_MAX_MUX 8
24#define MFPR_FUNC_MASK 0x7
25
26enum pxa_cpu_type {
27 PINCTRL_INVALID = 0,
28 PINCTRL_PXA300,
29 PINCTRL_PXA310,
30 PINCTRL_PXA320,
31 PINCTRL_PXA168,
32 PINCTRL_PXA910,
33 PINCTRL_PXA930,
34 PINCTRL_PXA955,
35 PINCTRL_MMP2,
36 PINCTRL_MAX,
37};
38
39struct pxa3xx_mfp_pin {
40 const char *name;
41 const unsigned int pin;
42 const unsigned int mfpr; /* register offset */
43 const unsigned short func[8];
44};
45
46struct pxa3xx_pin_group {
47 const char *name;
48 const unsigned mux;
49 const unsigned *pins;
50 const unsigned npins;
51};
52
53struct pxa3xx_pmx_func {
54 const char *name;
55 const char * const * groups;
56 const unsigned num_groups;
57};
58
59struct pxa3xx_pinmux_info {
60 struct device *dev;
61 struct pinctrl_dev *pctrl;
62 enum pxa_cpu_type cputype;
63 unsigned int phy_base;
64 unsigned int phy_size;
65 void __iomem *virt_base;
66
67 struct pxa3xx_mfp_pin *mfp;
68 unsigned int num_mfp;
69 struct pxa3xx_pin_group *grps;
70 unsigned int num_grps;
71 struct pxa3xx_pmx_func *funcs;
72 unsigned int num_funcs;
73 unsigned int num_gpio;
74 struct pinctrl_desc *desc;
75 struct pinctrl_pin_desc *pads;
76 unsigned int num_pads;
77
78 unsigned ds_mask; /* drive strength mask */
79 unsigned ds_shift; /* drive strength shift */
80 unsigned slp_mask; /* sleep mask */
81 unsigned slp_input_low;
82 unsigned slp_input_high;
83 unsigned slp_output_low;
84 unsigned slp_output_high;
85 unsigned slp_float;
86};
87
88enum pxa3xx_pin_list {
89 GPIO0 = 0,
90 GPIO1,
91 GPIO2,
92 GPIO3,
93 GPIO4,
94 GPIO5,
95 GPIO6,
96 GPIO7,
97 GPIO8,
98 GPIO9,
99 GPIO10, /* 10 */
100 GPIO11,
101 GPIO12,
102 GPIO13,
103 GPIO14,
104 GPIO15,
105 GPIO16,
106 GPIO17,
107 GPIO18,
108 GPIO19,
109 GPIO20, /* 20 */
110 GPIO21,
111 GPIO22,
112 GPIO23,
113 GPIO24,
114 GPIO25,
115 GPIO26,
116 GPIO27,
117 GPIO28,
118 GPIO29,
119 GPIO30, /* 30 */
120 GPIO31,
121 GPIO32,
122 GPIO33,
123 GPIO34,
124 GPIO35,
125 GPIO36,
126 GPIO37,
127 GPIO38,
128 GPIO39,
129 GPIO40, /* 40 */
130 GPIO41,
131 GPIO42,
132 GPIO43,
133 GPIO44,
134 GPIO45,
135 GPIO46,
136 GPIO47,
137 GPIO48,
138 GPIO49,
139 GPIO50, /* 50 */
140 GPIO51,
141 GPIO52,
142 GPIO53,
143 GPIO54,
144 GPIO55,
145 GPIO56,
146 GPIO57,
147 GPIO58,
148 GPIO59,
149 GPIO60, /* 60 */
150 GPIO61,
151 GPIO62,
152 GPIO63,
153 GPIO64,
154 GPIO65,
155 GPIO66,
156 GPIO67,
157 GPIO68,
158 GPIO69,
159 GPIO70, /* 70 */
160 GPIO71,
161 GPIO72,
162 GPIO73,
163 GPIO74,
164 GPIO75,
165 GPIO76,
166 GPIO77,
167 GPIO78,
168 GPIO79,
169 GPIO80, /* 80 */
170 GPIO81,
171 GPIO82,
172 GPIO83,
173 GPIO84,
174 GPIO85,
175 GPIO86,
176 GPIO87,
177 GPIO88,
178 GPIO89,
179 GPIO90, /* 90 */
180 GPIO91,
181 GPIO92,
182 GPIO93,
183 GPIO94,
184 GPIO95,
185 GPIO96,
186 GPIO97,
187 GPIO98,
188 GPIO99,
189 GPIO100, /* 100 */
190 GPIO101,
191 GPIO102,
192 GPIO103,
193 GPIO104,
194 GPIO105,
195 GPIO106,
196 GPIO107,
197 GPIO108,
198 GPIO109,
199 GPIO110, /* 110 */
200 GPIO111,
201 GPIO112,
202 GPIO113,
203 GPIO114,
204 GPIO115,
205 GPIO116,
206 GPIO117,
207 GPIO118,
208 GPIO119,
209 GPIO120, /* 120 */
210 GPIO121,
211 GPIO122,
212 GPIO123,
213 GPIO124,
214 GPIO125,
215 GPIO126,
216 GPIO127,
217 GPIO128,
218 GPIO129,
219 GPIO130, /* 130 */
220 GPIO131,
221 GPIO132,
222 GPIO133,
223 GPIO134,
224 GPIO135,
225 GPIO136,
226 GPIO137,
227 GPIO138,
228 GPIO139,
229 GPIO140, /* 140 */
230 GPIO141,
231 GPIO142,
232 GPIO143,
233 GPIO144,
234 GPIO145,
235 GPIO146,
236 GPIO147,
237 GPIO148,
238 GPIO149,
239 GPIO150, /* 150 */
240 GPIO151,
241 GPIO152,
242 GPIO153,
243 GPIO154,
244 GPIO155,
245 GPIO156,
246 GPIO157,
247 GPIO158,
248 GPIO159,
249 GPIO160, /* 160 */
250 GPIO161,
251 GPIO162,
252 GPIO163,
253 GPIO164,
254 GPIO165,
255 GPIO166,
256 GPIO167,
257 GPIO168,
258 GPIO169,
259};
260
261extern int pxa3xx_pinctrl_register(struct platform_device *pdev,
262 struct pxa3xx_pinmux_info *info);
263extern int pxa3xx_pinctrl_unregister(struct platform_device *pdev);
264#endif /* __PINCTRL_PXA3XX_H */
diff --git a/drivers/pinctrl/pinctrl-pxa910.c b/drivers/pinctrl/pinctrl-pxa910.c
new file mode 100644
index 000000000000..c72ab4b9cc8c
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-pxa910.c
@@ -0,0 +1,1007 @@
1/*
2 * linux/drivers/pinctrl/pinmux-pxa910.c
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * publishhed by the Free Software Foundation.
7 *
8 * Copyright (C) 2011, Marvell Technology Group Ltd.
9 *
10 * Author: Haojian Zhuang <haojian.zhuang@marvell.com>
11 *
12 */
13
14#include <linux/device.h>
15#include <linux/module.h>
16#include <linux/io.h>
17#include <linux/platform_device.h>
18#include "pinctrl-pxa3xx.h"
19
20#define PXA910_DS_MASK 0x1800
21#define PXA910_DS_SHIFT 11
22#define PXA910_SLEEP_MASK 0x38
23#define PXA910_SLEEP_SELECT (1 << 9)
24#define PXA910_SLEEP_DATA (1 << 8)
25#define PXA910_SLEEP_DIR (1 << 7)
26
27#define MFPR_910(a, r, f0, f1, f2, f3, f4, f5, f6, f7) \
28 { \
29 .name = #a, \
30 .pin = a, \
31 .mfpr = r, \
32 .func = { \
33 PXA910_MUX_##f0, \
34 PXA910_MUX_##f1, \
35 PXA910_MUX_##f2, \
36 PXA910_MUX_##f3, \
37 PXA910_MUX_##f4, \
38 PXA910_MUX_##f5, \
39 PXA910_MUX_##f6, \
40 PXA910_MUX_##f7, \
41 }, \
42 }
43
44#define GRP_910(a, m, p) \
45 { .name = a, .mux = PXA910_MUX_##m, .pins = p, .npins = ARRAY_SIZE(p), }
46
47/* 170 pins */
48enum pxa910_pin_list {
49 /* 0~127: GPIO0~GPIO127 */
50 ND_IO15 = 128,
51 ND_IO14,
52 ND_IO13, /* 130 */
53 ND_IO12,
54 ND_IO11,
55 ND_IO10,
56 ND_IO9,
57 ND_IO8,
58 ND_IO7,
59 ND_IO6,
60 ND_IO5,
61 ND_IO4,
62 ND_IO3, /* 140 */
63 ND_IO2,
64 ND_IO1,
65 ND_IO0,
66 ND_NCS0,
67 ND_NCS1,
68 SM_NCS0,
69 SM_NCS1,
70 ND_NWE,
71 ND_NRE,
72 ND_CLE, /* 150 */
73 ND_ALE,
74 SM_SCLK,
75 ND_RDY0,
76 SM_ADV,
77 ND_RDY1,
78 SM_ADVMUX,
79 SM_RDY,
80 MMC1_DAT7,
81 MMC1_DAT6,
82 MMC1_DAT5, /* 160 */
83 MMC1_DAT4,
84 MMC1_DAT3,
85 MMC1_DAT2,
86 MMC1_DAT1,
87 MMC1_DAT0,
88 MMC1_CMD,
89 MMC1_CLK,
90 MMC1_CD,
91 VCXO_OUT,
92};
93
94enum pxa910_mux {
95 /* PXA3xx_MUX_GPIO = 0 (predefined in pinctrl-pxa3xx.h) */
96 PXA910_MUX_GPIO = 0,
97 PXA910_MUX_NAND,
98 PXA910_MUX_USIM2,
99 PXA910_MUX_EXT_DMA,
100 PXA910_MUX_EXT_INT,
101 PXA910_MUX_MMC1,
102 PXA910_MUX_MMC2,
103 PXA910_MUX_MMC3,
104 PXA910_MUX_SM_INT,
105 PXA910_MUX_PRI_JTAG,
106 PXA910_MUX_SEC1_JTAG,
107 PXA910_MUX_SEC2_JTAG,
108 PXA910_MUX_RESET, /* SLAVE RESET OUT */
109 PXA910_MUX_CLK_REQ,
110 PXA910_MUX_VCXO_REQ,
111 PXA910_MUX_VCXO_OUT,
112 PXA910_MUX_VCXO_REQ2,
113 PXA910_MUX_VCXO_OUT2,
114 PXA910_MUX_SPI,
115 PXA910_MUX_SPI2,
116 PXA910_MUX_GSSP,
117 PXA910_MUX_SSP0,
118 PXA910_MUX_SSP1,
119 PXA910_MUX_SSP2,
120 PXA910_MUX_DSSP2,
121 PXA910_MUX_DSSP3,
122 PXA910_MUX_UART0,
123 PXA910_MUX_UART1,
124 PXA910_MUX_UART2,
125 PXA910_MUX_TWSI,
126 PXA910_MUX_CCIC,
127 PXA910_MUX_PWM0,
128 PXA910_MUX_PWM1,
129 PXA910_MUX_PWM2,
130 PXA910_MUX_PWM3,
131 PXA910_MUX_HSL,
132 PXA910_MUX_ONE_WIRE,
133 PXA910_MUX_LCD,
134 PXA910_MUX_DAC_ST23,
135 PXA910_MUX_ULPI,
136 PXA910_MUX_TB,
137 PXA910_MUX_KP_MK,
138 PXA910_MUX_KP_DK,
139 PXA910_MUX_TCU_GPOA,
140 PXA910_MUX_TCU_GPOB,
141 PXA910_MUX_ROT,
142 PXA910_MUX_TDS,
143 PXA910_MUX_32K_CLK, /* 32KHz CLK OUT */
144 PXA910_MUX_MN_CLK, /* MN CLK OUT */
145 PXA910_MUX_SMC,
146 PXA910_MUX_SM_ADDR18,
147 PXA910_MUX_SM_ADDR19,
148 PXA910_MUX_SM_ADDR20,
149 PXA910_MUX_NONE = 0xffff,
150};
151
152
153static struct pinctrl_pin_desc pxa910_pads[] = {
154 PINCTRL_PIN(GPIO0, "GPIO0"),
155 PINCTRL_PIN(GPIO1, "GPIO1"),
156 PINCTRL_PIN(GPIO2, "GPIO2"),
157 PINCTRL_PIN(GPIO3, "GPIO3"),
158 PINCTRL_PIN(GPIO4, "GPIO4"),
159 PINCTRL_PIN(GPIO5, "GPIO5"),
160 PINCTRL_PIN(GPIO6, "GPIO6"),
161 PINCTRL_PIN(GPIO7, "GPIO7"),
162 PINCTRL_PIN(GPIO8, "GPIO8"),
163 PINCTRL_PIN(GPIO9, "GPIO9"),
164 PINCTRL_PIN(GPIO10, "GPIO10"),
165 PINCTRL_PIN(GPIO11, "GPIO11"),
166 PINCTRL_PIN(GPIO12, "GPIO12"),
167 PINCTRL_PIN(GPIO13, "GPIO13"),
168 PINCTRL_PIN(GPIO14, "GPIO14"),
169 PINCTRL_PIN(GPIO15, "GPIO15"),
170 PINCTRL_PIN(GPIO16, "GPIO16"),
171 PINCTRL_PIN(GPIO17, "GPIO17"),
172 PINCTRL_PIN(GPIO18, "GPIO18"),
173 PINCTRL_PIN(GPIO19, "GPIO19"),
174 PINCTRL_PIN(GPIO20, "GPIO20"),
175 PINCTRL_PIN(GPIO21, "GPIO21"),
176 PINCTRL_PIN(GPIO22, "GPIO22"),
177 PINCTRL_PIN(GPIO23, "GPIO23"),
178 PINCTRL_PIN(GPIO24, "GPIO24"),
179 PINCTRL_PIN(GPIO25, "GPIO25"),
180 PINCTRL_PIN(GPIO26, "GPIO26"),
181 PINCTRL_PIN(GPIO27, "GPIO27"),
182 PINCTRL_PIN(GPIO28, "GPIO28"),
183 PINCTRL_PIN(GPIO29, "GPIO29"),
184 PINCTRL_PIN(GPIO30, "GPIO30"),
185 PINCTRL_PIN(GPIO31, "GPIO31"),
186 PINCTRL_PIN(GPIO32, "GPIO32"),
187 PINCTRL_PIN(GPIO33, "GPIO33"),
188 PINCTRL_PIN(GPIO34, "GPIO34"),
189 PINCTRL_PIN(GPIO35, "GPIO35"),
190 PINCTRL_PIN(GPIO36, "GPIO36"),
191 PINCTRL_PIN(GPIO37, "GPIO37"),
192 PINCTRL_PIN(GPIO38, "GPIO38"),
193 PINCTRL_PIN(GPIO39, "GPIO39"),
194 PINCTRL_PIN(GPIO40, "GPIO40"),
195 PINCTRL_PIN(GPIO41, "GPIO41"),
196 PINCTRL_PIN(GPIO42, "GPIO42"),
197 PINCTRL_PIN(GPIO43, "GPIO43"),
198 PINCTRL_PIN(GPIO44, "GPIO44"),
199 PINCTRL_PIN(GPIO45, "GPIO45"),
200 PINCTRL_PIN(GPIO46, "GPIO46"),
201 PINCTRL_PIN(GPIO47, "GPIO47"),
202 PINCTRL_PIN(GPIO48, "GPIO48"),
203 PINCTRL_PIN(GPIO49, "GPIO49"),
204 PINCTRL_PIN(GPIO50, "GPIO50"),
205 PINCTRL_PIN(GPIO51, "GPIO51"),
206 PINCTRL_PIN(GPIO52, "GPIO52"),
207 PINCTRL_PIN(GPIO53, "GPIO53"),
208 PINCTRL_PIN(GPIO54, "GPIO54"),
209 PINCTRL_PIN(GPIO55, "GPIO55"),
210 PINCTRL_PIN(GPIO56, "GPIO56"),
211 PINCTRL_PIN(GPIO57, "GPIO57"),
212 PINCTRL_PIN(GPIO58, "GPIO58"),
213 PINCTRL_PIN(GPIO59, "GPIO59"),
214 PINCTRL_PIN(GPIO60, "GPIO60"),
215 PINCTRL_PIN(GPIO61, "GPIO61"),
216 PINCTRL_PIN(GPIO62, "GPIO62"),
217 PINCTRL_PIN(GPIO63, "GPIO63"),
218 PINCTRL_PIN(GPIO64, "GPIO64"),
219 PINCTRL_PIN(GPIO65, "GPIO65"),
220 PINCTRL_PIN(GPIO66, "GPIO66"),
221 PINCTRL_PIN(GPIO67, "GPIO67"),
222 PINCTRL_PIN(GPIO68, "GPIO68"),
223 PINCTRL_PIN(GPIO69, "GPIO69"),
224 PINCTRL_PIN(GPIO70, "GPIO70"),
225 PINCTRL_PIN(GPIO71, "GPIO71"),
226 PINCTRL_PIN(GPIO72, "GPIO72"),
227 PINCTRL_PIN(GPIO73, "GPIO73"),
228 PINCTRL_PIN(GPIO74, "GPIO74"),
229 PINCTRL_PIN(GPIO75, "GPIO75"),
230 PINCTRL_PIN(GPIO76, "GPIO76"),
231 PINCTRL_PIN(GPIO77, "GPIO77"),
232 PINCTRL_PIN(GPIO78, "GPIO78"),
233 PINCTRL_PIN(GPIO79, "GPIO79"),
234 PINCTRL_PIN(GPIO80, "GPIO80"),
235 PINCTRL_PIN(GPIO81, "GPIO81"),
236 PINCTRL_PIN(GPIO82, "GPIO82"),
237 PINCTRL_PIN(GPIO83, "GPIO83"),
238 PINCTRL_PIN(GPIO84, "GPIO84"),
239 PINCTRL_PIN(GPIO85, "GPIO85"),
240 PINCTRL_PIN(GPIO86, "GPIO86"),
241 PINCTRL_PIN(GPIO87, "GPIO87"),
242 PINCTRL_PIN(GPIO88, "GPIO88"),
243 PINCTRL_PIN(GPIO89, "GPIO89"),
244 PINCTRL_PIN(GPIO90, "GPIO90"),
245 PINCTRL_PIN(GPIO91, "GPIO91"),
246 PINCTRL_PIN(GPIO92, "GPIO92"),
247 PINCTRL_PIN(GPIO93, "GPIO93"),
248 PINCTRL_PIN(GPIO94, "GPIO94"),
249 PINCTRL_PIN(GPIO95, "GPIO95"),
250 PINCTRL_PIN(GPIO96, "GPIO96"),
251 PINCTRL_PIN(GPIO97, "GPIO97"),
252 PINCTRL_PIN(GPIO98, "GPIO98"),
253 PINCTRL_PIN(GPIO99, "GPIO99"),
254 PINCTRL_PIN(GPIO100, "GPIO100"),
255 PINCTRL_PIN(GPIO101, "GPIO101"),
256 PINCTRL_PIN(GPIO102, "GPIO102"),
257 PINCTRL_PIN(GPIO103, "GPIO103"),
258 PINCTRL_PIN(GPIO104, "GPIO104"),
259 PINCTRL_PIN(GPIO105, "GPIO105"),
260 PINCTRL_PIN(GPIO106, "GPIO106"),
261 PINCTRL_PIN(GPIO107, "GPIO107"),
262 PINCTRL_PIN(GPIO108, "GPIO108"),
263 PINCTRL_PIN(GPIO109, "GPIO109"),
264 PINCTRL_PIN(GPIO110, "GPIO110"),
265 PINCTRL_PIN(GPIO111, "GPIO111"),
266 PINCTRL_PIN(GPIO112, "GPIO112"),
267 PINCTRL_PIN(GPIO113, "GPIO113"),
268 PINCTRL_PIN(GPIO114, "GPIO114"),
269 PINCTRL_PIN(GPIO115, "GPIO115"),
270 PINCTRL_PIN(GPIO116, "GPIO116"),
271 PINCTRL_PIN(GPIO117, "GPIO117"),
272 PINCTRL_PIN(GPIO118, "GPIO118"),
273 PINCTRL_PIN(GPIO119, "GPIO119"),
274 PINCTRL_PIN(GPIO120, "GPIO120"),
275 PINCTRL_PIN(GPIO121, "GPIO121"),
276 PINCTRL_PIN(GPIO122, "GPIO122"),
277 PINCTRL_PIN(GPIO123, "GPIO123"),
278 PINCTRL_PIN(GPIO124, "GPIO124"),
279 PINCTRL_PIN(GPIO125, "GPIO125"),
280 PINCTRL_PIN(GPIO126, "GPIO126"),
281 PINCTRL_PIN(GPIO127, "GPIO127"),
282 PINCTRL_PIN(ND_IO15, "ND_IO15"),
283 PINCTRL_PIN(ND_IO14, "ND_IO14"),
284 PINCTRL_PIN(ND_IO13, "ND_IO13"),
285 PINCTRL_PIN(ND_IO12, "ND_IO12"),
286 PINCTRL_PIN(ND_IO11, "ND_IO11"),
287 PINCTRL_PIN(ND_IO10, "ND_IO10"),
288 PINCTRL_PIN(ND_IO9, "ND_IO9"),
289 PINCTRL_PIN(ND_IO8, "ND_IO8"),
290 PINCTRL_PIN(ND_IO7, "ND_IO7"),
291 PINCTRL_PIN(ND_IO6, "ND_IO6"),
292 PINCTRL_PIN(ND_IO5, "ND_IO5"),
293 PINCTRL_PIN(ND_IO4, "ND_IO4"),
294 PINCTRL_PIN(ND_IO3, "ND_IO3"),
295 PINCTRL_PIN(ND_IO2, "ND_IO2"),
296 PINCTRL_PIN(ND_IO1, "ND_IO1"),
297 PINCTRL_PIN(ND_IO0, "ND_IO0"),
298 PINCTRL_PIN(ND_NCS0, "ND_NCS0_SM_NCS2"),
299 PINCTRL_PIN(ND_NCS1, "ND_NCS1_SM_NCS3"),
300 PINCTRL_PIN(SM_NCS0, "SM_NCS0"),
301 PINCTRL_PIN(SM_NCS1, "SM_NCS1"),
302 PINCTRL_PIN(ND_NWE, "ND_NWE"),
303 PINCTRL_PIN(ND_NRE, "ND_NRE"),
304 PINCTRL_PIN(ND_CLE, "ND_CLE_SM_NOE"),
305 PINCTRL_PIN(ND_ALE, "ND_ALE_SM_NWE"),
306 PINCTRL_PIN(SM_SCLK, "SM_SCLK"),
307 PINCTRL_PIN(ND_RDY0, "ND_RDY0"),
308 PINCTRL_PIN(SM_ADV, "SM_ADV"),
309 PINCTRL_PIN(ND_RDY1, "ND_RDY1"),
310 PINCTRL_PIN(SM_RDY, "SM_RDY"),
311 PINCTRL_PIN(MMC1_DAT7, "MMC1_DAT7"),
312 PINCTRL_PIN(MMC1_DAT6, "MMC1_DAT6"),
313 PINCTRL_PIN(MMC1_DAT5, "MMC1_DAT5"),
314 PINCTRL_PIN(MMC1_DAT4, "MMC1_DAT4"),
315 PINCTRL_PIN(MMC1_DAT3, "MMC1_DAT3"),
316 PINCTRL_PIN(MMC1_DAT2, "MMC1_DAT2"),
317 PINCTRL_PIN(MMC1_DAT1, "MMC1_DAT1"),
318 PINCTRL_PIN(MMC1_DAT0, "MMC1_DAT0"),
319 PINCTRL_PIN(MMC1_CMD, "MMC1 CMD"),
320 PINCTRL_PIN(MMC1_CLK, "MMC1 CLK"),
321 PINCTRL_PIN(MMC1_CD, "MMC1 CD"),
322 PINCTRL_PIN(VCXO_OUT, "VCXO_OUT"),
323};
324
325struct pxa3xx_mfp_pin pxa910_mfp[] = {
326 /* pin offs f0 f1 f2 f3 f4 f5 f6 f7 */
327 MFPR_910(GPIO0, 0x0DC, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE),
328 MFPR_910(GPIO1, 0x0E0, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE),
329 MFPR_910(GPIO2, 0x0E4, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE),
330 MFPR_910(GPIO3, 0x0E8, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE),
331 MFPR_910(GPIO4, 0x0EC, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE),
332 MFPR_910(GPIO5, 0x0F0, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE),
333 MFPR_910(GPIO6, 0x0F4, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE),
334 MFPR_910(GPIO7, 0x0F8, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE),
335 MFPR_910(GPIO8, 0x0FC, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE),
336 MFPR_910(GPIO9, 0x100, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE),
337 MFPR_910(GPIO10, 0x104, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE),
338 MFPR_910(GPIO11, 0x108, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE),
339 MFPR_910(GPIO12, 0x10C, GPIO, KP_MK, NONE, NONE, KP_DK, NONE, NONE, NONE),
340 MFPR_910(GPIO13, 0x110, GPIO, KP_MK, NONE, NONE, KP_DK, NONE, NONE, NONE),
341 MFPR_910(GPIO14, 0x114, GPIO, KP_MK, NONE, NONE, KP_DK, TB, NONE, NONE),
342 MFPR_910(GPIO15, 0x118, GPIO, KP_MK, NONE, NONE, KP_DK, TB, NONE, NONE),
343 MFPR_910(GPIO16, 0x11C, GPIO, KP_DK, NONE, NONE, NONE, TB, NONE, NONE),
344 MFPR_910(GPIO17, 0x120, GPIO, KP_DK, NONE, NONE, NONE, TB, NONE, NONE),
345 MFPR_910(GPIO18, 0x124, GPIO, KP_DK, NONE, NONE, ROT, NONE, NONE, NONE),
346 MFPR_910(GPIO19, 0x128, GPIO, KP_DK, NONE, NONE, ROT, NONE, NONE, NONE),
347 MFPR_910(GPIO20, 0x12C, GPIO, SSP1, NONE, NONE, VCXO_OUT, NONE, NONE, NONE),
348 MFPR_910(GPIO21, 0x130, GPIO, SSP1, NONE, NONE, NONE, NONE, NONE, NONE),
349 MFPR_910(GPIO22, 0x134, GPIO, SSP1, NONE, NONE, NONE, NONE, NONE, NONE),
350 MFPR_910(GPIO23, 0x138, GPIO, SSP1, NONE, NONE, NONE, NONE, NONE, NONE),
351 MFPR_910(GPIO24, 0x13C, GPIO, SSP1, NONE, NONE, NONE, NONE, NONE, NONE),
352 MFPR_910(GPIO25, 0x140, GPIO, GSSP, NONE, NONE, NONE, NONE, NONE, NONE),
353 MFPR_910(GPIO26, 0x144, GPIO, GSSP, NONE, NONE, NONE, NONE, NONE, NONE),
354 MFPR_910(GPIO27, 0x148, GPIO, GSSP, NONE, NONE, NONE, NONE, NONE, NONE),
355 MFPR_910(GPIO28, 0x14C, GPIO, GSSP, NONE, NONE, NONE, NONE, NONE, NONE),
356 MFPR_910(GPIO29, 0x150, GPIO, UART0, NONE, NONE, UART1, NONE, NONE, NONE),
357 MFPR_910(GPIO30, 0x154, GPIO, UART0, NONE, NONE, UART1, NONE, NONE, NONE),
358 MFPR_910(GPIO31, 0x158, GPIO, UART0, NONE, NONE, UART1, NONE, NONE, NONE),
359 MFPR_910(GPIO32, 0x15C, GPIO, UART0, DAC_ST23, NONE, UART1, NONE, NONE, NONE),
360 MFPR_910(GPIO33, 0x160, GPIO, MMC2, SSP0, SSP2, NONE, SPI, NONE, MMC3),
361 MFPR_910(GPIO34, 0x164, GPIO, MMC2, SSP0, SSP2, NONE, SPI, NONE, MMC3),
362 MFPR_910(GPIO35, 0x168, GPIO, MMC2, SSP0, SSP2, NONE, SPI, NONE, MMC3),
363 MFPR_910(GPIO36, 0x16C, GPIO, MMC2, SSP0, SSP2, NONE, SPI, NONE, MMC3),
364 MFPR_910(GPIO37, 0x170, GPIO, MMC2, NONE, NONE, NONE, SPI, HSL, NONE),
365 MFPR_910(GPIO38, 0x174, GPIO, MMC2, NONE, NONE, NONE, NONE, HSL, NONE),
366 MFPR_910(GPIO39, 0x178, GPIO, MMC2, NONE, NONE, NONE, NONE, HSL, NONE),
367 MFPR_910(GPIO40, 0x17C, GPIO, MMC2, NONE, NONE, NONE, NONE, HSL, NONE),
368 MFPR_910(GPIO41, 0x180, GPIO, MMC2, NONE, NONE, NONE, NONE, HSL, NONE),
369 MFPR_910(GPIO42, 0x184, GPIO, MMC2, NONE, NONE, NONE, NONE, HSL, NONE),
370 MFPR_910(GPIO43, 0x188, GPIO, UART1, NONE, DAC_ST23, NONE, DSSP2, SPI, UART2),
371 MFPR_910(GPIO44, 0x18C, GPIO, UART1, NONE, EXT_INT, NONE, DSSP2, SPI, UART2),
372 MFPR_910(GPIO45, 0x190, GPIO, UART1, NONE, EXT_INT, NONE, DSSP2, SPI, UART2),
373 MFPR_910(GPIO46, 0x194, GPIO, UART1, NONE, EXT_INT, NONE, DSSP2, SPI, UART2),
374 MFPR_910(GPIO47, 0x198, GPIO, SSP0, NONE, NONE, NONE, SSP2, UART1, NONE),
375 MFPR_910(GPIO48, 0x19C, GPIO, SSP0, NONE, NONE, NONE, SSP2, UART1, NONE),
376 MFPR_910(GPIO49, 0x1A0, GPIO, SSP0, UART0, VCXO_REQ, NONE, SSP2, NONE, MMC3),
377 MFPR_910(GPIO50, 0x1A4, GPIO, SSP0, UART0, VCXO_OUT, NONE, SSP2, NONE, MMC3),
378 MFPR_910(GPIO51, 0x1A8, GPIO, UART2, PWM1, TWSI, SSP0, NONE, DSSP3, NONE),
379 MFPR_910(GPIO52, 0x1AC, GPIO, UART2, DAC_ST23, TWSI, SSP0, NONE, DSSP3, NONE),
380 MFPR_910(GPIO53, 0x1B0, GPIO, UART2, TWSI, NONE, SSP0, NONE, DSSP3, NONE),
381 MFPR_910(GPIO54, 0x1B4, GPIO, UART2, TWSI, SSP0, NONE, NONE, DSSP3, NONE),
382 MFPR_910(GPIO55, 0x2F0, TDS, GPIO, TB, NONE, NONE, NONE, NONE, NONE),
383 MFPR_910(GPIO56, 0x2F4, TDS, GPIO, TB, NONE, NONE, NONE, NONE, NONE),
384 MFPR_910(GPIO57, 0x2F8, TDS, GPIO, TB, NONE, NONE, NONE, NONE, NONE),
385 MFPR_910(GPIO58, 0x2FC, TDS, GPIO, TB, NONE, NONE, NONE, NONE, NONE),
386 MFPR_910(GPIO59, 0x300, TDS, GPIO, TCU_GPOA, TCU_GPOB, ONE_WIRE, NONE, NONE, NONE),
387 MFPR_910(GPIO60, 0x304, GPIO, NONE, NONE, NONE, NONE, NONE, NONE, NONE),
388 MFPR_910(GPIO61, 0x308, GPIO, NONE, NONE, NONE, NONE, NONE, NONE, HSL),
389 MFPR_910(GPIO62, 0x30C, GPIO, NONE, NONE, NONE, NONE, NONE, NONE, HSL),
390 MFPR_910(GPIO63, 0x310, GPIO, NONE, NONE, NONE, NONE, NONE, NONE, HSL),
391 MFPR_910(GPIO64, 0x314, GPIO, SPI2, NONE, NONE, NONE, NONE, NONE, HSL),
392 MFPR_910(GPIO65, 0x318, GPIO, SPI2, NONE, NONE, NONE, NONE, ONE_WIRE, HSL),
393 MFPR_910(GPIO66, 0x31C, GPIO, NONE, NONE, NONE, NONE, NONE, NONE, HSL),
394 MFPR_910(GPIO67, 0x1B8, GPIO, CCIC, SPI, NONE, NONE, ULPI, NONE, USIM2),
395 MFPR_910(GPIO68, 0x1BC, GPIO, CCIC, SPI, NONE, NONE, ULPI, NONE, USIM2),
396 MFPR_910(GPIO69, 0x1C0, GPIO, CCIC, SPI, NONE, NONE, ULPI, NONE, USIM2),
397 MFPR_910(GPIO70, 0x1C4, GPIO, CCIC, SPI, NONE, NONE, ULPI, NONE, NONE),
398 MFPR_910(GPIO71, 0x1C8, GPIO, CCIC, SPI, NONE, NONE, ULPI, NONE, NONE),
399 MFPR_910(GPIO72, 0x1CC, GPIO, CCIC, EXT_DMA, NONE, NONE, ULPI, NONE, NONE),
400 MFPR_910(GPIO73, 0x1D0, GPIO, CCIC, EXT_DMA, NONE, NONE, ULPI, NONE, NONE),
401 MFPR_910(GPIO74, 0x1D4, GPIO, CCIC, EXT_DMA, NONE, NONE, ULPI, NONE, NONE),
402 MFPR_910(GPIO75, 0x1D8, GPIO, CCIC, NONE, NONE, NONE, ULPI, NONE, NONE),
403 MFPR_910(GPIO76, 0x1DC, GPIO, CCIC, NONE, NONE, NONE, ULPI, NONE, NONE),
404 MFPR_910(GPIO77, 0x1E0, GPIO, CCIC, NONE, NONE, NONE, ULPI, NONE, NONE),
405 MFPR_910(GPIO78, 0x1E4, GPIO, CCIC, NONE, NONE, NONE, ULPI, NONE, NONE),
406 MFPR_910(GPIO79, 0x1E8, GPIO, TWSI, NONE, NONE, NONE, NONE, NONE, NONE),
407 MFPR_910(GPIO80, 0x1EC, GPIO, TWSI, NONE, NONE, NONE, NONE, NONE, NONE),
408 MFPR_910(GPIO81, 0x1F0, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
409 MFPR_910(GPIO82, 0x1F4, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
410 MFPR_910(GPIO83, 0x1F8, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
411 MFPR_910(GPIO84, 0x1FC, GPIO, LCD, VCXO_REQ2, NONE, NONE, NONE, NONE, NONE),
412 MFPR_910(GPIO85, 0x200, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
413 MFPR_910(GPIO86, 0x204, GPIO, LCD, VCXO_OUT2, NONE, NONE, NONE, NONE, NONE),
414 MFPR_910(GPIO87, 0x208, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
415 MFPR_910(GPIO88, 0x20C, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
416 MFPR_910(GPIO89, 0x210, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
417 MFPR_910(GPIO90, 0x214, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
418 MFPR_910(GPIO91, 0x218, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
419 MFPR_910(GPIO92, 0x21C, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
420 MFPR_910(GPIO93, 0x220, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
421 MFPR_910(GPIO94, 0x224, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
422 MFPR_910(GPIO95, 0x228, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
423 MFPR_910(GPIO96, 0x22C, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
424 MFPR_910(GPIO97, 0x230, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
425 MFPR_910(GPIO98, 0x234, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
426 MFPR_910(GPIO99, 0x0B0, MMC1, GPIO, NONE, NONE, NONE, NONE, NONE, NONE),
427 MFPR_910(GPIO100, 0x238, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
428 MFPR_910(GPIO101, 0x23C, GPIO, LCD, NONE, NONE, NONE, NONE, NONE, NONE),
429 MFPR_910(GPIO102, 0x240, GPIO, LCD, DSSP2, SPI, NONE, NONE, NONE, SPI2),
430 MFPR_910(GPIO103, 0x244, GPIO, LCD, DSSP2, SPI, NONE, NONE, NONE, SPI2),
431 MFPR_910(GPIO104, 0x248, GPIO, LCD, DSSP2, SPI, NONE, NONE, NONE, NONE),
432 MFPR_910(GPIO105, 0x24C, GPIO, LCD, DSSP2, SPI, NONE, NONE, NONE, NONE),
433 MFPR_910(GPIO106, 0x250, GPIO, LCD, DSSP3, ONE_WIRE, NONE, NONE, NONE, NONE),
434 MFPR_910(GPIO107, 0x254, GPIO, LCD, DSSP3, SPI, NONE, NONE, NONE, NONE),
435 MFPR_910(GPIO108, 0x258, GPIO, LCD, DSSP3, SPI, NONE, NONE, NONE, NONE),
436 MFPR_910(GPIO109, 0x25C, GPIO, LCD, DSSP3, SPI, NONE, NONE, NONE, NONE),
437 MFPR_910(GPIO110, 0x298, GPIO, NONE, NONE, NONE, NONE, NONE, NONE, NONE),
438 MFPR_910(GPIO111, 0x29C, GPIO, NONE, DSSP2, NONE, NONE, NONE, NONE, NONE),
439 MFPR_910(GPIO112, 0x2A0, GPIO, NONE, DSSP2, NONE, NONE, NONE, NONE, NONE),
440 MFPR_910(GPIO113, 0x2A4, GPIO, NONE, DSSP2, NONE, NONE, NONE, NONE, NONE),
441 MFPR_910(GPIO114, 0x2A8, GPIO, NONE, DSSP3, NONE, NONE, NONE, NONE, NONE),
442 MFPR_910(GPIO115, 0x2AC, GPIO, NONE, DSSP3, NONE, NONE, NONE, NONE, NONE),
443 MFPR_910(GPIO116, 0x2B0, GPIO, NONE, DSSP3, NONE, NONE, NONE, NONE, NONE),
444 MFPR_910(GPIO117, 0x0B4, PRI_JTAG, GPIO, PWM0, NONE, NONE, NONE, NONE, NONE),
445 MFPR_910(GPIO118, 0x0B8, PRI_JTAG, GPIO, PWM1, NONE, NONE, NONE, NONE, NONE),
446 MFPR_910(GPIO119, 0x0BC, PRI_JTAG, GPIO, PWM2, NONE, NONE, NONE, NONE, NONE),
447 MFPR_910(GPIO120, 0x0C0, PRI_JTAG, GPIO, PWM3, NONE, NONE, NONE, NONE, NONE),
448 MFPR_910(GPIO121, 0x32C, GPIO, NONE, NONE, NONE, NONE, NONE, NONE, NONE),
449 MFPR_910(GPIO122, 0x0C8, RESET, GPIO, 32K_CLK, NONE, NONE, NONE, NONE, NONE),
450 MFPR_910(GPIO123, 0x0CC, CLK_REQ, GPIO, ONE_WIRE, EXT_DMA, NONE, NONE, NONE, NONE),
451 MFPR_910(GPIO124, 0x0D0, GPIO, MN_CLK, DAC_ST23, NONE, NONE, NONE, NONE, NONE),
452 MFPR_910(GPIO125, 0x0D4, VCXO_REQ, GPIO, NONE, EXT_INT, NONE, NONE, NONE, NONE),
453 MFPR_910(GPIO126, 0x06C, GPIO, SMC, NONE, SM_ADDR18, NONE, EXT_DMA, NONE, NONE),
454 MFPR_910(GPIO127, 0x070, GPIO, SMC, NONE, NONE, NONE, NONE, NONE, NONE),
455 MFPR_910(ND_IO15, 0x004, NAND, GPIO, USIM2, EXT_DMA, NONE, NONE, NONE, NONE),
456 MFPR_910(ND_IO14, 0x008, NAND, GPIO, USIM2, NONE, NONE, NONE, NONE, NONE),
457 MFPR_910(ND_IO13, 0x00C, NAND, GPIO, USIM2, EXT_INT, NONE, NONE, NONE, NONE),
458 MFPR_910(ND_IO12, 0x010, NAND, GPIO, SSP2, EXT_INT, NONE, NONE, NONE, NONE),
459 MFPR_910(ND_IO11, 0x014, NAND, GPIO, SSP2, NONE, NONE, NONE, NONE, NONE),
460 MFPR_910(ND_IO10, 0x018, NAND, GPIO, SSP2, NONE, NONE, NONE, NONE, NONE),
461 MFPR_910(ND_IO9, 0x01C, NAND, GPIO, SSP2, NONE, VCXO_OUT2, NONE, NONE, NONE),
462 MFPR_910(ND_IO8, 0x020, NAND, GPIO, NONE, NONE, PWM3, NONE, NONE, NONE),
463 MFPR_910(ND_IO7, 0x024, NAND, MMC3, NONE, NONE, NONE, NONE, NONE, NONE),
464 MFPR_910(ND_IO6, 0x028, NAND, MMC3, NONE, NONE, NONE, NONE, NONE, NONE),
465 MFPR_910(ND_IO5, 0x02C, NAND, MMC3, NONE, NONE, NONE, NONE, NONE, NONE),
466 MFPR_910(ND_IO4, 0x030, NAND, MMC3, NONE, NONE, NONE, NONE, NONE, NONE),
467 MFPR_910(ND_IO3, 0x034, NAND, MMC3, NONE, NONE, NONE, NONE, NONE, NONE),
468 MFPR_910(ND_IO2, 0x038, NAND, MMC3, NONE, NONE, NONE, NONE, NONE, NONE),
469 MFPR_910(ND_IO1, 0x03C, NAND, MMC3, NONE, NONE, NONE, NONE, NONE, NONE),
470 MFPR_910(ND_IO0, 0x040, NAND, MMC3, NONE, NONE, NONE, NONE, NONE, NONE),
471 MFPR_910(ND_NCS0, 0x044, NAND, GPIO, NONE, NONE, NONE, NONE, NONE, NONE),
472 MFPR_910(ND_NCS1, 0x048, NAND, GPIO, NONE, NONE, NONE, NONE, NONE, NONE),
473 MFPR_910(SM_NCS0, 0x04C, SMC, GPIO, NONE, NONE, NONE, NONE, NONE, NONE),
474 MFPR_910(SM_NCS1, 0x050, SMC, GPIO, NONE, NONE, NONE, NONE, NONE, NONE),
475 MFPR_910(ND_NWE, 0x054, GPIO, NAND, NONE, SM_ADDR20, NONE, SMC, NONE, NONE),
476 MFPR_910(ND_NRE, 0x058, GPIO, NAND, NONE, SMC, NONE, EXT_DMA, NONE, NONE),
477 MFPR_910(ND_CLE, 0x05C, NAND, MMC3, NONE, NONE, NONE, NONE, NONE, NONE),
478 MFPR_910(ND_ALE, 0x060, GPIO, NAND, NONE, NONE, NONE, NONE, NONE, NONE),
479 MFPR_910(SM_SCLK, 0x064, MMC3, NONE, NONE, NONE, NONE, NONE, NONE, NONE),
480 MFPR_910(ND_RDY0, 0x068, NAND, GPIO, NONE, SMC, NONE, NONE, NONE, NONE),
481 MFPR_910(SM_ADV, 0x074, SMC, GPIO, NONE, NONE, NONE, NONE, NONE, NONE),
482 MFPR_910(ND_RDY1, 0x078, NAND, GPIO, NONE, SMC, NONE, NONE, NONE, NONE),
483 MFPR_910(SM_ADVMUX, 0x07C, SMC, GPIO, NONE, SM_ADDR19, NONE, NONE, NONE, NONE),
484 MFPR_910(SM_RDY, 0x080, SMC, GPIO, NONE, NONE, NONE, NONE, NONE, NONE),
485 MFPR_910(MMC1_DAT7, 0x084, MMC1, GPIO, SEC1_JTAG, TB, NONE, NONE, NONE, NONE),
486 MFPR_910(MMC1_DAT6, 0x088, MMC1, GPIO, SEC1_JTAG, TB, NONE, NONE, NONE, NONE),
487 MFPR_910(MMC1_DAT5, 0x08C, MMC1, GPIO, SEC1_JTAG, TB, NONE, NONE, NONE, NONE),
488 MFPR_910(MMC1_DAT4, 0x090, MMC1, GPIO, NONE, TB, NONE, NONE, NONE, NONE),
489 MFPR_910(MMC1_DAT3, 0x094, MMC1, HSL, SEC2_JTAG, SSP0, NONE, NONE, NONE, NONE),
490 MFPR_910(MMC1_DAT2, 0x098, MMC1, HSL, SEC2_JTAG, SSP2, SSP0, NONE, NONE, NONE),
491 MFPR_910(MMC1_DAT1, 0x09C, MMC1, HSL, SEC2_JTAG, SSP2, SSP0, NONE, NONE, NONE),
492 MFPR_910(MMC1_DAT0, 0x0A0, MMC1, HSL, SEC2_JTAG, SSP2, NONE, NONE, NONE, NONE),
493 MFPR_910(MMC1_CMD, 0x0A4, MMC1, HSL, SEC1_JTAG, SSP2, NONE, NONE, NONE, NONE),
494 MFPR_910(MMC1_CLK, 0x0A8, MMC1, HSL, SEC2_JTAG, SSP0, NONE, NONE, NONE, NONE),
495 MFPR_910(MMC1_CD, 0x0AC, MMC1, GPIO, SEC1_JTAG, NONE, NONE, NONE, NONE, NONE),
496 MFPR_910(VCXO_OUT, 0x0D8, VCXO_OUT, PWM3, NONE, NONE, NONE, NONE, NONE, NONE),
497};
498
499
500static const unsigned p910_usim2_pin1[] = {GPIO67, GPIO68, GPIO69};
501static const unsigned p910_usim2_pin2[] = {ND_IO15, ND_IO14, ND_IO13};
502static const unsigned p910_mmc1_pin1[] = {MMC1_DAT7, MMC1_DAT6, MMC1_DAT5,
503 MMC1_DAT4, MMC1_DAT3, MMC1_DAT2, MMC1_DAT1, MMC1_DAT0, MMC1_CMD,
504 MMC1_CLK, MMC1_CD, GPIO99};
505static const unsigned p910_mmc2_pin1[] = {GPIO33, GPIO34, GPIO35, GPIO36,
506 GPIO37, GPIO38, GPIO39, GPIO40, GPIO41, GPIO42};
507static const unsigned p910_mmc3_pin1[] = {GPIO33, GPIO34, GPIO35, GPIO36,
508 GPIO49, GPIO50};
509static const unsigned p910_mmc3_pin2[] = {ND_IO7, ND_IO6, ND_IO5, ND_IO4,
510 ND_IO3, ND_IO2, ND_IO1, ND_IO0, ND_CLE, SM_SCLK};
511static const unsigned p910_uart0_pin1[] = {GPIO29, GPIO30, GPIO31, GPIO32};
512static const unsigned p910_uart1_pin1[] = {GPIO47, GPIO48};
513static const unsigned p910_uart1_pin2[] = {GPIO31, GPIO32};
514static const unsigned p910_uart1_pin3[] = {GPIO45, GPIO46};
515static const unsigned p910_uart1_pin4[] = {GPIO29, GPIO30, GPIO31, GPIO32};
516static const unsigned p910_uart1_pin5[] = {GPIO43, GPIO44, GPIO45, GPIO46};
517static const unsigned p910_uart2_pin1[] = {GPIO43, GPIO44};
518static const unsigned p910_uart2_pin2[] = {GPIO51, GPIO52};
519static const unsigned p910_uart2_pin3[] = {GPIO43, GPIO44, GPIO45, GPIO46};
520static const unsigned p910_uart2_pin4[] = {GPIO51, GPIO52, GPIO53, GPIO54};
521static const unsigned p910_twsi_pin1[] = {GPIO51, GPIO52};
522static const unsigned p910_twsi_pin2[] = {GPIO53, GPIO54};
523static const unsigned p910_twsi_pin3[] = {GPIO79, GPIO80};
524static const unsigned p910_ccic_pin1[] = {GPIO67, GPIO68, GPIO69, GPIO70,
525 GPIO71, GPIO72, GPIO73, GPIO74, GPIO75, GPIO76, GPIO77, GPIO78};
526static const unsigned p910_lcd_pin1[] = {GPIO81, GPIO82, GPIO83, GPIO84,
527 GPIO85, GPIO86, GPIO87, GPIO88, GPIO89, GPIO90, GPIO91, GPIO92,
528 GPIO93, GPIO94, GPIO95, GPIO96, GPIO97, GPIO98, GPIO100, GPIO101,
529 GPIO102, GPIO103};
530static const unsigned p910_spi_pin1[] = {GPIO104, GPIO105, GPIO107, GPIO108};
531static const unsigned p910_spi_pin2[] = {GPIO43, GPIO44, GPIO45, GPIO46};
532static const unsigned p910_spi_pin3[] = {GPIO33, GPIO34, GPIO35, GPIO36,
533 GPIO37};
534static const unsigned p910_spi_pin4[] = {GPIO67, GPIO68, GPIO69, GPIO70,
535 GPIO71};
536static const unsigned p910_spi2_pin1[] = {GPIO64, GPIO65};
537static const unsigned p910_spi2_pin2[] = {GPIO102, GPIO103};
538static const unsigned p910_dssp2_pin1[] = {GPIO102, GPIO103, GPIO104, GPIO105};
539static const unsigned p910_dssp2_pin2[] = {GPIO43, GPIO44, GPIO45, GPIO46};
540static const unsigned p910_dssp2_pin3[] = {GPIO111, GPIO112, GPIO113};
541static const unsigned p910_dssp3_pin1[] = {GPIO106, GPIO107, GPIO108, GPIO109};
542static const unsigned p910_dssp3_pin2[] = {GPIO51, GPIO52, GPIO53, GPIO54};
543static const unsigned p910_dssp3_pin3[] = {GPIO114, GPIO115, GPIO116};
544static const unsigned p910_ssp0_pin1[] = {MMC1_DAT3, MMC1_DAT2, MMC1_DAT1,
545 MMC1_CLK};
546static const unsigned p910_ssp0_pin2[] = {GPIO33, GPIO34, GPIO35, GPIO36};
547static const unsigned p910_ssp0_pin3[] = {GPIO47, GPIO48, GPIO49, GPIO50};
548static const unsigned p910_ssp0_pin4[] = {GPIO51, GPIO52, GPIO53, GPIO54};
549static const unsigned p910_ssp1_pin1[] = {GPIO21, GPIO22, GPIO23, GPIO24};
550static const unsigned p910_ssp1_pin2[] = {GPIO20, GPIO21, GPIO22, GPIO23,
551 GPIO24};
552static const unsigned p910_ssp2_pin1[] = {MMC1_DAT2, MMC1_DAT1, MMC1_DAT0,
553 MMC1_CMD};
554static const unsigned p910_ssp2_pin2[] = {GPIO33, GPIO34, GPIO35, GPIO36};
555static const unsigned p910_ssp2_pin3[] = {GPIO47, GPIO48, GPIO49, GPIO50};
556static const unsigned p910_ssp2_pin4[] = {ND_IO12, ND_IO11, ND_IO10, ND_IO9};
557static const unsigned p910_gssp_pin1[] = {GPIO25, GPIO26, GPIO27, GPIO28};
558static const unsigned p910_pwm0_pin1[] = {GPIO117};
559static const unsigned p910_pwm1_pin1[] = {GPIO118};
560static const unsigned p910_pwm1_pin2[] = {GPIO51};
561static const unsigned p910_pwm2_pin1[] = {GPIO119};
562static const unsigned p910_pwm3_pin1[] = {GPIO120};
563static const unsigned p910_pwm3_pin2[] = {ND_IO8};
564static const unsigned p910_pwm3_pin3[] = {VCXO_OUT};
565static const unsigned p910_pri_jtag_pin1[] = {GPIO117, GPIO118, GPIO119,
566 GPIO120};
567static const unsigned p910_sec1_jtag_pin1[] = {MMC1_DAT7, MMC1_DAT6, MMC1_DAT5,
568 MMC1_CMD, MMC1_CD};
569static const unsigned p910_sec2_jtag_pin1[] = {MMC1_DAT3, MMC1_DAT2, MMC1_DAT1,
570 MMC1_DAT0, MMC1_CLK};
571static const unsigned p910_hsl_pin1[] = {GPIO37, GPIO38, GPIO39, GPIO40,
572 GPIO41, GPIO42};
573static const unsigned p910_hsl_pin2[] = {GPIO61, GPIO62, GPIO63, GPIO64,
574 GPIO65, GPIO66};
575static const unsigned p910_hsl_pin3[] = {MMC1_DAT3, MMC1_DAT2, MMC1_DAT1,
576 MMC1_DAT0, MMC1_CMD, MMC1_CLK};
577static const unsigned p910_w1_pin1[] = {GPIO59};
578static const unsigned p910_w1_pin2[] = {GPIO65};
579static const unsigned p910_w1_pin3[] = {GPIO106};
580static const unsigned p910_w1_pin4[] = {GPIO123};
581static const unsigned p910_kpmk_pin1[] = {GPIO0, GPIO1, GPIO2, GPIO3, GPIO4,
582 GPIO5, GPIO6, GPIO7, GPIO8, GPIO9, GPIO10, GPIO11, GPIO12, GPIO13,
583 GPIO14, GPIO15};
584static const unsigned p910_kpmk_pin2[] = {GPIO0, GPIO1, GPIO2, GPIO3, GPIO4,
585 GPIO5, GPIO6, GPIO7, GPIO8, GPIO9, GPIO12};
586static const unsigned p910_kpdk_pin1[] = {GPIO12, GPIO13, GPIO14, GPIO15,
587 GPIO16, GPIO17, GPIO18, GPIO19};
588static const unsigned p910_tds_pin1[] = {GPIO55, GPIO56, GPIO57, GPIO58,
589 GPIO59};
590static const unsigned p910_tds_pin2[] = {GPIO55, GPIO57, GPIO58, GPIO59};
591static const unsigned p910_tb_pin1[] = {GPIO14, GPIO15, GPIO16, GPIO17};
592static const unsigned p910_tb_pin2[] = {GPIO55, GPIO56, GPIO57, GPIO58};
593static const unsigned p910_tb_pin3[] = {MMC1_DAT7, MMC1_DAT6, MMC1_DAT5,
594 MMC1_DAT4};
595static const unsigned p910_ext_dma0_pin1[] = {GPIO72};
596static const unsigned p910_ext_dma0_pin2[] = {ND_IO15};
597static const unsigned p910_ext_dma0_pin3[] = {ND_NRE};
598static const unsigned p910_ext_dma1_pin1[] = {GPIO73};
599static const unsigned p910_ext_dma1_pin2[] = {GPIO123};
600static const unsigned p910_ext_dma1_pin3[] = {GPIO126};
601static const unsigned p910_ext_dma2_pin1[] = {GPIO74};
602static const unsigned p910_ext0_int_pin1[] = {GPIO44};
603static const unsigned p910_ext0_int_pin2[] = {ND_IO13};
604static const unsigned p910_ext1_int_pin1[] = {GPIO45};
605static const unsigned p910_ext1_int_pin2[] = {ND_IO12};
606static const unsigned p910_ext2_int_pin1[] = {GPIO46};
607static const unsigned p910_ext2_int_pin2[] = {GPIO125};
608static const unsigned p910_dac_st23_pin1[] = {GPIO32};
609static const unsigned p910_dac_st23_pin2[] = {GPIO43};
610static const unsigned p910_dac_st23_pin3[] = {GPIO52};
611static const unsigned p910_dac_st23_pin4[] = {GPIO124};
612static const unsigned p910_vcxo_out_pin1[] = {GPIO50};
613static const unsigned p910_vcxo_out_pin2[] = {VCXO_OUT};
614static const unsigned p910_vcxo_out_pin3[] = {GPIO20};
615static const unsigned p910_vcxo_req_pin1[] = {GPIO49};
616static const unsigned p910_vcxo_req_pin2[] = {GPIO125};
617static const unsigned p910_vcxo_out2_pin1[] = {GPIO86};
618static const unsigned p910_vcxo_out2_pin2[] = {ND_IO9};
619static const unsigned p910_vcxo_req2_pin1[] = {GPIO84};
620static const unsigned p910_ulpi_pin1[] = {GPIO67, GPIO68, GPIO69, GPIO70,
621 GPIO71, GPIO72, GPIO73, GPIO74, GPIO75, GPIO76, GPIO77, GPIO78};
622static const unsigned p910_nand_pin1[] = {ND_IO15, ND_IO14, ND_IO13, ND_IO12,
623 ND_IO11, ND_IO10, ND_IO9, ND_IO8, ND_IO7, ND_IO6, ND_IO5, ND_IO4,
624 ND_IO3, ND_IO2, ND_IO1, ND_IO0, ND_NCS0, ND_NWE, ND_NRE, ND_CLE,
625 ND_ALE, ND_RDY0};
626static const unsigned p910_gpio0_pin1[] = {GPIO0};
627static const unsigned p910_gpio0_pin2[] = {SM_ADV};
628static const unsigned p910_gpio1_pin1[] = {GPIO1};
629static const unsigned p910_gpio1_pin2[] = {ND_RDY1};
630static const unsigned p910_gpio2_pin1[] = {GPIO2};
631static const unsigned p910_gpio2_pin2[] = {SM_ADVMUX};
632static const unsigned p910_gpio3_pin1[] = {GPIO3};
633static const unsigned p910_gpio3_pin2[] = {SM_RDY};
634static const unsigned p910_gpio20_pin1[] = {GPIO20};
635static const unsigned p910_gpio20_pin2[] = {ND_IO15};
636static const unsigned p910_gpio20_pin3[] = {MMC1_DAT6};
637static const unsigned p910_gpio21_pin1[] = {GPIO21};
638static const unsigned p910_gpio21_pin2[] = {ND_IO14};
639static const unsigned p910_gpio21_pin3[] = {MMC1_DAT5};
640static const unsigned p910_gpio22_pin1[] = {GPIO22};
641static const unsigned p910_gpio22_pin2[] = {ND_IO13};
642static const unsigned p910_gpio22_pin3[] = {MMC1_DAT4};
643static const unsigned p910_gpio23_pin1[] = {GPIO23};
644static const unsigned p910_gpio23_pin2[] = {ND_IO12};
645static const unsigned p910_gpio23_pin3[] = {MMC1_CD};
646static const unsigned p910_gpio24_pin1[] = {GPIO24};
647static const unsigned p910_gpio24_pin2[] = {ND_IO11};
648static const unsigned p910_gpio24_pin3[] = {MMC1_DAT7};
649static const unsigned p910_gpio25_pin1[] = {GPIO25};
650static const unsigned p910_gpio25_pin2[] = {ND_IO10};
651static const unsigned p910_gpio26_pin1[] = {GPIO26};
652static const unsigned p910_gpio26_pin2[] = {ND_IO9};
653static const unsigned p910_gpio27_pin1[] = {GPIO27};
654static const unsigned p910_gpio27_pin2[] = {ND_IO8};
655static const unsigned p910_gpio85_pin1[] = {GPIO85};
656static const unsigned p910_gpio85_pin2[] = {ND_NCS0};
657static const unsigned p910_gpio86_pin1[] = {GPIO86};
658static const unsigned p910_gpio86_pin2[] = {ND_NCS1};
659static const unsigned p910_gpio87_pin1[] = {GPIO87};
660static const unsigned p910_gpio87_pin2[] = {SM_NCS0};
661static const unsigned p910_gpio88_pin1[] = {GPIO88};
662static const unsigned p910_gpio88_pin2[] = {SM_NCS1};
663static const unsigned p910_gpio89_pin1[] = {GPIO89};
664static const unsigned p910_gpio89_pin2[] = {ND_NWE};
665static const unsigned p910_gpio90_pin1[] = {GPIO90};
666static const unsigned p910_gpio90_pin2[] = {ND_NRE};
667static const unsigned p910_gpio91_pin1[] = {GPIO91};
668static const unsigned p910_gpio91_pin2[] = {ND_ALE};
669static const unsigned p910_gpio92_pin1[] = {GPIO92};
670static const unsigned p910_gpio92_pin2[] = {ND_RDY0};
671
672static struct pxa3xx_pin_group pxa910_grps[] = {
673 GRP_910("usim2 3p1", USIM2, p910_usim2_pin1),
674 GRP_910("usim2 3p2", USIM2, p910_usim2_pin2),
675 GRP_910("mmc1 12p", MMC1, p910_mmc1_pin1),
676 GRP_910("mmc2 10p", MMC2, p910_mmc2_pin1),
677 GRP_910("mmc3 6p", MMC3, p910_mmc3_pin1),
678 GRP_910("mmc3 10p", MMC3, p910_mmc3_pin2),
679 GRP_910("uart0 4p", UART0, p910_uart0_pin1),
680 GRP_910("uart1 2p1", UART1, p910_uart1_pin1),
681 GRP_910("uart1 2p2", UART1, p910_uart1_pin2),
682 GRP_910("uart1 2p3", UART1, p910_uart1_pin3),
683 GRP_910("uart1 4p4", UART1, p910_uart1_pin4),
684 GRP_910("uart1 4p5", UART1, p910_uart1_pin5),
685 GRP_910("uart2 2p1", UART2, p910_uart2_pin1),
686 GRP_910("uart2 2p2", UART2, p910_uart2_pin2),
687 GRP_910("uart2 4p3", UART2, p910_uart2_pin3),
688 GRP_910("uart2 4p4", UART2, p910_uart2_pin4),
689 GRP_910("twsi 2p1", TWSI, p910_twsi_pin1),
690 GRP_910("twsi 2p2", TWSI, p910_twsi_pin2),
691 GRP_910("twsi 2p3", TWSI, p910_twsi_pin3),
692 GRP_910("ccic", CCIC, p910_ccic_pin1),
693 GRP_910("lcd", LCD, p910_lcd_pin1),
694 GRP_910("spi 4p1", SPI, p910_spi_pin1),
695 GRP_910("spi 4p2", SPI, p910_spi_pin2),
696 GRP_910("spi 5p3", SPI, p910_spi_pin3),
697 GRP_910("spi 5p4", SPI, p910_spi_pin4),
698 GRP_910("dssp2 4p1", DSSP2, p910_dssp2_pin1),
699 GRP_910("dssp2 4p2", DSSP2, p910_dssp2_pin2),
700 GRP_910("dssp2 3p3", DSSP2, p910_dssp2_pin3),
701 GRP_910("dssp3 4p1", DSSP3, p910_dssp3_pin1),
702 GRP_910("dssp3 4p2", DSSP3, p910_dssp3_pin2),
703 GRP_910("dssp3 3p3", DSSP3, p910_dssp3_pin3),
704 GRP_910("ssp0 4p1", SSP0, p910_ssp0_pin1),
705 GRP_910("ssp0 4p2", SSP0, p910_ssp0_pin2),
706 GRP_910("ssp0 4p3", SSP0, p910_ssp0_pin3),
707 GRP_910("ssp0 4p4", SSP0, p910_ssp0_pin4),
708 GRP_910("ssp1 4p1", SSP1, p910_ssp1_pin1),
709 GRP_910("ssp1 5p2", SSP1, p910_ssp1_pin2),
710 GRP_910("ssp2 4p1", SSP2, p910_ssp2_pin1),
711 GRP_910("ssp2 4p2", SSP2, p910_ssp2_pin2),
712 GRP_910("ssp2 4p3", SSP2, p910_ssp2_pin3),
713 GRP_910("ssp2 4p4", SSP2, p910_ssp2_pin4),
714 GRP_910("gssp", GSSP, p910_gssp_pin1),
715 GRP_910("pwm0", PWM0, p910_pwm0_pin1),
716 GRP_910("pwm1-1", PWM1, p910_pwm1_pin1),
717 GRP_910("pwm1-2", PWM1, p910_pwm1_pin2),
718 GRP_910("pwm2", PWM2, p910_pwm2_pin1),
719 GRP_910("pwm3-1", PWM3, p910_pwm3_pin1),
720 GRP_910("pwm3-2", PWM3, p910_pwm3_pin2),
721 GRP_910("pwm3-3", PWM3, p910_pwm3_pin3),
722 GRP_910("pri jtag", PRI_JTAG, p910_pri_jtag_pin1),
723 GRP_910("sec1 jtag", SEC1_JTAG, p910_sec1_jtag_pin1),
724 GRP_910("sec2 jtag", SEC2_JTAG, p910_sec2_jtag_pin1),
725 GRP_910("hsl 6p1", HSL, p910_hsl_pin1),
726 GRP_910("hsl 6p2", HSL, p910_hsl_pin2),
727 GRP_910("hsl 6p3", HSL, p910_hsl_pin3),
728 GRP_910("w1-1", ONE_WIRE, p910_w1_pin1),
729 GRP_910("w1-2", ONE_WIRE, p910_w1_pin2),
730 GRP_910("w1-3", ONE_WIRE, p910_w1_pin3),
731 GRP_910("w1-4", ONE_WIRE, p910_w1_pin4),
732 GRP_910("kpmk 16p1", KP_MK, p910_kpmk_pin1),
733 GRP_910("kpmk 11p2", KP_MK, p910_kpmk_pin2),
734 GRP_910("kpdk 8p1", KP_DK, p910_kpdk_pin1),
735 GRP_910("tds 5p1", TDS, p910_tds_pin1),
736 GRP_910("tds 4p2", TDS, p910_tds_pin2),
737 GRP_910("tb 4p1", TB, p910_tb_pin1),
738 GRP_910("tb 4p2", TB, p910_tb_pin2),
739 GRP_910("tb 4p3", TB, p910_tb_pin3),
740 GRP_910("ext dma0-1", EXT_DMA, p910_ext_dma0_pin1),
741 GRP_910("ext dma0-2", EXT_DMA, p910_ext_dma0_pin2),
742 GRP_910("ext dma0-3", EXT_DMA, p910_ext_dma0_pin3),
743 GRP_910("ext dma1-1", EXT_DMA, p910_ext_dma1_pin1),
744 GRP_910("ext dma1-2", EXT_DMA, p910_ext_dma1_pin2),
745 GRP_910("ext dma1-3", EXT_DMA, p910_ext_dma1_pin3),
746 GRP_910("ext dma2", EXT_DMA, p910_ext_dma2_pin1),
747 GRP_910("ext0 int-1", EXT_INT, p910_ext0_int_pin1),
748 GRP_910("ext0 int-2", EXT_INT, p910_ext0_int_pin2),
749 GRP_910("ext1 int-1", EXT_INT, p910_ext1_int_pin1),
750 GRP_910("ext1 int-2", EXT_INT, p910_ext1_int_pin2),
751 GRP_910("ext2 int-1", EXT_INT, p910_ext2_int_pin1),
752 GRP_910("ext2 int-2", EXT_INT, p910_ext2_int_pin2),
753 GRP_910("dac st23-1", DAC_ST23, p910_dac_st23_pin1),
754 GRP_910("dac st23-2", DAC_ST23, p910_dac_st23_pin2),
755 GRP_910("dac st23-3", DAC_ST23, p910_dac_st23_pin3),
756 GRP_910("dac st23-4", DAC_ST23, p910_dac_st23_pin4),
757 GRP_910("vcxo out-1", VCXO_OUT, p910_vcxo_out_pin1),
758 GRP_910("vcxo out-2", VCXO_OUT, p910_vcxo_out_pin2),
759 GRP_910("vcxo out-3", VCXO_OUT, p910_vcxo_out_pin3),
760 GRP_910("vcxo req-1", VCXO_REQ, p910_vcxo_req_pin1),
761 GRP_910("vcxo req-2", VCXO_REQ, p910_vcxo_req_pin2),
762 GRP_910("vcxo out2-1", VCXO_OUT2, p910_vcxo_out2_pin1),
763 GRP_910("vcxo out2-2", VCXO_OUT2, p910_vcxo_out2_pin2),
764 GRP_910("vcxo req2", VCXO_REQ2, p910_vcxo_req2_pin1),
765 GRP_910("ulpi", ULPI, p910_ulpi_pin1),
766 GRP_910("nand", NAND, p910_nand_pin1),
767 GRP_910("gpio0-1", GPIO, p910_gpio0_pin1),
768 GRP_910("gpio0-2", GPIO, p910_gpio0_pin2),
769 GRP_910("gpio1-1", GPIO, p910_gpio1_pin1),
770 GRP_910("gpio1-2", GPIO, p910_gpio1_pin2),
771 GRP_910("gpio2-1", GPIO, p910_gpio2_pin1),
772 GRP_910("gpio2-2", GPIO, p910_gpio2_pin2),
773 GRP_910("gpio3-1", GPIO, p910_gpio3_pin1),
774 GRP_910("gpio3-2", GPIO, p910_gpio3_pin2),
775 GRP_910("gpio20-1", GPIO, p910_gpio20_pin1),
776 GRP_910("gpio20-2", GPIO, p910_gpio20_pin2),
777 GRP_910("gpio21-1", GPIO, p910_gpio21_pin1),
778 GRP_910("gpio21-2", GPIO, p910_gpio21_pin2),
779 GRP_910("gpio22-1", GPIO, p910_gpio22_pin1),
780 GRP_910("gpio22-2", GPIO, p910_gpio22_pin2),
781 GRP_910("gpio23-1", GPIO, p910_gpio23_pin1),
782 GRP_910("gpio23-2", GPIO, p910_gpio23_pin2),
783 GRP_910("gpio24-1", GPIO, p910_gpio24_pin1),
784 GRP_910("gpio24-2", GPIO, p910_gpio24_pin2),
785 GRP_910("gpio25-1", GPIO, p910_gpio25_pin1),
786 GRP_910("gpio25-2", GPIO, p910_gpio25_pin2),
787 GRP_910("gpio26-1", GPIO, p910_gpio26_pin1),
788 GRP_910("gpio26-2", GPIO, p910_gpio26_pin2),
789 GRP_910("gpio27-1", GPIO, p910_gpio27_pin1),
790 GRP_910("gpio27-2", GPIO, p910_gpio27_pin2),
791 GRP_910("gpio85-1", GPIO, p910_gpio85_pin1),
792 GRP_910("gpio85-2", GPIO, p910_gpio85_pin2),
793 GRP_910("gpio86-1", GPIO, p910_gpio86_pin1),
794 GRP_910("gpio86-2", GPIO, p910_gpio86_pin2),
795 GRP_910("gpio87-1", GPIO, p910_gpio87_pin1),
796 GRP_910("gpio87-2", GPIO, p910_gpio87_pin2),
797 GRP_910("gpio88-1", GPIO, p910_gpio88_pin1),
798 GRP_910("gpio88-2", GPIO, p910_gpio88_pin2),
799 GRP_910("gpio89-1", GPIO, p910_gpio89_pin1),
800 GRP_910("gpio89-2", GPIO, p910_gpio89_pin2),
801 GRP_910("gpio90-1", GPIO, p910_gpio90_pin1),
802 GRP_910("gpio90-2", GPIO, p910_gpio90_pin2),
803 GRP_910("gpio91-1", GPIO, p910_gpio91_pin1),
804 GRP_910("gpio91-2", GPIO, p910_gpio91_pin2),
805 GRP_910("gpio92-1", GPIO, p910_gpio92_pin1),
806 GRP_910("gpio92-2", GPIO, p910_gpio92_pin2),
807};
808
809static const char * const p910_usim2_grps[] = {"usim2 3p1", "usim2 3p2"};
810static const char * const p910_mmc1_grps[] = {"mmc1 12p"};
811static const char * const p910_mmc2_grps[] = {"mmc2 10p"};
812static const char * const p910_mmc3_grps[] = {"mmc3 6p", "mmc3 10p"};
813static const char * const p910_uart0_grps[] = {"uart0 4p"};
814static const char * const p910_uart1_grps[] = {"uart1 2p1", "uart1 2p2",
815 "uart1 2p3", "uart1 4p4", "uart1 4p5"};
816static const char * const p910_uart2_grps[] = {"uart2 2p1", "uart2 2p2",
817 "uart2 4p3", "uart2 4p4"};
818static const char * const p910_twsi_grps[] = {"twsi 2p1", "twsi 2p2",
819 "twsi 2p3"};
820static const char * const p910_ccic_grps[] = {"ccic"};
821static const char * const p910_lcd_grps[] = {"lcd"};
822static const char * const p910_spi_grps[] = {"spi 4p1", "spi 4p2", "spi 5p3",
823 "spi 5p4"};
824static const char * const p910_dssp2_grps[] = {"dssp2 4p1", "dssp2 4p2",
825 "dssp2 3p3"};
826static const char * const p910_dssp3_grps[] = {"dssp3 4p1", "dssp3 4p2",
827 "dssp3 3p3"};
828static const char * const p910_ssp0_grps[] = {"ssp0 4p1", "ssp0 4p2",
829 "ssp0 4p3", "ssp0 4p4"};
830static const char * const p910_ssp1_grps[] = {"ssp1 4p1", "ssp1 5p2"};
831static const char * const p910_ssp2_grps[] = {"ssp2 4p1", "ssp2 4p2",
832 "ssp2 4p3", "ssp2 4p4"};
833static const char * const p910_gssp_grps[] = {"gssp"};
834static const char * const p910_pwm0_grps[] = {"pwm0"};
835static const char * const p910_pwm1_grps[] = {"pwm1-1", "pwm1-2"};
836static const char * const p910_pwm2_grps[] = {"pwm2"};
837static const char * const p910_pwm3_grps[] = {"pwm3-1", "pwm3-2", "pwm3-3"};
838static const char * const p910_pri_jtag_grps[] = {"pri jtag"};
839static const char * const p910_sec1_jtag_grps[] = {"sec1 jtag"};
840static const char * const p910_sec2_jtag_grps[] = {"sec2 jtag"};
841static const char * const p910_hsl_grps[] = {"hsl 6p1", "hsl 6p2", "hsl 6p3"};
842static const char * const p910_w1_grps[] = {"w1-1", "w1-2", "w1-3", "w1-4"};
843static const char * const p910_kpmk_grps[] = {"kpmk 16p1", "kpmk 11p2"};
844static const char * const p910_kpdk_grps[] = {"kpdk 8p1"};
845static const char * const p910_tds_grps[] = {"tds 5p1", "tds 4p2"};
846static const char * const p910_tb_grps[] = {"tb 4p1", "tb 4p2", "tb 4p3"};
847static const char * const p910_dma0_grps[] = {"ext dma0-1", "ext dma0-2",
848 "ext dma0-3"};
849static const char * const p910_dma1_grps[] = {"ext dma1-1", "ext dma1-2",
850 "ext dma1-3"};
851static const char * const p910_dma2_grps[] = {"ext dma2"};
852static const char * const p910_int0_grps[] = {"ext0 int-1", "ext0 int-2"};
853static const char * const p910_int1_grps[] = {"ext1 int-1", "ext1 int-2"};
854static const char * const p910_int2_grps[] = {"ext2 int-1", "ext2 int-2"};
855static const char * const p910_dac_st23_grps[] = {"dac st23-1", "dac st23-2",
856 "dac st23-3", "dac st23-4"};
857static const char * const p910_vcxo_out_grps[] = {"vcxo out-1", "vcxo out-2",
858 "vcxo out-3"};
859static const char * const p910_vcxo_req_grps[] = {"vcxo req-1", "vcxo req-2"};
860static const char * const p910_vcxo_out2_grps[] = {"vcxo out2-1",
861 "vcxo out2-2"};
862static const char * const p910_vcxo_req2_grps[] = {"vcxo req2"};
863static const char * const p910_ulpi_grps[] = {"ulpi"};
864static const char * const p910_nand_grps[] = {"nand"};
865static const char * const p910_gpio0_grps[] = {"gpio0-1", "gpio0-2"};
866static const char * const p910_gpio1_grps[] = {"gpio1-1", "gpio1-2"};
867static const char * const p910_gpio2_grps[] = {"gpio2-1", "gpio2-2"};
868static const char * const p910_gpio3_grps[] = {"gpio3-1", "gpio3-2"};
869static const char * const p910_gpio20_grps[] = {"gpio20-1", "gpio20-2"};
870static const char * const p910_gpio21_grps[] = {"gpio21-1", "gpio21-2"};
871static const char * const p910_gpio22_grps[] = {"gpio22-1", "gpio22-2"};
872static const char * const p910_gpio23_grps[] = {"gpio23-1", "gpio23-2"};
873static const char * const p910_gpio24_grps[] = {"gpio24-1", "gpio24-2"};
874static const char * const p910_gpio25_grps[] = {"gpio25-1", "gpio25-2"};
875static const char * const p910_gpio26_grps[] = {"gpio26-1", "gpio26-2"};
876static const char * const p910_gpio27_grps[] = {"gpio27-1", "gpio27-2"};
877static const char * const p910_gpio85_grps[] = {"gpio85-1", "gpio85-2"};
878static const char * const p910_gpio86_grps[] = {"gpio86-1", "gpio86-2"};
879static const char * const p910_gpio87_grps[] = {"gpio87-1", "gpio87-2"};
880static const char * const p910_gpio88_grps[] = {"gpio88-1", "gpio88-2"};
881static const char * const p910_gpio89_grps[] = {"gpio89-1", "gpio89-2"};
882static const char * const p910_gpio90_grps[] = {"gpio90-1", "gpio90-2"};
883static const char * const p910_gpio91_grps[] = {"gpio91-1", "gpio91-2"};
884static const char * const p910_gpio92_grps[] = {"gpio92-1", "gpio92-2"};
885
886static struct pxa3xx_pmx_func pxa910_funcs[] = {
887 {"usim2", ARRAY_AND_SIZE(p910_usim2_grps)},
888 {"mmc1", ARRAY_AND_SIZE(p910_mmc1_grps)},
889 {"mmc2", ARRAY_AND_SIZE(p910_mmc2_grps)},
890 {"mmc3", ARRAY_AND_SIZE(p910_mmc3_grps)},
891 {"uart0", ARRAY_AND_SIZE(p910_uart0_grps)},
892 {"uart1", ARRAY_AND_SIZE(p910_uart1_grps)},
893 {"uart2", ARRAY_AND_SIZE(p910_uart2_grps)},
894 {"twsi", ARRAY_AND_SIZE(p910_twsi_grps)},
895 {"ccic", ARRAY_AND_SIZE(p910_ccic_grps)},
896 {"lcd", ARRAY_AND_SIZE(p910_lcd_grps)},
897 {"spi", ARRAY_AND_SIZE(p910_spi_grps)},
898 {"dssp2", ARRAY_AND_SIZE(p910_dssp2_grps)},
899 {"dssp3", ARRAY_AND_SIZE(p910_dssp3_grps)},
900 {"ssp0", ARRAY_AND_SIZE(p910_ssp0_grps)},
901 {"ssp1", ARRAY_AND_SIZE(p910_ssp1_grps)},
902 {"ssp2", ARRAY_AND_SIZE(p910_ssp2_grps)},
903 {"gssp", ARRAY_AND_SIZE(p910_gssp_grps)},
904 {"pwm0", ARRAY_AND_SIZE(p910_pwm0_grps)},
905 {"pwm1", ARRAY_AND_SIZE(p910_pwm1_grps)},
906 {"pwm2", ARRAY_AND_SIZE(p910_pwm2_grps)},
907 {"pwm3", ARRAY_AND_SIZE(p910_pwm3_grps)},
908 {"pri_jtag", ARRAY_AND_SIZE(p910_pri_jtag_grps)},
909 {"sec1_jtag", ARRAY_AND_SIZE(p910_sec1_jtag_grps)},
910 {"sec2_jtag", ARRAY_AND_SIZE(p910_sec2_jtag_grps)},
911 {"hsl", ARRAY_AND_SIZE(p910_hsl_grps)},
912 {"w1", ARRAY_AND_SIZE(p910_w1_grps)},
913 {"kpmk", ARRAY_AND_SIZE(p910_kpmk_grps)},
914 {"kpdk", ARRAY_AND_SIZE(p910_kpdk_grps)},
915 {"tds", ARRAY_AND_SIZE(p910_tds_grps)},
916 {"tb", ARRAY_AND_SIZE(p910_tb_grps)},
917 {"dma0", ARRAY_AND_SIZE(p910_dma0_grps)},
918 {"dma1", ARRAY_AND_SIZE(p910_dma1_grps)},
919 {"dma2", ARRAY_AND_SIZE(p910_dma2_grps)},
920 {"int0", ARRAY_AND_SIZE(p910_int0_grps)},
921 {"int1", ARRAY_AND_SIZE(p910_int1_grps)},
922 {"int2", ARRAY_AND_SIZE(p910_int2_grps)},
923 {"dac_st23", ARRAY_AND_SIZE(p910_dac_st23_grps)},
924 {"vcxo_out", ARRAY_AND_SIZE(p910_vcxo_out_grps)},
925 {"vcxo_req", ARRAY_AND_SIZE(p910_vcxo_req_grps)},
926 {"vcxo_out2", ARRAY_AND_SIZE(p910_vcxo_out2_grps)},
927 {"vcxo_req2", ARRAY_AND_SIZE(p910_vcxo_req2_grps)},
928 {"ulpi", ARRAY_AND_SIZE(p910_ulpi_grps)},
929 {"nand", ARRAY_AND_SIZE(p910_nand_grps)},
930 {"gpio0", ARRAY_AND_SIZE(p910_gpio0_grps)},
931 {"gpio1", ARRAY_AND_SIZE(p910_gpio1_grps)},
932 {"gpio2", ARRAY_AND_SIZE(p910_gpio2_grps)},
933 {"gpio3", ARRAY_AND_SIZE(p910_gpio3_grps)},
934 {"gpio20", ARRAY_AND_SIZE(p910_gpio20_grps)},
935 {"gpio21", ARRAY_AND_SIZE(p910_gpio21_grps)},
936 {"gpio22", ARRAY_AND_SIZE(p910_gpio22_grps)},
937 {"gpio23", ARRAY_AND_SIZE(p910_gpio23_grps)},
938 {"gpio24", ARRAY_AND_SIZE(p910_gpio24_grps)},
939 {"gpio25", ARRAY_AND_SIZE(p910_gpio25_grps)},
940 {"gpio26", ARRAY_AND_SIZE(p910_gpio26_grps)},
941 {"gpio27", ARRAY_AND_SIZE(p910_gpio27_grps)},
942 {"gpio85", ARRAY_AND_SIZE(p910_gpio85_grps)},
943 {"gpio86", ARRAY_AND_SIZE(p910_gpio86_grps)},
944 {"gpio87", ARRAY_AND_SIZE(p910_gpio87_grps)},
945 {"gpio88", ARRAY_AND_SIZE(p910_gpio88_grps)},
946 {"gpio89", ARRAY_AND_SIZE(p910_gpio89_grps)},
947 {"gpio90", ARRAY_AND_SIZE(p910_gpio90_grps)},
948 {"gpio91", ARRAY_AND_SIZE(p910_gpio91_grps)},
949 {"gpio92", ARRAY_AND_SIZE(p910_gpio92_grps)},
950};
951
952static struct pinctrl_desc pxa910_pctrl_desc = {
953 .name = "pxa910-pinctrl",
954 .owner = THIS_MODULE,
955};
956
957static struct pxa3xx_pinmux_info pxa910_info = {
958 .mfp = pxa910_mfp,
959 .num_mfp = ARRAY_SIZE(pxa910_mfp),
960 .grps = pxa910_grps,
961 .num_grps = ARRAY_SIZE(pxa910_grps),
962 .funcs = pxa910_funcs,
963 .num_funcs = ARRAY_SIZE(pxa910_funcs),
964 .num_gpio = 128,
965 .desc = &pxa910_pctrl_desc,
966 .pads = pxa910_pads,
967 .num_pads = ARRAY_SIZE(pxa910_pads),
968
969 .cputype = PINCTRL_PXA910,
970 .ds_mask = PXA910_DS_MASK,
971 .ds_shift = PXA910_DS_SHIFT,
972};
973
974static int __devinit pxa910_pinmux_probe(struct platform_device *pdev)
975{
976 return pxa3xx_pinctrl_register(pdev, &pxa910_info);
977}
978
979static int __devexit pxa910_pinmux_remove(struct platform_device *pdev)
980{
981 return pxa3xx_pinctrl_unregister(pdev);
982}
983
984static struct platform_driver pxa910_pinmux_driver = {
985 .driver = {
986 .name = "pxa910-pinmux",
987 .owner = THIS_MODULE,
988 },
989 .probe = pxa910_pinmux_probe,
990 .remove = __devexit_p(pxa910_pinmux_remove),
991};
992
993static int __init pxa910_pinmux_init(void)
994{
995 return platform_driver_register(&pxa910_pinmux_driver);
996}
997core_initcall_sync(pxa910_pinmux_init);
998
999static void __exit pxa910_pinmux_exit(void)
1000{
1001 platform_driver_unregister(&pxa910_pinmux_driver);
1002}
1003module_exit(pxa910_pinmux_exit);
1004
1005MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com>");
1006MODULE_DESCRIPTION("PXA3xx pin control driver");
1007MODULE_LICENSE("GPL v2");
generated by cgit v1.2.2 (git 2.25.0) at 2026-05-29 15:19:07 -0400