diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-06-14 14:25:32 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-06-14 14:25:32 -0400 |
| commit | f39e8409955fad210a9a7169cc53c4c18daaef3a (patch) | |
| tree | c2ebaa508062410e8f3a9de6ee8704dc1bc615c7 | |
| parent | 6211b3e1bba952fcd16d477b5dafb1904bac0e48 (diff) | |
| parent | 66aa6962ff520804f9874e57ea97995153f499d8 (diff) | |
Merge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6:
drm: Compare only lower 32 bits of framebuffer map offsets
drm/i915: Don't leak in i915_gem_shmem_pread_slow()
drm/radeon/kms: do bounds checking for 3D_LOAD_VBPNTR and bump array limit
drm/radeon/kms: fix mac g5 quirk
x86/uv/x2apic: update for change in pci bridge handling.
alpha, drm: Remove obsolete Alpha support in MGA DRM code
alpha/drm: Cleanup Alpha support in DRM generic code
savage: remove unnecessary if statement
drm/radeon: fix GUI idle IH debug statements
drm/radeon/kms: check modes against max pixel clock
drm: fix fbs in DRM_IOCTL_MODE_GETRESOURCES ioctl
| -rw-r--r-- | arch/x86/kernel/apic/x2apic_uv_x.c | 8 | ||||
| -rw-r--r-- | drivers/gpu/drm/drm_bufs.c | 17 | ||||
| -rw-r--r-- | drivers/gpu/drm/drm_crtc.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/drm_vm.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/mga/mga_drv.h | 19 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/r100_track.h | 8 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_atombios.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_clocks.c | 8 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_combios.c | 10 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_connectors.c | 13 | ||||
| -rw-r--r-- | drivers/gpu/drm/savage/savage_bci.c | 3 | ||||
| -rw-r--r-- | drivers/pci/pci.c | 4 |
16 files changed, 59 insertions, 50 deletions
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index b511a011b7d0..adc66c3a1fef 100644 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c | |||
| @@ -632,14 +632,14 @@ late_initcall(uv_init_heartbeat); | |||
| 632 | 632 | ||
| 633 | /* Direct Legacy VGA I/O traffic to designated IOH */ | 633 | /* Direct Legacy VGA I/O traffic to designated IOH */ |
| 634 | int uv_set_vga_state(struct pci_dev *pdev, bool decode, | 634 | int uv_set_vga_state(struct pci_dev *pdev, bool decode, |
| 635 | unsigned int command_bits, bool change_bridge) | 635 | unsigned int command_bits, u32 flags) |
| 636 | { | 636 | { |
| 637 | int domain, bus, rc; | 637 | int domain, bus, rc; |
| 638 | 638 | ||
| 639 | PR_DEVEL("devfn %x decode %d cmd %x chg_brdg %d\n", | 639 | PR_DEVEL("devfn %x decode %d cmd %x flags %d\n", |
| 640 | pdev->devfn, decode, command_bits, change_bridge); | 640 | pdev->devfn, decode, command_bits, flags); |
| 641 | 641 | ||
| 642 | if (!change_bridge) | 642 | if (!(flags & PCI_VGA_STATE_CHANGE_BRIDGE)) |
| 643 | return 0; | 643 | return 0; |
| 644 | 644 | ||
| 645 | if ((command_bits & PCI_COMMAND_IO) == 0) | 645 | if ((command_bits & PCI_COMMAND_IO) == 0) |
diff --git a/drivers/gpu/drm/drm_bufs.c b/drivers/gpu/drm/drm_bufs.c index 3e257a50bf56..61e1ef90d4e5 100644 --- a/drivers/gpu/drm/drm_bufs.c +++ b/drivers/gpu/drm/drm_bufs.c | |||
| @@ -46,10 +46,11 @@ static struct drm_map_list *drm_find_matching_map(struct drm_device *dev, | |||
| 46 | list_for_each_entry(entry, &dev->maplist, head) { | 46 | list_for_each_entry(entry, &dev->maplist, head) { |
| 47 | /* | 47 | /* |
| 48 | * Because the kernel-userspace ABI is fixed at a 32-bit offset | 48 | * Because the kernel-userspace ABI is fixed at a 32-bit offset |
| 49 | * while PCI resources may live above that, we ignore the map | 49 | * while PCI resources may live above that, we only compare the |
| 50 | * offset for maps of type _DRM_FRAMEBUFFER or _DRM_REGISTERS. | 50 | * lower 32 bits of the map offset for maps of type |
| 51 | * It is assumed that each driver will have only one resource of | 51 | * _DRM_FRAMEBUFFER or _DRM_REGISTERS. |
| 52 | * each type. | 52 | * It is assumed that if a driver have more than one resource |
| 53 | * of each type, the lower 32 bits are different. | ||
| 53 | */ | 54 | */ |
| 54 | if (!entry->map || | 55 | if (!entry->map || |
| 55 | map->type != entry->map->type || | 56 | map->type != entry->map->type || |
| @@ -59,9 +60,12 @@ static struct drm_map_list *drm_find_matching_map(struct drm_device *dev, | |||
| 59 | case _DRM_SHM: | 60 | case _DRM_SHM: |
| 60 | if (map->flags != _DRM_CONTAINS_LOCK) | 61 | if (map->flags != _DRM_CONTAINS_LOCK) |
| 61 | break; | 62 | break; |
| 63 | return entry; | ||
| 62 | case _DRM_REGISTERS: | 64 | case _DRM_REGISTERS: |
| 63 | case _DRM_FRAME_BUFFER: | 65 | case _DRM_FRAME_BUFFER: |
| 64 | return entry; | 66 | if ((entry->map->offset & 0xffffffff) == |
| 67 | (map->offset & 0xffffffff)) | ||
| 68 | return entry; | ||
| 65 | default: /* Make gcc happy */ | 69 | default: /* Make gcc happy */ |
| 66 | ; | 70 | ; |
| 67 | } | 71 | } |
| @@ -183,9 +187,6 @@ static int drm_addmap_core(struct drm_device * dev, resource_size_t offset, | |||
| 183 | return -EINVAL; | 187 | return -EINVAL; |
| 184 | } | 188 | } |
| 185 | #endif | 189 | #endif |
| 186 | #ifdef __alpha__ | ||
| 187 | map->offset += dev->hose->mem_space->start; | ||
| 188 | #endif | ||
| 189 | /* Some drivers preinitialize some maps, without the X Server | 190 | /* Some drivers preinitialize some maps, without the X Server |
| 190 | * needing to be aware of it. Therefore, we just return success | 191 | * needing to be aware of it. Therefore, we just return success |
| 191 | * when the server tries to create a duplicate map. | 192 | * when the server tries to create a duplicate map. |
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c index 872747c5a544..21058e6ad2b8 100644 --- a/drivers/gpu/drm/drm_crtc.c +++ b/drivers/gpu/drm/drm_crtc.c | |||
| @@ -1113,7 +1113,7 @@ int drm_mode_getresources(struct drm_device *dev, void *data, | |||
| 1113 | if (card_res->count_fbs >= fb_count) { | 1113 | if (card_res->count_fbs >= fb_count) { |
| 1114 | copied = 0; | 1114 | copied = 0; |
| 1115 | fb_id = (uint32_t __user *)(unsigned long)card_res->fb_id_ptr; | 1115 | fb_id = (uint32_t __user *)(unsigned long)card_res->fb_id_ptr; |
| 1116 | list_for_each_entry(fb, &file_priv->fbs, head) { | 1116 | list_for_each_entry(fb, &file_priv->fbs, filp_head) { |
| 1117 | if (put_user(fb->base.id, fb_id + copied)) { | 1117 | if (put_user(fb->base.id, fb_id + copied)) { |
| 1118 | ret = -EFAULT; | 1118 | ret = -EFAULT; |
| 1119 | goto out; | 1119 | goto out; |
diff --git a/drivers/gpu/drm/drm_vm.c b/drivers/gpu/drm/drm_vm.c index 2c3fcbdfd8ff..5db96d45fc71 100644 --- a/drivers/gpu/drm/drm_vm.c +++ b/drivers/gpu/drm/drm_vm.c | |||
| @@ -526,7 +526,7 @@ static int drm_mmap_dma(struct file *filp, struct vm_area_struct *vma) | |||
| 526 | static resource_size_t drm_core_get_reg_ofs(struct drm_device *dev) | 526 | static resource_size_t drm_core_get_reg_ofs(struct drm_device *dev) |
| 527 | { | 527 | { |
| 528 | #ifdef __alpha__ | 528 | #ifdef __alpha__ |
| 529 | return dev->hose->dense_mem_base - dev->hose->mem_space->start; | 529 | return dev->hose->dense_mem_base; |
| 530 | #else | 530 | #else |
| 531 | return 0; | 531 | return 0; |
| 532 | #endif | 532 | #endif |
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 12d32579b951..94c84d744100 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
| @@ -465,8 +465,10 @@ i915_gem_shmem_pread_slow(struct drm_device *dev, | |||
| 465 | 465 | ||
| 466 | page = read_cache_page_gfp(mapping, offset >> PAGE_SHIFT, | 466 | page = read_cache_page_gfp(mapping, offset >> PAGE_SHIFT, |
| 467 | GFP_HIGHUSER | __GFP_RECLAIMABLE); | 467 | GFP_HIGHUSER | __GFP_RECLAIMABLE); |
| 468 | if (IS_ERR(page)) | 468 | if (IS_ERR(page)) { |
| 469 | return PTR_ERR(page); | 469 | ret = PTR_ERR(page); |
| 470 | goto out; | ||
| 471 | } | ||
| 470 | 472 | ||
| 471 | if (do_bit17_swizzling) { | 473 | if (do_bit17_swizzling) { |
| 472 | slow_shmem_bit17_copy(page, | 474 | slow_shmem_bit17_copy(page, |
diff --git a/drivers/gpu/drm/mga/mga_drv.h b/drivers/gpu/drm/mga/mga_drv.h index 1084fa4d261b..54558a01969a 100644 --- a/drivers/gpu/drm/mga/mga_drv.h +++ b/drivers/gpu/drm/mga/mga_drv.h | |||
| @@ -195,29 +195,10 @@ extern long mga_compat_ioctl(struct file *filp, unsigned int cmd, | |||
| 195 | 195 | ||
| 196 | #define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER() | 196 | #define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER() |
| 197 | 197 | ||
| 198 | #if defined(__linux__) && defined(__alpha__) | ||
| 199 | #define MGA_BASE(reg) ((unsigned long)(dev_priv->mmio->handle)) | ||
| 200 | #define MGA_ADDR(reg) (MGA_BASE(reg) + reg) | ||
| 201 | |||
| 202 | #define MGA_DEREF(reg) (*(volatile u32 *)MGA_ADDR(reg)) | ||
| 203 | #define MGA_DEREF8(reg) (*(volatile u8 *)MGA_ADDR(reg)) | ||
| 204 | |||
| 205 | #define MGA_READ(reg) (_MGA_READ((u32 *)MGA_ADDR(reg))) | ||
| 206 | #define MGA_READ8(reg) (_MGA_READ((u8 *)MGA_ADDR(reg))) | ||
| 207 | #define MGA_WRITE(reg, val) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF(reg) = val; } while (0) | ||
| 208 | #define MGA_WRITE8(reg, val) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8(reg) = val; } while (0) | ||
| 209 | |||
| 210 | static inline u32 _MGA_READ(u32 *addr) | ||
| 211 | { | ||
| 212 | DRM_MEMORYBARRIER(); | ||
| 213 | return *(volatile u32 *)addr; | ||
| 214 | } | ||
| 215 | #else | ||
| 216 | #define MGA_READ8(reg) DRM_READ8(dev_priv->mmio, (reg)) | 198 | #define MGA_READ8(reg) DRM_READ8(dev_priv->mmio, (reg)) |
| 217 | #define MGA_READ(reg) DRM_READ32(dev_priv->mmio, (reg)) | 199 | #define MGA_READ(reg) DRM_READ32(dev_priv->mmio, (reg)) |
| 218 | #define MGA_WRITE8(reg, val) DRM_WRITE8(dev_priv->mmio, (reg), (val)) | 200 | #define MGA_WRITE8(reg, val) DRM_WRITE8(dev_priv->mmio, (reg), (val)) |
| 219 | #define MGA_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio, (reg), (val)) | 201 | #define MGA_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio, (reg), (val)) |
| 220 | #endif | ||
| 221 | 202 | ||
| 222 | #define DWGREG0 0x1c00 | 203 | #define DWGREG0 0x1c00 |
| 223 | #define DWGREG0_END 0x1dff | 204 | #define DWGREG0_END 0x1dff |
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 98ea597bc76d..86157b172c88 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
| @@ -2944,7 +2944,7 @@ restart_ih: | |||
| 2944 | radeon_fence_process(rdev); | 2944 | radeon_fence_process(rdev); |
| 2945 | break; | 2945 | break; |
| 2946 | case 233: /* GUI IDLE */ | 2946 | case 233: /* GUI IDLE */ |
| 2947 | DRM_DEBUG("IH: CP EOP\n"); | 2947 | DRM_DEBUG("IH: GUI idle\n"); |
| 2948 | rdev->pm.gui_idle = true; | 2948 | rdev->pm.gui_idle = true; |
| 2949 | wake_up(&rdev->irq.idle_queue); | 2949 | wake_up(&rdev->irq.idle_queue); |
| 2950 | break; | 2950 | break; |
diff --git a/drivers/gpu/drm/radeon/r100_track.h b/drivers/gpu/drm/radeon/r100_track.h index 2fef9de7f363..686f9dc5d4bd 100644 --- a/drivers/gpu/drm/radeon/r100_track.h +++ b/drivers/gpu/drm/radeon/r100_track.h | |||
| @@ -63,7 +63,7 @@ struct r100_cs_track { | |||
| 63 | unsigned num_arrays; | 63 | unsigned num_arrays; |
| 64 | unsigned max_indx; | 64 | unsigned max_indx; |
| 65 | unsigned color_channel_mask; | 65 | unsigned color_channel_mask; |
| 66 | struct r100_cs_track_array arrays[11]; | 66 | struct r100_cs_track_array arrays[16]; |
| 67 | struct r100_cs_track_cb cb[R300_MAX_CB]; | 67 | struct r100_cs_track_cb cb[R300_MAX_CB]; |
| 68 | struct r100_cs_track_cb zb; | 68 | struct r100_cs_track_cb zb; |
| 69 | struct r100_cs_track_cb aa; | 69 | struct r100_cs_track_cb aa; |
| @@ -146,6 +146,12 @@ static inline int r100_packet3_load_vbpntr(struct radeon_cs_parser *p, | |||
| 146 | ib = p->ib->ptr; | 146 | ib = p->ib->ptr; |
| 147 | track = (struct r100_cs_track *)p->track; | 147 | track = (struct r100_cs_track *)p->track; |
| 148 | c = radeon_get_ib_value(p, idx++) & 0x1F; | 148 | c = radeon_get_ib_value(p, idx++) & 0x1F; |
| 149 | if (c > 16) { | ||
| 150 | DRM_ERROR("Only 16 vertex buffers are allowed %d\n", | ||
| 151 | pkt->opcode); | ||
| 152 | r100_cs_dump_packet(p, pkt); | ||
| 153 | return -EINVAL; | ||
| 154 | } | ||
| 149 | track->num_arrays = c; | 155 | track->num_arrays = c; |
| 150 | for (i = 0; i < (c - 1); i+=2, idx+=3) { | 156 | for (i = 0; i < (c - 1); i+=2, idx+=3) { |
| 151 | r = r100_cs_packet_next_reloc(p, &reloc); | 157 | r = r100_cs_packet_next_reloc(p, &reloc); |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index d74d4d71437f..7dd45ca64e29 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
| @@ -3444,7 +3444,7 @@ restart_ih: | |||
| 3444 | radeon_fence_process(rdev); | 3444 | radeon_fence_process(rdev); |
| 3445 | break; | 3445 | break; |
| 3446 | case 233: /* GUI IDLE */ | 3446 | case 233: /* GUI IDLE */ |
| 3447 | DRM_DEBUG("IH: CP EOP\n"); | 3447 | DRM_DEBUG("IH: GUI idle\n"); |
| 3448 | rdev->pm.gui_idle = true; | 3448 | rdev->pm.gui_idle = true; |
| 3449 | wake_up(&rdev->irq.idle_queue); | 3449 | wake_up(&rdev->irq.idle_queue); |
| 3450 | break; | 3450 | break; |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index ba643b576054..27f45579e64b 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
| @@ -165,6 +165,7 @@ struct radeon_clock { | |||
| 165 | uint32_t default_sclk; | 165 | uint32_t default_sclk; |
| 166 | uint32_t default_dispclk; | 166 | uint32_t default_dispclk; |
| 167 | uint32_t dp_extclk; | 167 | uint32_t dp_extclk; |
| 168 | uint32_t max_pixel_clock; | ||
| 168 | }; | 169 | }; |
| 169 | 170 | ||
| 170 | /* | 171 | /* |
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 90dfb2b8cf03..fa62a503ae70 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
| @@ -1246,6 +1246,10 @@ bool radeon_atom_get_clock_info(struct drm_device *dev) | |||
| 1246 | } | 1246 | } |
| 1247 | *dcpll = *p1pll; | 1247 | *dcpll = *p1pll; |
| 1248 | 1248 | ||
| 1249 | rdev->clock.max_pixel_clock = le16_to_cpu(firmware_info->info.usMaxPixelClock); | ||
| 1250 | if (rdev->clock.max_pixel_clock == 0) | ||
| 1251 | rdev->clock.max_pixel_clock = 40000; | ||
| 1252 | |||
| 1249 | return true; | 1253 | return true; |
| 1250 | } | 1254 | } |
| 1251 | 1255 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c index 5249af8931e6..2d48e7a1474b 100644 --- a/drivers/gpu/drm/radeon/radeon_clocks.c +++ b/drivers/gpu/drm/radeon/radeon_clocks.c | |||
| @@ -117,7 +117,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev) | |||
| 117 | p1pll->reference_div = RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff; | 117 | p1pll->reference_div = RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff; |
| 118 | if (p1pll->reference_div < 2) | 118 | if (p1pll->reference_div < 2) |
| 119 | p1pll->reference_div = 12; | 119 | p1pll->reference_div = 12; |
| 120 | p2pll->reference_div = p1pll->reference_div; | 120 | p2pll->reference_div = p1pll->reference_div; |
| 121 | 121 | ||
| 122 | /* These aren't in the device-tree */ | 122 | /* These aren't in the device-tree */ |
| 123 | if (rdev->family >= CHIP_R420) { | 123 | if (rdev->family >= CHIP_R420) { |
| @@ -139,6 +139,8 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev) | |||
| 139 | p2pll->pll_out_min = 12500; | 139 | p2pll->pll_out_min = 12500; |
| 140 | p2pll->pll_out_max = 35000; | 140 | p2pll->pll_out_max = 35000; |
| 141 | } | 141 | } |
| 142 | /* not sure what the max should be in all cases */ | ||
| 143 | rdev->clock.max_pixel_clock = 35000; | ||
| 142 | 144 | ||
| 143 | spll->reference_freq = mpll->reference_freq = p1pll->reference_freq; | 145 | spll->reference_freq = mpll->reference_freq = p1pll->reference_freq; |
| 144 | spll->reference_div = mpll->reference_div = | 146 | spll->reference_div = mpll->reference_div = |
| @@ -151,7 +153,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev) | |||
| 151 | else | 153 | else |
| 152 | rdev->clock.default_sclk = | 154 | rdev->clock.default_sclk = |
| 153 | radeon_legacy_get_engine_clock(rdev); | 155 | radeon_legacy_get_engine_clock(rdev); |
| 154 | 156 | ||
| 155 | val = of_get_property(dp, "ATY,MCLK", NULL); | 157 | val = of_get_property(dp, "ATY,MCLK", NULL); |
| 156 | if (val && *val) | 158 | if (val && *val) |
| 157 | rdev->clock.default_mclk = (*val) / 10; | 159 | rdev->clock.default_mclk = (*val) / 10; |
| @@ -160,7 +162,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev) | |||
| 160 | radeon_legacy_get_memory_clock(rdev); | 162 | radeon_legacy_get_memory_clock(rdev); |
| 161 | 163 | ||
| 162 | DRM_INFO("Using device-tree clock info\n"); | 164 | DRM_INFO("Using device-tree clock info\n"); |
| 163 | 165 | ||
| 164 | return true; | 166 | return true; |
| 165 | } | 167 | } |
| 166 | #else | 168 | #else |
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c index 5b991f7c6e2a..797c8bcbb6a4 100644 --- a/drivers/gpu/drm/radeon/radeon_combios.c +++ b/drivers/gpu/drm/radeon/radeon_combios.c | |||
| @@ -866,6 +866,11 @@ bool radeon_combios_get_clock_info(struct drm_device *dev) | |||
| 866 | rdev->clock.default_sclk = sclk; | 866 | rdev->clock.default_sclk = sclk; |
| 867 | rdev->clock.default_mclk = mclk; | 867 | rdev->clock.default_mclk = mclk; |
| 868 | 868 | ||
| 869 | if (RBIOS32(pll_info + 0x16)) | ||
| 870 | rdev->clock.max_pixel_clock = RBIOS32(pll_info + 0x16); | ||
| 871 | else | ||
| 872 | rdev->clock.max_pixel_clock = 35000; /* might need something asic specific */ | ||
| 873 | |||
| 869 | return true; | 874 | return true; |
| 870 | } | 875 | } |
| 871 | return false; | 876 | return false; |
| @@ -1548,9 +1553,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
| 1548 | (rdev->pdev->subsystem_device == 0x4a48)) { | 1553 | (rdev->pdev->subsystem_device == 0x4a48)) { |
| 1549 | /* Mac X800 */ | 1554 | /* Mac X800 */ |
| 1550 | rdev->mode_info.connector_table = CT_MAC_X800; | 1555 | rdev->mode_info.connector_table = CT_MAC_X800; |
| 1551 | } else if ((rdev->pdev->device == 0x4150) && | 1556 | } else if (of_machine_is_compatible("PowerMac7,2") || |
| 1552 | (rdev->pdev->subsystem_vendor == 0x1002) && | 1557 | of_machine_is_compatible("PowerMac7,3")) { |
| 1553 | (rdev->pdev->subsystem_device == 0x4150)) { | ||
| 1554 | /* Mac G5 9600 */ | 1558 | /* Mac G5 9600 */ |
| 1555 | rdev->mode_info.connector_table = CT_MAC_G5_9600; | 1559 | rdev->mode_info.connector_table = CT_MAC_G5_9600; |
| 1556 | } else | 1560 | } else |
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index ee1dccb3fec9..9c2929c7e79f 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c | |||
| @@ -626,8 +626,14 @@ static int radeon_vga_get_modes(struct drm_connector *connector) | |||
| 626 | static int radeon_vga_mode_valid(struct drm_connector *connector, | 626 | static int radeon_vga_mode_valid(struct drm_connector *connector, |
| 627 | struct drm_display_mode *mode) | 627 | struct drm_display_mode *mode) |
| 628 | { | 628 | { |
| 629 | struct drm_device *dev = connector->dev; | ||
| 630 | struct radeon_device *rdev = dev->dev_private; | ||
| 631 | |||
| 629 | /* XXX check mode bandwidth */ | 632 | /* XXX check mode bandwidth */ |
| 630 | /* XXX verify against max DAC output frequency */ | 633 | |
| 634 | if ((mode->clock / 10) > rdev->clock.max_pixel_clock) | ||
| 635 | return MODE_CLOCK_HIGH; | ||
| 636 | |||
| 631 | return MODE_OK; | 637 | return MODE_OK; |
| 632 | } | 638 | } |
| 633 | 639 | ||
| @@ -1015,6 +1021,11 @@ static int radeon_dvi_mode_valid(struct drm_connector *connector, | |||
| 1015 | } else | 1021 | } else |
| 1016 | return MODE_CLOCK_HIGH; | 1022 | return MODE_CLOCK_HIGH; |
| 1017 | } | 1023 | } |
| 1024 | |||
| 1025 | /* check against the max pixel clock */ | ||
| 1026 | if ((mode->clock / 10) > rdev->clock.max_pixel_clock) | ||
| 1027 | return MODE_CLOCK_HIGH; | ||
| 1028 | |||
| 1018 | return MODE_OK; | 1029 | return MODE_OK; |
| 1019 | } | 1030 | } |
| 1020 | 1031 | ||
diff --git a/drivers/gpu/drm/savage/savage_bci.c b/drivers/gpu/drm/savage/savage_bci.c index bf5f83ea14fe..cb1ee4e0050a 100644 --- a/drivers/gpu/drm/savage/savage_bci.c +++ b/drivers/gpu/drm/savage/savage_bci.c | |||
| @@ -647,9 +647,6 @@ int savage_driver_firstopen(struct drm_device *dev) | |||
| 647 | ret = drm_addmap(dev, aperture_base, SAVAGE_APERTURE_SIZE, | 647 | ret = drm_addmap(dev, aperture_base, SAVAGE_APERTURE_SIZE, |
| 648 | _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING, | 648 | _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING, |
| 649 | &dev_priv->aperture); | 649 | &dev_priv->aperture); |
| 650 | if (ret) | ||
| 651 | return ret; | ||
| 652 | |||
| 653 | return ret; | 650 | return ret; |
| 654 | } | 651 | } |
| 655 | 652 | ||
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 56098b3e17c0..5f10c23dff94 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c | |||
| @@ -3271,11 +3271,11 @@ void __init pci_register_set_vga_state(arch_set_vga_state_t func) | |||
| 3271 | } | 3271 | } |
| 3272 | 3272 | ||
| 3273 | static int pci_set_vga_state_arch(struct pci_dev *dev, bool decode, | 3273 | static int pci_set_vga_state_arch(struct pci_dev *dev, bool decode, |
| 3274 | unsigned int command_bits, bool change_bridge) | 3274 | unsigned int command_bits, u32 flags) |
| 3275 | { | 3275 | { |
| 3276 | if (arch_set_vga_state) | 3276 | if (arch_set_vga_state) |
| 3277 | return arch_set_vga_state(dev, decode, command_bits, | 3277 | return arch_set_vga_state(dev, decode, command_bits, |
| 3278 | change_bridge); | 3278 | flags); |
| 3279 | return 0; | 3279 | return 0; |
| 3280 | } | 3280 | } |
| 3281 | 3281 | ||
