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authorMarkos Chandras <markos.chandras@imgtec.com>2014-04-08 07:47:05 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-05-30 08:53:05 -0400
commitf31318fdf324901ce5a17ccc3d71213117fb44af (patch)
tree9bad1a2a21aeedb77fc3e23fb3826af396dabd62
parentbef581ba1c240cda9c550d314ca70c2b8deb6e87 (diff)
MIPS: uasm: Add srlv uasm instruction
It will be used later on by bpf-jit [ralf@linux-mips.org: Fixed conflict due to other preceeding conflicts.] Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/6726/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/include/asm/uasm.h1
-rw-r--r--arch/mips/include/uapi/asm/inst.h1
-rw-r--r--arch/mips/mm/uasm-micromips.c1
-rw-r--r--arch/mips/mm/uasm-mips.c1
-rw-r--r--arch/mips/mm/uasm.c7
5 files changed, 8 insertions, 3 deletions
diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h
index 3001b1868a45..f1315ce7e449 100644
--- a/arch/mips/include/asm/uasm.h
+++ b/arch/mips/include/asm/uasm.h
@@ -143,6 +143,7 @@ Ip_u2u1u3(_sll);
143Ip_u3u2u1(_sllv); 143Ip_u3u2u1(_sllv);
144Ip_u2u1u3(_sra); 144Ip_u2u1u3(_sra);
145Ip_u2u1u3(_srl); 145Ip_u2u1u3(_srl);
146Ip_u3u2u1(_srlv);
146Ip_u3u1u2(_subu); 147Ip_u3u1u2(_subu);
147Ip_u2s3u1(_sw); 148Ip_u2s3u1(_sw);
148Ip_u1(_sync); 149Ip_u1(_sync);
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
index 217d696bd1d3..abcdebe60e70 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
@@ -253,6 +253,7 @@ enum mm_32a_minor_op {
253 mm_pool32axf_op = 0x03c, 253 mm_pool32axf_op = 0x03c,
254 mm_srl32_op = 0x040, 254 mm_srl32_op = 0x040,
255 mm_sra_op = 0x080, 255 mm_sra_op = 0x080,
256 mm_srlv32_op = 0x090,
256 mm_rotr_op = 0x0c0, 257 mm_rotr_op = 0x0c0,
257 mm_lwxs_op = 0x118, 258 mm_lwxs_op = 0x118,
258 mm_addu32_op = 0x150, 259 mm_addu32_op = 0x150,
diff --git a/arch/mips/mm/uasm-micromips.c b/arch/mips/mm/uasm-micromips.c
index e0a8df070e4b..b2348003b10f 100644
--- a/arch/mips/mm/uasm-micromips.c
+++ b/arch/mips/mm/uasm-micromips.c
@@ -97,6 +97,7 @@ static struct insn insn_table_MM[] = {
97 { insn_sllv, M(mm_pool32a_op, 0, 0, 0, 0, mm_sllv32_op), RT | RS | RD }, 97 { insn_sllv, M(mm_pool32a_op, 0, 0, 0, 0, mm_sllv32_op), RT | RS | RD },
98 { insn_sra, M(mm_pool32a_op, 0, 0, 0, 0, mm_sra_op), RT | RS | RD }, 98 { insn_sra, M(mm_pool32a_op, 0, 0, 0, 0, mm_sra_op), RT | RS | RD },
99 { insn_srl, M(mm_pool32a_op, 0, 0, 0, 0, mm_srl32_op), RT | RS | RD }, 99 { insn_srl, M(mm_pool32a_op, 0, 0, 0, 0, mm_srl32_op), RT | RS | RD },
100 { insn_srlv, M(mm_pool32a_op, 0, 0, 0, 0, mm_srlv32_op), RT | RS | RD },
100 { insn_rotr, M(mm_pool32a_op, 0, 0, 0, 0, mm_rotr_op), RT | RS | RD }, 101 { insn_rotr, M(mm_pool32a_op, 0, 0, 0, 0, mm_rotr_op), RT | RS | RD },
101 { insn_subu, M(mm_pool32a_op, 0, 0, 0, 0, mm_subu32_op), RT | RS | RD }, 102 { insn_subu, M(mm_pool32a_op, 0, 0, 0, 0, mm_subu32_op), RT | RS | RD },
102 { insn_sw, M(mm_sw32_op, 0, 0, 0, 0, 0), RT | RS | SIMM }, 103 { insn_sw, M(mm_sw32_op, 0, 0, 0, 0, 0), RT | RS | SIMM },
diff --git a/arch/mips/mm/uasm-mips.c b/arch/mips/mm/uasm-mips.c
index 086c590c9997..3d68c001fcb3 100644
--- a/arch/mips/mm/uasm-mips.c
+++ b/arch/mips/mm/uasm-mips.c
@@ -106,6 +106,7 @@ static struct insn insn_table[] = {
106 { insn_sllv, M(spec_op, 0, 0, 0, 0, sllv_op), RS | RT | RD }, 106 { insn_sllv, M(spec_op, 0, 0, 0, 0, sllv_op), RS | RT | RD },
107 { insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE }, 107 { insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE },
108 { insn_srl, M(spec_op, 0, 0, 0, 0, srl_op), RT | RD | RE }, 108 { insn_srl, M(spec_op, 0, 0, 0, 0, srl_op), RT | RD | RE },
109 { insn_srlv, M(spec_op, 0, 0, 0, 0, srlv_op), RS | RT | RD },
109 { insn_subu, M(spec_op, 0, 0, 0, 0, subu_op), RS | RT | RD }, 110 { insn_subu, M(spec_op, 0, 0, 0, 0, subu_op), RS | RT | RD },
110 { insn_sw, M(sw_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 111 { insn_sw, M(sw_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
111 { insn_sync, M(spec_op, 0, 0, 0, 0, sync_op), RE }, 112 { insn_sync, M(spec_op, 0, 0, 0, 0, sync_op), RE },
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c
index 9372d8296ced..567003ca5b18 100644
--- a/arch/mips/mm/uasm.c
+++ b/arch/mips/mm/uasm.c
@@ -52,9 +52,9 @@ enum opcode {
52 insn_ext, insn_ins, insn_j, insn_jal, insn_jalr, insn_jr, insn_ld, 52 insn_ext, insn_ins, insn_j, insn_jal, insn_jalr, insn_jr, insn_ld,
53 insn_ldx, insn_ll, insn_lld, insn_lui, insn_lw, insn_lwx, insn_mfc0, 53 insn_ldx, insn_ll, insn_lld, insn_lui, insn_lw, insn_lwx, insn_mfc0,
54 insn_mtc0, insn_or, insn_ori, insn_pref, insn_rfe, insn_rotr, insn_sc, 54 insn_mtc0, insn_or, insn_ori, insn_pref, insn_rfe, insn_rotr, insn_sc,
55 insn_scd, insn_sd, insn_sll, insn_sllv, insn_sra, insn_srl, insn_subu, 55 insn_scd, insn_sd, insn_sll, insn_sllv, insn_sra, insn_srl, insn_srlv,
56 insn_sw, insn_sync, insn_syscall, insn_tlbp, insn_tlbr, insn_tlbwi, 56 insn_subu, insn_sw, insn_sync, insn_syscall, insn_tlbp, insn_tlbr,
57 insn_tlbwr, insn_wait, insn_xor, insn_xori, insn_yield, 57 insn_tlbwi, insn_tlbwr, insn_wait, insn_xor, insn_xori, insn_yield,
58}; 58};
59 59
60struct insn { 60struct insn {
@@ -283,6 +283,7 @@ I_u2u1u3(_sll)
283I_u3u2u1(_sllv) 283I_u3u2u1(_sllv)
284I_u2u1u3(_sra) 284I_u2u1u3(_sra)
285I_u2u1u3(_srl) 285I_u2u1u3(_srl)
286I_u3u2u1(_srlv)
286I_u2u1u3(_rotr) 287I_u2u1u3(_rotr)
287I_u3u1u2(_subu) 288I_u3u1u2(_subu)
288I_u2s3u1(_sw) 289I_u2s3u1(_sw)