diff options
author | Alex Deucher <alexdeucher@gmail.com> | 2010-09-29 11:37:40 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2010-10-05 21:46:24 -0400 |
commit | f28488c282d8916b9b6190cc41714815bbaf97d5 (patch) | |
tree | 66c000cb29f4da8317c9e12594691c319094f215 | |
parent | bcac54da0a6bd2ed93a2a70fe3d4ebc08c4ed779 (diff) |
drm/radeon/kms: remove some pll algo flags
These shouldn't be needed with the post div changes
in the last patch.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
-rw-r--r-- | drivers/gpu/drm/radeon/atombios_crtc.c | 14 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_display.c | 26 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_legacy_crtc.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_mode.h | 14 |
4 files changed, 7 insertions, 52 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index cd0290f946cf..ca04a1bdb75b 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
@@ -501,21 +501,9 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, | |||
501 | (rdev->family == CHIP_RS740)) | 501 | (rdev->family == CHIP_RS740)) |
502 | pll->flags |= (/*RADEON_PLL_USE_FRAC_FB_DIV |*/ | 502 | pll->flags |= (/*RADEON_PLL_USE_FRAC_FB_DIV |*/ |
503 | RADEON_PLL_PREFER_CLOSEST_LOWER); | 503 | RADEON_PLL_PREFER_CLOSEST_LOWER); |
504 | 504 | } else | |
505 | if (ASIC_IS_DCE32(rdev) && mode->clock > 200000) /* range limits??? */ | ||
506 | pll->flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; | ||
507 | else | ||
508 | pll->flags |= RADEON_PLL_PREFER_LOW_REF_DIV; | ||
509 | } else { | ||
510 | pll->flags |= RADEON_PLL_LEGACY; | 505 | pll->flags |= RADEON_PLL_LEGACY; |
511 | 506 | ||
512 | if (mode->clock > 200000) /* range limits??? */ | ||
513 | pll->flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; | ||
514 | else | ||
515 | pll->flags |= RADEON_PLL_PREFER_LOW_REF_DIV; | ||
516 | |||
517 | } | ||
518 | |||
519 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | 507 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { |
520 | if (encoder->crtc == crtc) { | 508 | if (encoder->crtc == crtc) { |
521 | radeon_encoder = to_radeon_encoder(encoder); | 509 | radeon_encoder = to_radeon_encoder(encoder); |
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index d276d6d8e2b0..20464659d3fa 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
@@ -579,7 +579,8 @@ static void radeon_compute_pll_legacy(struct radeon_pll *pll, | |||
579 | if ((best_vco == 0 && error < best_error) || | 579 | if ((best_vco == 0 && error < best_error) || |
580 | (best_vco != 0 && | 580 | (best_vco != 0 && |
581 | ((best_error > 100 && error < best_error - 100) || | 581 | ((best_error > 100 && error < best_error - 100) || |
582 | (abs(error - best_error) < 100 && vco_diff < best_vco_diff)))) { | 582 | (abs(error - best_error) < 100 && |
583 | vco_diff < best_vco_diff)))) { | ||
583 | best_post_div = post_div; | 584 | best_post_div = post_div; |
584 | best_ref_div = ref_div; | 585 | best_ref_div = ref_div; |
585 | best_feedback_div = feedback_div; | 586 | best_feedback_div = feedback_div; |
@@ -587,29 +588,6 @@ static void radeon_compute_pll_legacy(struct radeon_pll *pll, | |||
587 | best_freq = current_freq; | 588 | best_freq = current_freq; |
588 | best_error = error; | 589 | best_error = error; |
589 | best_vco_diff = vco_diff; | 590 | best_vco_diff = vco_diff; |
590 | } else if (current_freq == freq) { | ||
591 | if (best_freq == -1) { | ||
592 | best_post_div = post_div; | ||
593 | best_ref_div = ref_div; | ||
594 | best_feedback_div = feedback_div; | ||
595 | best_frac_feedback_div = frac_feedback_div; | ||
596 | best_freq = current_freq; | ||
597 | best_error = error; | ||
598 | best_vco_diff = vco_diff; | ||
599 | } else if (((pll->flags & RADEON_PLL_PREFER_LOW_REF_DIV) && (ref_div < best_ref_div)) || | ||
600 | ((pll->flags & RADEON_PLL_PREFER_HIGH_REF_DIV) && (ref_div > best_ref_div)) || | ||
601 | ((pll->flags & RADEON_PLL_PREFER_LOW_FB_DIV) && (feedback_div < best_feedback_div)) || | ||
602 | ((pll->flags & RADEON_PLL_PREFER_HIGH_FB_DIV) && (feedback_div > best_feedback_div)) || | ||
603 | ((pll->flags & RADEON_PLL_PREFER_LOW_POST_DIV) && (post_div < best_post_div)) || | ||
604 | ((pll->flags & RADEON_PLL_PREFER_HIGH_POST_DIV) && (post_div > best_post_div))) { | ||
605 | best_post_div = post_div; | ||
606 | best_ref_div = ref_div; | ||
607 | best_feedback_div = feedback_div; | ||
608 | best_frac_feedback_div = frac_feedback_div; | ||
609 | best_freq = current_freq; | ||
610 | best_error = error; | ||
611 | best_vco_diff = vco_diff; | ||
612 | } | ||
613 | } | 591 | } |
614 | if (current_freq < freq) | 592 | if (current_freq < freq) |
615 | min_frac_feed_div = frac_feedback_div + 1; | 593 | min_frac_feed_div = frac_feedback_div + 1; |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c index 305049afde15..d60b31982845 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c | |||
@@ -722,11 +722,6 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
722 | else | 722 | else |
723 | pll->algo = PLL_ALGO_LEGACY; | 723 | pll->algo = PLL_ALGO_LEGACY; |
724 | 724 | ||
725 | if (mode->clock > 200000) /* range limits??? */ | ||
726 | pll->flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; | ||
727 | else | ||
728 | pll->flags |= RADEON_PLL_PREFER_LOW_REF_DIV; | ||
729 | |||
730 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | 725 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { |
731 | if (encoder->crtc == crtc) { | 726 | if (encoder->crtc == crtc) { |
732 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 727 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h index 8e071bf5e250..8707cd61e58b 100644 --- a/drivers/gpu/drm/radeon/radeon_mode.h +++ b/drivers/gpu/drm/radeon/radeon_mode.h | |||
@@ -139,16 +139,10 @@ struct radeon_tmds_pll { | |||
139 | #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1) | 139 | #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1) |
140 | #define RADEON_PLL_USE_REF_DIV (1 << 2) | 140 | #define RADEON_PLL_USE_REF_DIV (1 << 2) |
141 | #define RADEON_PLL_LEGACY (1 << 3) | 141 | #define RADEON_PLL_LEGACY (1 << 3) |
142 | #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4) | 142 | #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 4) |
143 | #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5) | 143 | #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 5) |
144 | #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6) | 144 | #define RADEON_PLL_USE_POST_DIV (1 << 6) |
145 | #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7) | 145 | #define RADEON_PLL_IS_LCD (1 << 7) |
146 | #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8) | ||
147 | #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9) | ||
148 | #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) | ||
149 | #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) | ||
150 | #define RADEON_PLL_USE_POST_DIV (1 << 12) | ||
151 | #define RADEON_PLL_IS_LCD (1 << 13) | ||
152 | 146 | ||
153 | /* pll algo */ | 147 | /* pll algo */ |
154 | enum radeon_pll_algo { | 148 | enum radeon_pll_algo { |