Merge branch 'for-rmk/prot-none' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into devel-stable

7 files changed, 25 insertions, 12 deletions

diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h
index 2317a71c8f8e..f97ee02386ee 100644
--- a/arch/arm/include/asm/pgtable-2level.h
+++ b/arch/arm/include/asm/pgtable-2level.h
@@ -115,6 +115,7 @@
  * The PTE table pointer refers to the hardware entries; the "Linux"
  * entries are stored 1024 bytes below.
  */
+#define L_PTE_VALID             (_AT(pteval_t, 1) << 0)         /* Valid */
 #define L_PTE_PRESENT           (_AT(pteval_t, 1) << 0)
 #define L_PTE_YOUNG             (_AT(pteval_t, 1) << 1)
 #define L_PTE_FILE              (_AT(pteval_t, 1) << 2) /* only when !PRESENT */
@@ -123,6 +124,7 @@
 #define L_PTE_USER              (_AT(pteval_t, 1) << 8)
 #define L_PTE_XN                (_AT(pteval_t, 1) << 9)
 #define L_PTE_SHARED            (_AT(pteval_t, 1) << 10)        /* shared(v6), coherent(xsc3) */
+#define L_PTE_NONE              (_AT(pteval_t, 1) << 11)
 
 /*
  * These are the memory types, defined to be compatible with
diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h
index b24903549d1c..a3f37929940a 100644
--- a/arch/arm/include/asm/pgtable-3level.h
+++ b/arch/arm/include/asm/pgtable-3level.h
@@ -67,7 +67,8 @@
  * These bits overlap with the hardware bits but the naming is preserved for
  * consistency with the classic page table format.
  */
-#define L_PTE_PRESENT           (_AT(pteval_t, 3) << 0)         /* Valid */
+#define L_PTE_VALID             (_AT(pteval_t, 1) << 0)         /* Valid */
+#define L_PTE_PRESENT           (_AT(pteval_t, 3) << 0)         /* Present */
 #define L_PTE_FILE              (_AT(pteval_t, 1) << 2)         /* only when !PRESENT */
 #define L_PTE_USER              (_AT(pteval_t, 1) << 6)         /* AP[1] */
 #define L_PTE_RDONLY            (_AT(pteval_t, 1) << 7)         /* AP[2] */
@@ -76,6 +77,7 @@
 #define L_PTE_XN                (_AT(pteval_t, 1) << 54)        /* XN */
 #define L_PTE_DIRTY             (_AT(pteval_t, 1) << 55)        /* unused */
 #define L_PTE_SPECIAL           (_AT(pteval_t, 1) << 56)        /* unused */
+#define L_PTE_NONE              (_AT(pteval_t, 1) << 57)        /* PROT_NONE */
 
 /*
  * To be used in assembly code with the upper page attributes.
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index 08c12312a1f9..9c82f988c0e3 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -73,7 +73,7 @@ extern pgprot_t		pgprot_kernel;
 
 #define _MOD_PROT(p, b) __pgprot(pgprot_val(p) | (b))
 
-#define PAGE_NONE               _MOD_PROT(pgprot_user, L_PTE_XN | L_PTE_RDONLY)
+#define PAGE_NONE               _MOD_PROT(pgprot_user, L_PTE_XN | L_PTE_RDONLY | L_PTE_NONE)
 #define PAGE_SHARED             _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_XN)
 #define PAGE_SHARED_EXEC        _MOD_PROT(pgprot_user, L_PTE_USER)
 #define PAGE_COPY               _MOD_PROT(pgprot_user, L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
@@ -83,7 +83,7 @@ extern pgprot_t		pgprot_kernel;
 #define PAGE_KERNEL             _MOD_PROT(pgprot_kernel, L_PTE_XN)
 #define PAGE_KERNEL_EXEC        pgprot_kernel
 
-#define __PAGE_NONE             __pgprot(_L_PTE_DEFAULT | L_PTE_RDONLY | L_PTE_XN)
+#define __PAGE_NONE             __pgprot(_L_PTE_DEFAULT | L_PTE_RDONLY | L_PTE_XN | L_PTE_NONE)
 #define __PAGE_SHARED           __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_XN)
 #define __PAGE_SHARED_EXEC      __pgprot(_L_PTE_DEFAULT | L_PTE_USER)
 #define __PAGE_COPY             __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_RDONLY | L_PTE_XN)
@@ -203,9 +203,7 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd)
 #define pte_exec(pte)           (!(pte_val(pte) & L_PTE_XN))
 #define pte_special(pte)        (0)
 
-#define pte_present_user(pte) \
-        ((pte_val(pte) & (L_PTE_PRESENT | L_PTE_USER)) == \
-         (L_PTE_PRESENT | L_PTE_USER))
+#define pte_present_user(pte)  (pte_present(pte) && (pte_val(pte) & L_PTE_USER))
 
 #if __LINUX_ARM_ARCH__ < 6
 static inline void __sync_icache_dcache(pte_t pteval)
@@ -242,7 +240,7 @@ static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
 
 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 {
-        const pteval_t mask = L_PTE_XN | L_PTE_RDONLY | L_PTE_USER;
+        const pteval_t mask = L_PTE_XN | L_PTE_RDONLY | L_PTE_USER | L_PTE_NONE;
         pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
         return pte;
 }
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 941dfb9e9a78..99b47b950efc 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -488,7 +488,7 @@ static void __init build_mem_type_table(void)
 #endif
 
         for (i = 0; i < 16; i++) {
-                unsigned long v = pgprot_val(protection_map[i]);
+                pteval_t v = pgprot_val(protection_map[i]);
                 protection_map[i] = __pgprot(v | user_pgprot);
         }
 
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index b29a2265af01..eb6aa73bc8b7 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -167,6 +167,10 @@
         tst     r1, #L_PTE_YOUNG
         tstne   r1, #L_PTE_PRESENT
         moveq   r3, #0
+#ifndef CONFIG_CPU_USE_DOMAINS
+        tstne   r1, #L_PTE_NONE
+        movne   r3, #0
+#endif
 
         str     r3, [r0]
         mcr     p15, 0, r0, c7, c10, 1          @ flush_pte
diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S
index fd045e706390..6d98c13ab827 100644
--- a/arch/arm/mm/proc-v7-2level.S
+++ b/arch/arm/mm/proc-v7-2level.S
@@ -100,7 +100,11 @@ ENTRY(cpu_v7_set_pte_ext)
         orrne   r3, r3, #PTE_EXT_XN
 
         tst     r1, #L_PTE_YOUNG
-        tstne   r1, #L_PTE_PRESENT
+        tstne   r1, #L_PTE_VALID
+#ifndef CONFIG_CPU_USE_DOMAINS
+        eorne   r1, r1, #L_PTE_NONE
+        tstne   r1, #L_PTE_NONE
+#endif
         moveq   r3, #0
 
  ARM(   str     r3, [r0, #2048]! )
@@ -161,11 +165,11 @@ ENDPROC(cpu_v7_set_pte_ext)
          *  TFR   EV X F   I D LR    S
          * .EEE ..EE PUI. .T.T 4RVI ZWRS BLDP WCAM
          * rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced
-         *    1    0 110       0011 1100 .111 1101 < we want
+         *   01    0 110       0011 1100 .111 1101 < we want
          */
         .align  2
         .type   v7_crval, #object
 v7_crval:
-        crval   clear=0x0120c302, mmuset=0x10c03c7d, ucset=0x00c01c7c
+        crval   clear=0x2120c302, mmuset=0x10c03c7d, ucset=0x00c01c7c
 
         .previous
diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
index 8de0f1dd1549..7b56386f9496 100644
--- a/arch/arm/mm/proc-v7-3level.S
+++ b/arch/arm/mm/proc-v7-3level.S
@@ -65,8 +65,11 @@ ENDPROC(cpu_v7_switch_mm)
  */
 ENTRY(cpu_v7_set_pte_ext)
 #ifdef CONFIG_MMU
-        tst     r2, #L_PTE_PRESENT
+        tst     r2, #L_PTE_VALID
         beq     1f
+        tst     r3, #1 << (57 - 32)             @ L_PTE_NONE
+        bicne   r2, #L_PTE_VALID
+        bne     1f
         tst     r3, #1 << (55 - 32)             @ L_PTE_DIRTY
         orreq   r2, #L_PTE_RDONLY
 1:      strd    r2, r3, [r0]