diff options
| author | Mark Brown <broonie@linaro.org> | 2013-10-05 07:30:42 -0400 |
|---|---|---|
| committer | Mark Brown <broonie@linaro.org> | 2013-10-17 05:57:48 -0400 |
| commit | f178e3dec700d5f47cc9a282dd098a2a7422d6c7 (patch) | |
| tree | d3c1c5270fc308ec3179a82c58c8e96b22f0f1da | |
| parent | 63fc184cde2d771affc2e7885c05a2792bae9f86 (diff) | |
spi/tegra20-slink: Move first transfer preparation to prepare_message
This is more idiomatic for the factored out message processing and gives a
small simplification of the code since we always set the per-transfer
parameters in the same fashion.
Signed-off-by: Mark Brown <broonie@linaro.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
| -rw-r--r-- | drivers/spi/spi-tegra20-slink.c | 55 |
1 files changed, 25 insertions, 30 deletions
diff --git a/drivers/spi/spi-tegra20-slink.c b/drivers/spi/spi-tegra20-slink.c index 3576fcb3f79b..14292c53c030 100644 --- a/drivers/spi/spi-tegra20-slink.c +++ b/drivers/spi/spi-tegra20-slink.c | |||
| @@ -196,7 +196,6 @@ struct tegra_slink_data { | |||
| 196 | u32 rx_status; | 196 | u32 rx_status; |
| 197 | u32 status_reg; | 197 | u32 status_reg; |
| 198 | bool is_packed; | 198 | bool is_packed; |
| 199 | bool is_first_msg; | ||
| 200 | unsigned long packed_size; | 199 | unsigned long packed_size; |
| 201 | 200 | ||
| 202 | u32 command_reg; | 201 | u32 command_reg; |
| @@ -708,7 +707,7 @@ static void tegra_slink_deinit_dma_param(struct tegra_slink_data *tspi, | |||
| 708 | } | 707 | } |
| 709 | 708 | ||
| 710 | static int tegra_slink_start_transfer_one(struct spi_device *spi, | 709 | static int tegra_slink_start_transfer_one(struct spi_device *spi, |
| 711 | struct spi_transfer *t, bool is_first_of_msg) | 710 | struct spi_transfer *t) |
| 712 | { | 711 | { |
| 713 | struct tegra_slink_data *tspi = spi_master_get_devdata(spi->master); | 712 | struct tegra_slink_data *tspi = spi_master_get_devdata(spi->master); |
| 714 | u32 speed; | 713 | u32 speed; |
| @@ -732,32 +731,12 @@ static int tegra_slink_start_transfer_one(struct spi_device *spi, | |||
| 732 | tspi->curr_xfer = t; | 731 | tspi->curr_xfer = t; |
| 733 | total_fifo_words = tegra_slink_calculate_curr_xfer_param(spi, tspi, t); | 732 | total_fifo_words = tegra_slink_calculate_curr_xfer_param(spi, tspi, t); |
| 734 | 733 | ||
| 735 | if (is_first_of_msg) { | 734 | command = tspi->command_reg; |
| 736 | tegra_slink_clear_status(tspi); | 735 | command &= ~SLINK_BIT_LENGTH(~0); |
| 736 | command |= SLINK_BIT_LENGTH(bits_per_word - 1); | ||
| 737 | 737 | ||
| 738 | command = tspi->def_command_reg; | 738 | command2 = tspi->command2_reg; |
| 739 | command |= SLINK_BIT_LENGTH(bits_per_word - 1); | 739 | command2 &= ~(SLINK_RXEN | SLINK_TXEN); |
| 740 | command |= SLINK_CS_SW | SLINK_CS_VALUE; | ||
| 741 | |||
| 742 | command2 = tspi->def_command2_reg; | ||
| 743 | command2 |= SLINK_SS_EN_CS(spi->chip_select); | ||
| 744 | |||
| 745 | command &= ~SLINK_MODES; | ||
| 746 | if (spi->mode & SPI_CPHA) | ||
| 747 | command |= SLINK_CK_SDA; | ||
| 748 | |||
| 749 | if (spi->mode & SPI_CPOL) | ||
| 750 | command |= SLINK_IDLE_SCLK_DRIVE_HIGH; | ||
| 751 | else | ||
| 752 | command |= SLINK_IDLE_SCLK_DRIVE_LOW; | ||
| 753 | } else { | ||
| 754 | command = tspi->command_reg; | ||
| 755 | command &= ~SLINK_BIT_LENGTH(~0); | ||
| 756 | command |= SLINK_BIT_LENGTH(bits_per_word - 1); | ||
| 757 | |||
| 758 | command2 = tspi->command2_reg; | ||
| 759 | command2 &= ~(SLINK_RXEN | SLINK_TXEN); | ||
| 760 | } | ||
| 761 | 740 | ||
| 762 | tegra_slink_writel(tspi, command, SLINK_COMMAND); | 741 | tegra_slink_writel(tspi, command, SLINK_COMMAND); |
| 763 | tspi->command_reg = command; | 742 | tspi->command_reg = command; |
| @@ -828,8 +807,24 @@ static int tegra_slink_prepare_message(struct spi_master *master, | |||
| 828 | struct spi_message *msg) | 807 | struct spi_message *msg) |
| 829 | { | 808 | { |
| 830 | struct tegra_slink_data *tspi = spi_master_get_devdata(master); | 809 | struct tegra_slink_data *tspi = spi_master_get_devdata(master); |
| 810 | struct spi_device *spi = msg->spi; | ||
| 831 | 811 | ||
| 832 | tspi->is_first_msg = true; | 812 | tegra_slink_clear_status(tspi); |
| 813 | |||
| 814 | tspi->command_reg = tspi->def_command_reg; | ||
| 815 | tspi->command_reg |= SLINK_CS_SW | SLINK_CS_VALUE; | ||
| 816 | |||
| 817 | tspi->command2_reg = tspi->def_command2_reg; | ||
| 818 | tspi->command2_reg |= SLINK_SS_EN_CS(spi->chip_select); | ||
| 819 | |||
| 820 | tspi->command_reg &= ~SLINK_MODES; | ||
| 821 | if (spi->mode & SPI_CPHA) | ||
| 822 | tspi->command_reg |= SLINK_CK_SDA; | ||
| 823 | |||
| 824 | if (spi->mode & SPI_CPOL) | ||
| 825 | tspi->command_reg |= SLINK_IDLE_SCLK_DRIVE_HIGH; | ||
| 826 | else | ||
| 827 | tspi->command_reg |= SLINK_IDLE_SCLK_DRIVE_LOW; | ||
| 833 | 828 | ||
| 834 | return 0; | 829 | return 0; |
| 835 | } | 830 | } |
| @@ -842,13 +837,13 @@ static int tegra_slink_transfer_one(struct spi_master *master, | |||
| 842 | int ret; | 837 | int ret; |
| 843 | 838 | ||
| 844 | INIT_COMPLETION(tspi->xfer_completion); | 839 | INIT_COMPLETION(tspi->xfer_completion); |
| 845 | ret = tegra_slink_start_transfer_one(spi, xfer, tspi->is_first_msg); | 840 | ret = tegra_slink_start_transfer_one(spi, xfer); |
| 846 | if (ret < 0) { | 841 | if (ret < 0) { |
| 847 | dev_err(tspi->dev, | 842 | dev_err(tspi->dev, |
| 848 | "spi can not start transfer, err %d\n", ret); | 843 | "spi can not start transfer, err %d\n", ret); |
| 849 | return ret; | 844 | return ret; |
| 850 | } | 845 | } |
| 851 | tspi->is_first_msg = false; | 846 | |
| 852 | ret = wait_for_completion_timeout(&tspi->xfer_completion, | 847 | ret = wait_for_completion_timeout(&tspi->xfer_completion, |
| 853 | SLINK_DMA_TIMEOUT); | 848 | SLINK_DMA_TIMEOUT); |
| 854 | if (WARN_ON(ret == 0)) { | 849 | if (WARN_ON(ret == 0)) { |
